EE141 1 EE141 1 EECS141 EE141 EE141- Spring 2006 Spring 2006 Digital Integrated Digital Integrated Circuits Circuits Design of an Execution Unit Design of an Execution Unit Luke Tsai Luke Tsai AMD AMD EE141 2 EECS141 Outline Outline Introduction What is the Execution Unit? High Level Design Considerations Circuit Design of an Barrel Shifter “Real Life” Designs
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EE141EE141--Spring 2006Spring 2006Digital Integrated Digital Integrated CircuitsCircuits
Design of an Execution UnitDesign of an Execution Unit
Luke TsaiLuke TsaiAMDAMD
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OutlineOutlineIntroductionWhat is the Execution Unit?High Level Design ConsiderationsCircuit Design of an Barrel Shifter“Real Life” Designs
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IntroductionIntroduction
If you love EE141…Consider a career in Microprocessor DesignAll aspects and variety of circuit designMaximum complexityLeading Edge Technology
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What is an What is an Execution Execution Unit (EX)?Unit (EX)?
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A Classical Processor A Classical Processor Block DiagramBlock Diagram
Instruction Fetch (IF)
Decode (DE)
Scheduler (SC)
Execution Unit (EX)
Load-Store (LS)
Floating Point (FPU)
Memory(L2 Cache)
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The EX Unit Implements the The EX Unit Implements the Integer Instruction SetInteger Instruction Set
Bypass condition occurs when an operand of an instruction scheduled to be executed in cycle n is generated in the immediate preceding cycle (n-1).The data of this operand do not reside in the register file and need to be bypassed from one of the result buses.
Circuit Design Circuit Design of an Barrel of an Barrel ShifterShifter
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What is a Barrel Shifter?What is a Barrel Shifter?Performs a shift or rotate on the full/partial data
Example: 8 bit shifter
Input Bit PositionRot Left 1Rot Right 1
Logical Shift Left 2Arithmetic Shift Left 2Logical Shift Right 3
Arithmetic Shift Right 3
7 6 5 4 3 2 1 06 5 4 3 2 1 0 70 7 6 5 4 3 2 15 4 3 2 1 0 L L (= mult by 4)5 4 3 2 1 0 L L (Same as above)L L L 7 6 5 4 37 7 7 7 6 5 4 3L = Low (zero)
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Barrel Shifter DesignBarrel Shifter DesignObserve: Any input bit could be passed to ALL output bit positions.
Therefore: the shifter is nothing but a giant NxN mux, where N is the width of data.The mux select is the one-hot decode of the shift amount.7 6 5 4 3 2 1 0
X86 Instruction Set supports 8(L/H)/16/32/64 bit shifts
2. Shift differs from RotateShifts fills in zeros or the sign bit => How do you build a barrel shifter that does both shift and rotate?
3. Rotate could include the Carry bitX86 supports RCL/RCR (Rotate with Carry Left/Right) => A 64-bit RCL requires a 65-bit barrel shifter!
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““Real LifeReal Life””DesignsDesigns
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Robustness and ReliabilityRobustness and ReliabilityRobustness: Higher Yield=Higher Profit Margin
Circuit needs to function across PVT variationChip target yield of 70% could require EX yield of 99%What works in spice (w/o PVT) may not work in real life
ReliabilityIn addition to simulation for speed, real design also checks
– Noise– IR Drop– Electro-Migration– Inductive Effects– …
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Process VariationProcess VariationMajor Culprits: Threshold, Channel Length, Channel Width
In 45nm, Vth ~ +- 150mV, ΔL ~ +- 15%, ΔW ~ +- 10% (for min devices). (Idsat/Idoff relationships to variation non-linear. Try it in spice.)Matching devices/paths: sense-amp, analog, memory cell stability, clock treeIncreases Leakage: 80% of chip leakage caused by 20% of devices: limits usage of dynamic circuitSlows down critical pathsWorse hold-time requirements
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Voltage/Temperature VariationsVoltage/Temperature VariationsIntroduce more timing variationsIncrease NoiseWorsen cross chip matching (e.g. Clock tree)Degrade reliability 1.072 V