©2010 Akula LLC, Jeremy R. Hertzberg, BS CMPE
Computer TechnologyTransistor to computer gates
http://upload.wikimedia.org/wikipedia/commons/4/4e/Diopsis.jpg
©2010 Akula LLC, Jeremy R. Hertzberg, BS CMPE
ComputerTransistorCentral Processor Unit or CPUMotherboard
http://upload.wikimedia.org/wikipedia/commons/4/4e/Diopsis.jpghttp://en.wikipedia.org/wiki/File:Asus_a8n_VMCSM02.jpg
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©2010 Akula LLC, Jeremy R. Hertzberg, BS CMPE
The Transistor
AmplifierRemote controlled switchIt is the basic element of the
computerA modern computer core (CPU)
can have over 200,000,000 transistors (200 million).http://www.flickr.com/photos/oskay/2105641530/
©2010 Akula LLC, Jeremy R. Hertzberg, BS CMPE
Transistor in digital electronics
In modern electronics most transistors are used as a switch that is controlled by an input signal.
This is accomplished by giving the transistor a large enough signal to snap it on completely or…
giving it a small enough signal to turn it off.
Commonly these states (on/off) are represented by a zero (off) or one (on).
©2010 Akula LLC, Jeremy R. Hertzberg, BS CMPE
Transistors
©2010 Akula LLC, Jeremy R. Hertzberg, BS CMPE
Transistors:common circuits for computers
Transistors are used to form many basic circuits in computers.
These are the five basic circuits:◦Not◦AND◦NAND (Not AND)◦OR◦NOR (Not OR)
They are named after the logic function they provide.
©2010 Akula LLC, Jeremy R. Hertzberg, BS CMPE
NOT gateAlso called a
inverterIt inverts the
inputNOT gate
Input A Output Q0 11 0
©2010 Akula LLC, Jeremy R. Hertzberg, BS CMPE
Not gate using a NPN transistor
NOT gate
Input A Output Q
0 1
1 0
If Input A is off then the gate is off and VCC supplies power to the Output Q.
©2010 Akula LLC, Jeremy R. Hertzberg, BS CMPE
Not gate using a NPN transistor
NOT gate
Input A Output Q
0 1
1 0
If Input A is on then the gate is on and Output Q is pulled down to ground.
©2010 Akula LLC, Jeremy R. Hertzberg, BS CMPE
Transistor-AND gateThe basic AND gate has two
inputsIf both inputs are high, then the
output is highOtherwise the output is low
AND gate Input A Input B Output Q
0 0 00 1 01 0 01 1 1
©2010 Akula LLC, Jeremy R. Hertzberg, BS CMPE
The AND gate using PNP transistors
AND gateInput A Input B Output Q
0 0 00 1 01 0 01 1 1
If Input A or Input B are off then VCC turns on the Q3 and grounds the Output Q.
Q3
©2010 Akula LLC, Jeremy R. Hertzberg, BS CMPE
The AND gate using PNP transistors
AND gateInput A Input B Output Q
0 0 00 1 01 0 01 1 1
If Input A AND Input B are on then Q3 is turned off and Output Q is pulled high. Q3
©2010 Akula LLC, Jeremy R. Hertzberg, BS CMPE
Transistor-NAND gateThe basic NAND gate has two
inputsIf any inputs are high, then the
output is lowOtherwise the output is high
NAND gateInput A Input B Output Q
0 0 10 1 11 0 11 1 0
©2010 Akula LLC, Jeremy R. Hertzberg, BS CMPE
The NAND gate using PNP transistors
NAND gateInput A Input B Output Q
0 0 10 1 11 0 11 1 0
If Input A and Input B are on then Output Q is pulled to ground.
©2010 Akula LLC, Jeremy R. Hertzberg, BS CMPE
The NAND gate using PNP transistors
NAND gateInput A Input B Output Q
0 0 10 1 11 0 11 1 0
If Input A or Input B are off then Output Q is pulled high.
©2010 Akula LLC, Jeremy R. Hertzberg, BS CMPE
Transistor-OR gateThe basic OR gate has two inputsIf either input is high, then the
output is highOtherwise the output is low
OR gateInput A Input B Output Q
0 0 00 1 11 0 11 1 1
©2010 Akula LLC, Jeremy R. Hertzberg, BS CMPE
Transistor-OR gate with PNPs
OR gateInput A Input B Output Q
0 0 00 1 11 0 11 1 1
If Input A or Input B are on then Output Q is pulled high.
©2010 Akula LLC, Jeremy R. Hertzberg, BS CMPE
Transistor-OR gate with PNPs
OR gateInput A Input B Output Q
0 0 00 1 11 0 11 1 1
If Input A and Input B are OFF then Output Q is pulled low.
©2010 Akula LLC, Jeremy R. Hertzberg, BS CMPE
Transistor-NOR gateThe basic NOR gate has two
inputsIf either input is high, then the
output is lowOtherwise the output is high
NOR gateInput A Input B Output Q
0 0 10 1 01 0 01 1 0
©2010 Akula LLC, Jeremy R. Hertzberg, BS CMPE
Transistor-NOR gate with PNPs
NOR gateInput A Input B Output Q
0 0 10 1 01 0 01 1 0