Copyright © 2014, Arasan Chip Systems, Inc. Slide 1 USB 2.0 Total IP Solution Zachi Friedman Senior Director of Marketing Arasan Chip Systems, Inc. Apr. 2014
Jun 20, 2015
Copyright © 2014, Arasan Chip Systems, Inc.Slide 1
USB 2.0
Total IP Solution
Zachi FriedmanSenior Director of Marketing
Arasan Chip Systems, Inc.
Apr. 2014
Copyright © 2014, Arasan Chip Systems, Inc.Slide 2
Agenda
• Arasan’s USB 2.0 IP Family
• USB 2.0 Hub IP
• USB 2.0 Host Controller Architecture
• Compound Hub Architecture
• USB 2.0 PHY
• HSIC
• USB 2.0 Host Controller HVP
• Movie / Demo
• Questions & Answers
Copyright © 2014, Arasan Chip Systems, Inc.Slide 4
Arasan USB 2.0 IP Family
• USB Host
• Hub
• Device
• OTG
• PHY
• HSIC
Copyright © 2014, Arasan Chip Systems, Inc.Slide 5
USB Hub IP - details
• High Speed support: 480 Mbit/s• Full Speed support: 12 Mbit/s • Low Speed support: 1.5Mbit/s• USB 2.0 Compliant• High/Full speed support using
8/16 bit UTMI/ULPI interface • UTMI Interface Clock: 30/60
MHz • Configurable up to 15
Downstream Ports • Dedicated control endpoint zero • USB Suspend/Resume support• LPM Support enabled• Configurable # of Transaction
Translators (TT)• Full Speed and High Speed
repeater
Transceiver
Transceiver Transceiver Transceiver
Copyright © 2014, Arasan Chip Systems, Inc.Slide 6
Our Host+Hub Architecture
• Complies with USB specification revision 2.0
• Complies with EHCI specification revision 1.0
• Supports up to 127 devices and 15 downstream ports
• 8/16-bit UTMI and 8-bit ULPI interfaces
• Direct addressing all IP core registers from AXI, AHB, PCIe or custom bus
• DMA controller supports high-speed data transfers between USB Host IP and host bus
• 32/64-bit host bus
System Bus Interface (AXI / AHB / PCIe)
Enhanced Host Controller Interface (EHCI)
USB 2.0 Hub
System Bus
USB Port 1
USB Port 2
USB Port 3
USB Port 4
Copyright © 2014, Arasan Chip Systems, Inc.Slide 7
Companion Host Controller vs Integrated Hub
System Bus Interface (AXI / AHB / PCIe)
Enhanced Host Controller Interface (EHCI)
USB 2.0 Hub
System Bus
USB Port 1
USB Port 2
USB Port 3
USB Port 4
System Bus Interface (AXI / AHB / PCIe)
Enhanced Host
Controller Interface (EHCI)
System Bus
USB Port 1
USB Port 2
USB Port 3
USB Port 4
Companion Host
Controller (OHCI/UHCI)
Copyright © 2014, Arasan Chip Systems, Inc.Slide 8
Compound Hub Architecture
Hub Controller + repeater
Compound / Permanent-Attached Device 1(PHY-less)
PHY
Compound / Permanent-Attached Device 2(PHY-less)
USB 2.0Device port (with PHY)
Compound Hub Architecture
TT
Copyright © 2014, Arasan Chip Systems, Inc.Slide 9
USB 2.0 PHY
• Complies with USB specifications, rev. 2.0 and 1.1
• Complies with UTMI+ level 3 specification
• Supports 480Mb/s (HS), 12Mb/s (FS) and 1.5MB/s (LS) serial data transmission rates
• Supports 8/16 bit UTMI+ interface in 60/30 MHz
• Supports ULPI interface
Copyright © 2014, Arasan Chip Systems, Inc.Slide 10
HSIC
• 2-signal (strobe, data) source synchronous serial interface
• High-Speed 480Mbps (240Mhz DDR signaling) data rate
• Very low power consumed unless a transfer is in progress
• Maximum trace length of 10cm
Copyright © 2014, Arasan Chip Systems, Inc.Slide 11
USB 2.0 Host + Hub HVP
• x86 PC with PCIe card
• FPGA pre-loaded with USB 2.0 Host + Hub IP
FPGA
PCIe
USB Connector
Copyright © 2014, Arasan Chip Systems, Inc.Slide 12
Availability & Maturity
• Arasan has been USB 2.0 IP provider for 10+ years
• Silicon proven and in production by many customers
• PHY available in multiple process nodes• Can be ported to any node