Intrinsic DX centers in ternary chalcopyrite semiconductors Stephan Lany and Alex Zunger “Why metastable intrinsic defects cause open-circuit-voltage limitation and how they can be avoided” This work was supported by the U.S. Department of Energy under Contract No. DE-AC36-99GO10337 with the National Renewable Energy Laboratory. NREL/PR-590-43272 Presented at the 33rd IEEE Photovoltaic Specialist Conference held May 11-16, 2008 in San Diego, California
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Intrinsic DX Centers in Ternary Chalcopyrite Semiconductors … · Electron-trapping due to DX centers occurs mainly in wider-gap CuIn 1– x Ga x Se 2 alloys with x ≥ 0.3 In Cu
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Intrinsic DX centers in ternary chalcopyrite semiconductors
Stephan Lany and Alex Zunger
“Why metastable intrinsic defects cause open-circuit-voltage limitationand how they can be avoided”
This work was supported by the U.S. Department of Energy under Contract No. DE-AC36-99GO10337 with the National Renewable Energy Laboratory.
NREL/PR-590-43272Presented at the 33rd IEEE Photovoltaic Specialist Conference held May 11-16, 2008 in San Diego, California
VOC =
VOC saturation in CIGS
[1] W.N. Shafarman and L. Stolt, in: Handbook of Photovoltaic Science and Engineering
[2] R. Kniese, M. Lammer, U. Rau , M. Powalla, TSF 451-452, 430 (2004).
[3] G. Hanna, A. Jasenek, U. Rau, H.W. Schock, TSF 387, 71 (2001).
[1][2]
1.7eVCGS
VOC =1.2eV
Higher VOC:• Higher η for single-junction• Needed for TF tandem• Reason: Recombination due to
deep defects [3]
VOC = Eg − 0.5 eV
Defects levels (I) – Example: Orbital interaction in the H2 molecule
anti-bonding
superposition
bonding
H1 H2
Defects levels (II): Se-vacancy in CuInSe2
Se
Cu
In
VSe
VBM
CBM
a
b
Intrinsic DX centers in CIGS
DX centers: Electron traps formed due to lattice relaxations