PPI : 82C55 PPI : 82C55 The 82C55 is a popular interfacing The 82C55 is a popular interfacing component, that can interface any TTL- component, that can interface any TTL- compatible I/O device to the microprocessor. compatible I/O device to the microprocessor. It is used to interface to the keyboard and It is used to interface to the keyboard and a parallel printer port in PCs (usually as a parallel printer port in PCs (usually as part of an integrated chipset). part of an integrated chipset). Requires insertion of wait states if used Requires insertion of wait states if used with a microprocessor using higher that an 8 with a microprocessor using higher that an 8 MHz clock. MHz clock. PPI has 24 pins for I/O that are PPI has 24 pins for I/O that are programmable in groups of 12 pins and has programmable in groups of 12 pins and has three distinct modes of operation. three distinct modes of operation. In the PC, an 82C55 or its equivalent is In the PC, an 82C55 or its equivalent is decoded at I/O ports 60H-63H. decoded at I/O ports 60H-63H.
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PPI : 82C55PPI : 82C55 The 82C55 is a popular interfacing component, The 82C55 is a popular interfacing component,
that can interface any TTL-compatible I/O device that can interface any TTL-compatible I/O device to the microprocessor. to the microprocessor.
It is used to interface to the keyboard and a It is used to interface to the keyboard and a parallel printer port in PCs (usually as part of an parallel printer port in PCs (usually as part of an integrated chipset). integrated chipset).
Requires insertion of wait states if used with a Requires insertion of wait states if used with a microprocessor using higher that an 8 MHz clock. microprocessor using higher that an 8 MHz clock.
PPI has 24 pins for I/O that are programmable in PPI has 24 pins for I/O that are programmable in groups of 12 pins and has three distinct modes of groups of 12 pins and has three distinct modes of operation. operation.
In the PC, an 82C55 or its equivalent is decoded In the PC, an 82C55 or its equivalent is decoded at I/O ports 60H-63H. at I/O ports 60H-63H.
8255 has three operation modes: mode 0, mode 1, and mode 2
Programming 8255
Mode 0:
— Ports A, B, and C can be individually programmed as input or output ports— Port C is divided into two 4-bit ports which are independent from each other
Mode 1:
— Ports A and B are programmed as input or output ports— Port C is used for handshaking
PA[7:0]
STBA
IBFA
INTRAPC3PC5PC4
PB[7:0]
STBB
IBFB
INTRBPC0PC1PC2
PC6, 7
8255
PA[7:0]
OBFA
ACKA
INTRAPC3PC6PC7
PB[7:0]
OBFB
ACKB
INTRBPC0PC1PC2
PC4, 5
8255
Programming 8255 Mode 2:
— Port A is programmed to be bi-directional— Port C is for handshaking— Port B can be either input or output in mode 0 or mode 1
PA[7:0]
OBFA
ACKA
INTRA
PC4
PC6PC7
STBA
IBFA
PC0
PC3PC58255
PC0
PC0
PB[7:0]
In Out In OutIn Out
Mode 0
STBB OBFB IBFB ACKB
INTRB INTRB
Mode 1
1. Can you design a decoder for an 8255 chip such that its base address is 40H?2. Write the instructions that set 8255 into mode 0, port A as input, port B as output,
PC0-PC3 as input, PC4-PC7 as output ?
Timing diagram is a combination of the Mode 1 Strobed Input and Mode 1 Strobed Output Timing diagrams.
;send character to printer;send character to printerMOV AL, AH ;get dataMOV AL, AH ;get dataOUT PORTB, AL ;print dataOUT PORTB, AL ;print data; send data strobe to ; send data strobe to
printerprinterMOV AL, 8 ;clear DSMOV AL, 8 ;clear DSOUT CMD, ALOUT CMD, ALMOV AL, 9 ;clear DSMOV AL, 9 ;clear DSOUT CMD, ALOUT CMD, AL;rising the data at the ;rising the data at the
positive edge of DSpositive edge of DSRETRET
PRINT ENDPPRINT ENDP
Example: Mode 1 outputExample: Mode 1 output
Keyboard example 1/2Keyboard example 1/2
Keyboard example 2/2Keyboard example 2/2
Programmable Timer 8254 Programmable Timer 8254
8254 Programming 8254 Programming
8254 Programming 8254 Programming
Each counter may be programmed Each counter may be programmed with a count of 1 to FFFFH. with a count of 1 to FFFFH. • Minimum count is 1 all modes except 2 Minimum count is 1 all modes except 2
and 3 with minimum count of 2. and 3 with minimum count of 2. Each counter has a program control Each counter has a program control
word used to select the way the word used to select the way the counter operates. counter operates. • If two bytes are programmed, then the If two bytes are programmed, then the
first byte (LSB) stops the count, and the first byte (LSB) stops the count, and the second byte (MSB) starts the counter with second byte (MSB) starts the counter with the new count.the new count.
8254 Read Back Command
8254 Read Back Command
1 1 COUNT STATUS CNT2 CNT1 CNT0 0
NULL COUNT: goes low when the new count written to a counter is actually loaded into the counter
8254 status word format
OUTPUTNULL
COUNT RW1 RW0 M2 M1 M0 BCD
8254 Modes8254 Modes
Mode 0: An events counter enabled with G. Mode 0: An events counter enabled with G. • The output becomes a logic 0 when the control word is The output becomes a logic 0 when the control word is
written and remains there until N plus the number of written and remains there until N plus the number of programmed counts. programmed counts.
Mode 1: One-shot mode. Mode 1: One-shot mode. • The G input triggers the counter to output a 0 pulse for The G input triggers the counter to output a 0 pulse for
`count' clocks. `count' clocks. • Counter reloaded if G is pulsed again. Counter reloaded if G is pulsed again.
8254 Modes8254 Modes
Mode 2: Counter generates a series of pulses 1 clock pulse Mode 2: Counter generates a series of pulses 1 clock pulse wide. wide. • The seperation between pulses is determined by the count. The seperation between pulses is determined by the count. • The cycle is repeated until reprogrammed or G pin set to 0. The cycle is repeated until reprogrammed or G pin set to 0.
• Mode 3: Generates a continuous square-wave with G set to 1. Mode 3: Generates a continuous square-wave with G set to 1. If count is even, 50% duty cycle otherwise OUT is high 1 cycle If count is even, 50% duty cycle otherwise OUT is high 1 cycle
longer. longer.
8254 Modes8254 Modes
Mode 4: Software triggered one-shot Mode 4: Software triggered one-shot • (G must be 1). (G must be 1).
Mode 5: Hardware triggered one-Mode 5: Hardware triggered one-shot. G controls similar to Mode 1. shot. G controls similar to Mode 1.