GSM Based Voting Machine

CHAPTER 1

INTRODUCTION

In democratic societies, voting is an important tool to collect and re-act

people’s opinion. Traditionally, voting is conducted in centralized or distributed

places called voting booths. Voters go to voting booths and cast their votes under the

supervision of authorized parties. The votes are then counted manually once the

election has finished. With the rapid development of computer technology and

cryptographic methods, electronic voting systems can be employed that replace the

incident and most importantly error-prone human Component. To increase the

efficiency and accuracy of voting procedures, computerized voting systems were

developed to help collecting and counting the votes. These include Lever Voting

Machines, Punched Cards for Voting, Optical Mark-Sense Scanners and Direct

Recording Electronic (DRE) voting systems.

The term e-voting is defined as any voting method where the voter‘s intention

is expressed or collected by electronic means. E-Voting has been performed recently

in some nations and regions. In an e-voting by touch screen, a voter directly selects

candidates or the vote content appeared on a screen as the finger. This voting with fast

counting time has also a problem that voters go to the polling place. In the meantime,

an e-voting using internet has no inconvenience that voters should visit the voting

booth. However, this voting is executed just in the environment with internet

accessible computer.

For a variety of reasons, voters may be unable to attend voting booths

physically, but need to vote remotely, for example, from home or while traveling

abroad. Hence, there is great demand for remote voting procedures that are easy,

transparent, and, most importantly, secure.

In this project, we Endeavour to improve mobility and address security

problems of remote voting procedures and systems. We present an electronic voting

scheme using GSM. With more than one billion users, the GSM authentication

infrastructure is the most widely deployed authentication mechanism by far. We make

use of this well-designed GSM authentication infrastructure to improve mobility and

security of mobile voting procedures.

An e-voting system that allows a voter to be identified using a wireless

certificate without additionally registering when a user votes using his mobile

terminal such as a cellular phone.. We also present a method that ensures the

anonymity of voter and the confidentiality of vote content. By our mobile voting

system, a voter can cast his vote more easily and conveniently than the existing e-

voting using internet, within the scheduled time period anywhere even when a voter is

not able to access internet on a voting day. Our proposal can be applied not only to

presidential election but also to any votes such as a national assembly election or a

local election.

Here is the Percentage of Voting From 1952 to 2004 of Lok sabha Election:

First 1952 61.02%

Second 1957 62.09%

Third 1962 55.42%

Fourth 1967 61.33%

Fifth 1971 55.29%

Sixth 1977 60.49%

Seventh 1980 56.92%

Eight 1984 63.56%

Ninth 1989 61.15%

Tenth 1991 56.93%

Eleventh 1998 61.97%

Twelfth 1999 59.99%

Thirteen 2004 57.65%

Here we can see that average voting rate is approximately 50 to 60 percentages.

Consider the case if any one registered voter in his/her home state that is

Goa, if he need to register himself in Bangalore he need to prove that he is a resident

there. However, he lives as a paying guest; he has no proof of residence, so registering

himself in Bangalore is not an option. Importantly he is not acquainted with the

political scenario there and so even if he had an opportunity to vote he would not

know whom to vote for, except make a choice along party lines, that too the national

ones only, most of us people from outside the State hardly know the regional parties.

So in effect, he would be able to make the best choice if he was to vote in Goa.

Metropolitan cities consists of millions of people, from all parts of the country,

a large majority of them are a floating population like above case , working one state

but with no political id entity. Therefore, there is need of remote voting system to

increase the voting rate.

CHAPTER 2

LITERATURE OVERVIEW

More than 700 GSM mobile networks have been established in Europe, the

North America, South America, Iceland, Asia, Africa and Australasia up until now,

woven together by international roaming agreements and a common bond called the

"Memorandum of Understanding" (MOU) which defines the GSM standards and the

different phases of its world-wide implementation.

1982 - The Beginning

Nordic Telecom and Netherlands PTT propose to CEPT(Conference of

European Post and Telecommunications) the development of a new digital

cellular standard that would cope with the ever a burgeoning demands on

European mobile networks.

The European Commission (EC) issues a directive which requires member states to

reserve frequencies in the 900 MHz band for GSM to allow for roaming.

1986

Main GSM radio transmission techniques are chosen

1987

September - 13 operators and administrators from 12 areas in the CEPT

GSM advisory group sign the charter GSM (Groupe Spéciale Mobile) MoU

"Club" agreement, with a launch date of 1 July 1991.

The original French name was later changed to Global System for Mobile

Communication, but the original GSM acronym stuck.

GSM spec drafted.

1989

The European Telecommunications Standards Institute (ETSI) defined GSM

as the internationally accepted digital cellular telephony standard

GSM becomes an ETSI technical committee

1990

Phase 1 GSM 900 specifications are frozen

DCS adaptation starts

Validation systems implemented

First GSM World congress in Rome with 650 Participants

1991

First GSM spec demonstrated

DCS specifications are frozen

GSM World Congress Nice has 690 Participants

1992

January - First GSM network operator is Oy Radiolinja Ab in Finland

December 1992 - 13 networks on air in 7 areas

GSM World Congress Berlin - 630 Participants

1993

GSM demonstrated for the first time in Africa at Telkom '93 in Cape Town

Roaming agreements between several operators established


GSM World Congress Lisbon with 760 Participants

Telkom '93 held in Cape Town. First GSM systems shown.

http://www.cellular.co.za/glossary.htm#sectE

1994

First GSM networks in Africa launched in South Africa

Phase 2 data/fax bearer services launched

Vodacom becomes first GSM network in the world to implement data/fax

GSM World Congress Athens with 780 Participants


1995

GSM MOU is formally registered as an Association registered in Switzerland

- 156 members from 86 areas.

GSM World Congress Madrid with 1400 Participants

December 1995 117 networks on air in 69 areas

Fax, data and SMS roaming started

GSM phase 2 standardization is completed, including adaptation for PCS

1900 (PCS)

First PCS 1900 network live 'on air' in the USA

Telecom '95 Geneva - Nokia shows 33.6 kbps multimedia data via GSM

Namibia goes on-line

Ericsson 337 wins GSM phone of the year

US FCC auctions off PCS licenses

1996

GSM MoU is formally registered as an Association registered in Switzerland

December 1996 120 networks on air in 84 areas

GSM World Congress in Cannes

GSM MoU Plenary held in Atlanta GA, USA

8K SIM launched

Pre-Paid GSM SIM Cards launched

Bundled billing introduced in South Africa

Libya goes on-line

Option International launches world's first GSM/Fixed-line modem

1997

Zimbabwe goes live

GSM World Congress Cannes 21/2/97

Mozambique goes live

Iridium birds launched

First dual-band GSM 900-1900 phone launched by Bosch

1998

Botswana GSM goes live

GSM World Congress Cannes (2/98)

Vodacom Introduces Free VoiceMail

MTN Gets Uganda Tender

GSM SIM Cracked in USA

Over 2m GSM 1900 users

MTN Gets Rwanda Tender

MTN follows with free voicemail

Rwanda GSM Live

First HSCSD trials in Singapore

Vodacom launches Yebo!Net 10/98

Iridium Live 11/98

First GSM Africa Conference (11/98)

125m GSM 900/1800/1900 users worldwide (12/98)

Option International launches FirstFone

MTN launches CarryOver minutes

1999

GSM Conference in Cannes 2/99

165m GSM 900/1800/1900 users worldwide

GPRS trials begin and USA and Scandanavia 1/99

WAP trials in France and Italy 1/99

CellExpo Africa 5/99

Eight Bidders for Third SA Cell License

GSM MoU Joins 3GPP

MTN SA Head of GSM MoU

First GPRS networks go live

Bluetooth specification v1.0 released

2000


By 12/2000 480m GSM 900/1800/1900 users worldwide

First GPRS networks roll out

Mobey Forum Launched

MeT Forum Launched

Location Interoperability Forum Launched

First GPRS terminals seen

Nokia releases SmartMessaging spec

SyncML spec released

2001


By 5/2001 500m GSM 900/1800/1900 users worldwide

16 billion SMS message sent in April 2001

500 million people are GSM users (4/01)

CHAPTER 3

DESCRIPTION OF THE PROJECT

The components used in the project are:

1. GSM modem2. ARM7 LPC2148 microcontroller3. LCD4. Power supply5. Personal computer

3.1 GSM MODEM

The GSM module is connected with the microcontroller through serial port.

Using ‘AT’ commands the SMS is transferred to the GSM module. The GSM module

converts the digital information into airborne signals. Through GSM network the

SMS is transferred to the required person’s hand phone. This system offers better

solution for the Bank security system and also it will help you to track the intruder.

GSM MODULE GSM has been the backbone of the phenomenal success in

mobile telecom over the last decade. Now, at the dawn of the era of true broadband

services, GSM continues to evolve to meet new demands. GSM is an open, non-

proprietary system that is constantly evolving. One of its great strengths is the

international roaming capability. This gives consumers seamless and same

standardized same number contact ability in more than 212 countries.

GSM satellite roaming has extended service access to areas where terrestrial

coverage is not available.GSM differs from first generation wireless systems in that it

uses digital technology and time division multiple access transmission methods.

Voice is digitally encoded via a unique encoder, which emulates the characteristics of

human speech. This method of transmission permits a very efficient data

rate/information content ratio.

Cellular mobile communication is based on the concept of frequency reuse.

That is, the limited spectrum allocated to the service is partitioned into, for example,

N non-overlapping channel sets, which are then assigned in a regular repeated pattern

to a hexagonal cell grid. The hexagon is just a convenient idealization that

approximates the shape of a circle (the constant signal level contour from an omni

directional antenna placed at the center) but forms a grid with no gaps or overlaps.

The choice of N is dependent on many tradeoffs involving the local propagation

environment, traffic distribution, and costs. The propagation environment determines

the interference received from neighboring co-channel cells, which in turn governs the

reuse distance, that is, the distance allowed between co-channel cells (cells using the

same set of frequency channels).

The cell size determination is usually based on the local traffic distribution

and demand. The more the concentration of traffic demand in the area, the smaller the

cell has to be sized in order to avail the frequency set to a smaller number of roaming

subscribers and thus limit the call blocking probability within the cell. On the other

hand, the smaller the cell is sized, the more equipment will be needed in the system as

each cell requires the necessary transceiver and switching equipment, known as the

base station subsystem(BSS), through which the mobile users access the network over

radio links.

The degree to which the allocated frequency spectrum is reused over the

cellular service area, however, determines the spectrum efficiency in cellular systems.

That means the smaller the cell size, and the smaller the number of cells in the reuse

geometry, the higher will be the spectrum usage efficiency. Since digital modulation

systems can operate with a smaller signal to noise (i.e., signal to interference) ratio for

the same service quality, they, in one respect, would allow smaller reuse distance and

thus provide higher spectrum efficiency.

This is one advantage the digital cellular provides over the older analogue

cellular radio communication systems. It is worth mentioning that the digital systems

have commonly used sectored cells with 120-degree or smaller directional antennas to

further lower the effective reuse distance. This allows a smaller number of cells in the

reuse pattern and makes a larger fraction of the total frequency spectrum available

within each cell. Currently, research is being done on implementing other

enhancements such as the use of dynamic channel assignment strategies for raising

the spectrum efficiency in certain cases, such as high uneven traffic distribution over

cells

3.1.1. GSM SPECIFICATION:

Device Name: Wavecom

ROM (Flash): 16MbRAM: 2Mb

Operating Voltage: 3.1 – 4.5 V

Receiving Frequency: 925 – 960 MHz

Transmitting Frequency: 880 – 915 MHz

3.1.2. GSM NETWORK

A GSM network is composed of several functional entities, whose functions

and interfaces are specified. The GSM network can be divided into three broad parts.

The Mobile Station is carried by the subscriber. The Base Station Subsystem controls

the radio link with the Mobile Station. The Network Subsystem, the main part of

which is the Mobile services Switching Center (MSC), performs the switching of calls

between the mobile users, and between mobile and fixed network users.

The MSC also handles the mobility management operations. Not shown is the

operations and Maintenance Center, which oversees the proper operation and setup of

the network. The Mobile Station and the Base Station Subsystem communicate across

the Um interface, also known as the air interface or radio link. The Base Station

Subsystem communicates with the Mobile services Switching Center across the A

interface.

Mobile Station:

Mobile Equipment (ME) such as hand portable and vehicle mounted unit.

Subscriber Identity Module (SIM), which contains the entire customer related

information (identification, secret key for authentication, etc.). The SIM is a small

smart card, which contains both programming and information. The A3and A8

algorithms are implemented in the Subscriber Identity Module (SIM).Subscriber

information, such as the IMSI (International Mobile Subscriber Identity), is stored in

the Subscriber Identity Module (SIM). The Subscriber Identity Module (SIM) can be

used to store user-defined information such as phone book entries.

One of the advantages of the GSM architecture is that the SIM may be moved

from one Mobile Station to another. This makes upgrades very simple for the GSM

telephone user. The use of SIM card is mandatory in the GSM world, whereas the

SIM (RUIM) is not very popular in the CDMA world.

Base Station Subsystem (BSS): All radio-related functions are performed in the

BSS, which consists of base Station controllers (BSCs) and the base transceiver

stations (BTSs).

The Base Transceiver Station (BTS) contains the equipment for transmitting

and receiving of radio signals (transceivers), antennas, and equipment for encrypting

and decrypting communications with the Base Station Controller (BSC). A group of

BTSs are controlled by a BSC. Typically a BTS for anything other than a microcell

will have several transceivers (TRXs), which allow it to serve several different

frequencies and different sectors of the cell (in the case of sectorized base stations). A

BTS is controlled by a parent BSC via the Base Station Control Function (BCF). The

BCF is implemented as a discrete unit or even incorporated in a TRX in compact base

stations. The BCF provides an Operations and Maintenance (O&M) connection to the

Network Management System (NMS), and manages operational states of each TRX,

as well as software handling and alarm collection.

The BSC controls multiple BTSs and manages radio channel setup, and

handovers. The BSC is the connection between the Mobile Station and Mobile

Switching Center. The Base Station Controller (BSC) provides, classically, the

intelligence behind the BTSs. Typically a BSC has 10s or even 100s of BTS under its

control. The BSC handles allocation of radio channels, receives measurements from

the mobile phones, and controls handovers from BTS to BTS. A key function of the

BSC is to act as a concentrator where many different low capacity connections to

BTSs become reduced to a smaller number of connections towards the Mobile

Switching Center (MSC) (with a high level of utilization). Overall, this means that

networks are often structured to have many BSCs distributed into regions near their

BTSs which are then connected to large centralized MSC sites.

Network Switching Subsystem (NSS):

Network Switching Subsystem is the component of a GSM system that carries

out switching functions and manages the communications between mobile phones and

the Public Switched Telephone Network. It is owned and deployed by mobile phone

operators and allows mobile phones to communicate with each other and telephones

in the wider telecommunications network. The architecture closely resembles a

telephone exchange, but there are additional functions which are needed because the

phones are not fixed in one location. There is also overlay architecture on the GSM

core network to provide packet-switched data services and is known as the GPRS core

network. This allows mobile phones to have access to services such as WAP, MMS,

and Internet access. All mobile phones manufactured today have both circuit and

packet based services, so most operators have a GPRS network in addition to the

standard GSM core network.

The Mobile Switching Centre or MSC is a sophisticated telephone exchange,

which provides circuit-switched calling, mobility management, and GSM services to

the mobile phones roaming within the area that it serves. This means voice, data and

fax services, as well as SMS and call divert.

In the GSM mobile phone system, in contrast with earlier analogue services,

fax and data information is sent directly digitally encoded to the MSC. Only at the

MSC is this re-coded into an "analogue" signal. There are various different names for

MSCs in different context, which reflects their complex role in the network; all of

these terms though could refer to the same MSC, but doing different things at

different times. A Gateway MSC is the MSC that determines which visited MSC the

subscriber who is being called is currently located. It also interfaces with the Public

Switched Telephone Network.

All mobile to mobile calls and PSTN to mobile calls are routed through a

GMSC. The term is only valid in the context of one call since any MSC may provide

both the gateway function and the Visited MSC function; however, some

manufacturers design dedicated high capacity MSCs which do not have any BSCs

connected to them. These MSCs will then be the Gateway MSC for many of the calls

they handle.

The Visited MSC is the MSC where a customer is currently located. The VLR

associated with this MSC will have the subscriber's data in it. The Anchor MSC is the

MSC from which a handover has been initiated. The Target MSC is the MSC toward

which a Handover should take place. An MSC Server is a part of the redesigned MSC

concept starting from 3GPP Release

3.1.3. FREQUENCY BAND USAGE:

Since radio spectrum is a limited resource shared by all users, a method must

be devised to divide up the bandwidth among as many users as possible. The method

chosen by GSM is a combination of Time and Frequency-Division Multiple Access

(TDMA/FDMA). The FDMA part involves the division by frequency of the

(maximum) 25 MHz bandwidth into 124 carrier frequencies spaced 200 kHz apart.

One or more carrier frequencies are assigned to each base station. Each of these

carrier frequencies is then divided in time, using a TDMA scheme.

The fundamental unit of time in this TDMA scheme is called a burst period

and it lasts 15/26 ms (or approx. 0.577 ms). Eight burst periods are grouped into a

TDMA frame (120/26 ms, or approx. 4.615 ms), which forms the basic unit for the

definition of logical channels. One physical channel is one burst period per TDMA

frame.

Channels are defined by the number and position of their corresponding burst

periods. All these definitions are cyclic, and the entire pattern repeats approximately

every 3 hours. Channels can be divided into dedicated channels, which are allocated

to a mobile station, and common channels, which are used by mobile stations in idle

mode. A traffic channel (TCH) is used to carry speech and data traffic. Traffic

channels are defined using a 26-framemultiframe, or group of 26 TDMA frames. The

length of a 26-frame multi frame is 120 ms, which is how the length of a burst period

is defined (120 ms divided by 26 frames divided by 8 burst periods per frame). Out of

the 26 frames, 24 are used for traffic, 1 is used for the Slow Associated Control

Channel (SACCH) and 1 is currently unused.

TCHs for the uplink and downlink are separated in time by 3 burst periods, so

that the mobile station does not have to transmit and receive simultaneously, thus

simplifying the electronics. In addition to these full-rate TCHs, there are also half-rate

TCHs defined, although they are not yet implemented. Half-rate TCHs will

effectively double the capacity of a system once half-rate speech codes are specified

(i.e., speech coding at around 7 kbps, instead of 13 kbps). Eighth-rate TCHs are also

specified, and are used for signaling. In the recommendations, they are called Stand-

alone Dedicated Control Channels (SDCCH).

Organization of bursts, TDMA frames, and multi frames for speech and data

GSM is a digital system, so speech which is inherently analog, has to be digitized.

The method employed by ISDN, and by current telephone systems for multiplexing

voice lines over high speed trunks and optical fiber lines, is Pulse Coded Modulation

(PCM).

The output stream from PCM is 64 kbps, too high rate to be feasible over a

radio link. The 64 kbps signal, although simple to implement, contains much

redundancy. The GSM group studied several speech coding algorithms on the basis of

subjective speech quality and complexity(which is related to cost, processing delay,

and power consumption once implemented) before arriving at the choice of a Regular

Pulse Excited – Linear Predictive Coder (RPE--LPC) with a Long Term Predictor

loop.

Basically, information from previous samples, which does not change very

quickly, issued to predict the current sample. The coefficients of the linear

combination of the previous samples, plus an encoded form of the residual, the

difference between the predicted and actual sample, represent the signal. Speech is

divided into 20 millisecond samples, each of which is encoded as 260 bits, giving a

total bit rate of 13 kbps. This is the so-called Full-Rate speech coding.

3.2. ARM7 LPC2148 MICROCONTROLLER

The LPC2141/2/4/6/8 microcontrollers are based on a 32/16 bit ARM7TDMI-

S CPU with real-time emulation and embedded trace support, that combines the

microcontroller with embedded high speed flash memory ranging from 32 kB to 512

kB.

FEAUTRES:

16/32-bit ARM7TDMI-S microcontroller in a tiny LQFP64 package.

8 to 40 kB of on-chip static RAM and 32 to 512 kB of on-chip flash program

memory. 128 bit wide interface/accelerator enables high speed 60 MHz

operation.

In-System/In-Application Programming (ISP/IAP) via on-chip boot-loader

software. Single flash sector or full chip erase in 400 ms and programming of

256 bytes in 1ms.

Embedded ICE RT and Embedded Trace interfaces offer real-time debugging

with the on-chip Real Monitor software and high speed tracing of instruction

execution.

USB 2.0 Full Speed compliant Device Controller with 2 kB of endpoint RAM.

In addition, the LPC2146/8 provides 8 kB of on-chip RAM accessible to USB

by DMA.

One or two (LPC2141/2 vs. LPC2144/6/8) 10-bit A/D converters provide a

total of 6/14 Analog inputs, with conversion times as low as 2.44 μs per

channel.

Single 10-bit D/A converter provides variable analog output.

Two 32-bit timers/external event counters (with four captures and four

compare Channels each), PWM unit (six outputs) and watchdog.

Low power real-time clock with independent power and dedicated 32 kHz

clock input.

Multiple serial interfaces including two UARTs (16C550), two Fast I2C-bus

(400 kbit/s), SPI and SSP with buffering and variable data length capabilities.

Vectored interrupt controller with configurable priorities and vector addresses.

Up to 45 of 5 V tolerant fast general purpose I/O pins in a tiny LQFP64

package.

Up to nine edge or level sensitive external interrupt pins available.

60 MHz maximum CPU clock available from programmable on-chip PLL

with settling time of 100 μs.

On-chip integrated oscillator operates with an external crystal in range from 1

MHz to 30 MHz and with an external oscillator up to 50 MHz

Power saving modes include idle and Power-down.

Individual enable/disable of peripheral functions as well as peripheral clock

scaling for additional power optimization.

Processor wake-up from Power-down mode via external interrupt, USB,

Brown-Out Detect (BOD) or Real-Time Clock (RTC).

Single power supply chip with Power-On Reset (POR) and BOD circuits:

CPU operating voltage range of 3.0 V to 3.6 V (3.3 V ± 10 %) with 5 V

tolerant I/O Pads.

3.2.1. APPLICATIONS:

• Industrial control

• Medical systems

• Access control

• Point-of-sale

• Communication gateway

• Embedded soft modem

• General purpose application

3.2.1. LPC2148 PIN DESCRIPTION

PORT0:

Port 0 is a 32-bit I/O port with individual direction controls for each bit. Total

of 28 pins of the Port 0 can be used as a general purpose bi-directional digital I/Os

while P0.31 provides digital output functions only. The operation of port 0 pins

depends upon the pin function selected via the pin connect block. Pins P0.24, P0.26

and P0.27 are not available.

P0.0/TXD/PWM1:

It is he 19th pin. Acts as a general purpose digital input/output. TXD0 is

transmitter output for UART0.PWM1 is pulse width modulator output 1

P0.1/RxD0/PWM3/EINT0: It is he 21st pin.

RxD0 — Receiver input for UART0

PWM3 — Pulse Width Modulator output 3

EINT0 — External interrupt 0 input

P0.2/SCL0/CAP0.0: It is the 22nd pin

SCL0 — I2C0 clock input/output. Open drain output (for I2C compliance)

CAP0.0 — Capture input for Timer 0, channel 0

P0.3/SDA0/MAT0.0/EINT1: It is the 26th pin

SDA0 — I2C0 data input/output. Open drain output (for I2C compliance)

MAT0.0 — Match output for Timer 0, channel 0


P0.4/SCK0/CAP0.1/AD0.6:It is 27th pin

SCK0 — Serial clock for SPI0. SPI clock output from master or input to slave


AD0.6 — A/D converter 0, input 6. This analog input is always connected to its

pin

P0.5/MISO0/MAT0.1/AD0.7: It is 29th pin

MISO0 — Master In Slave OUT for SPI0. Data input to SPI master or data output

from SPI slave

MAT0.1 — Match output for Timer 0, channel 1

AD0.7 — A/D converter 0, input 7. This analog input is always connected to its pin

P0.6/MOSI0/CAP0.2/AD1.0: It is 30th pin

MOSI0 — Master Out Slave in for SPI0. Data output from SPI master or data input to

SPI slave


AD1.0 — A/D converter 1, input 0. This analog input is always connected to its pin.

P0.7/SSEL0/PWM2/EINT2: It is 31st pin

EL0 — Slave Select for SPI0. Selects the SPI interface as a slave



P0.8/TXD1/PWM4/AD1.1: It is 33rd pin

TXD1 — Transmitter output for UART1



P0.9/RxD1/PWM6/EINT3:It is 34th pin

RxD1 — Receiver input for UART1



P0.10/RTS1/CAP1.0/AD1.2:It is 35th pin

RTS1 — Request to send output for UART1. This pin is available in LPC2144/6/8

only.



P0.11/CTS1/CAP1.1/SCL1:It is 37th pin

CTS1 — Clear to Send input for UART1. This pin is available in LPC2144/6/8 only.

CAP1.1 — Capture input for Timer 1, channel 1.

SCL1 — I2C1 clock input/output. Open drain output (for I2C compliance)

P0.12/DSR1/MAT1.0/AD1.3:It is 38th pin

DSR1 — Data Set Ready input for UART1. This pin is available in LPC2144/6/8

only.

MAT1.0 — Match output for Timer 1, channel 0.

AD1.3 — A/D converter input 3. This analog input is always connected to its pin.

P0.13/DTR1/MAT1.1/AD1.4:It is 39th pin

DTR1 — Data Terminal Ready output for UART1. This pin is available in

LPC2144/6/8 only.


AD1.4 — A/D converter input 4. This analog input is always connected to its pin.

P0.14/DCD1/EINT1/SDA1:It is 41st pin

DCD1 — Data Carrier Detect input for UART1. This pin is available in LPC2144/6/8

only.


SDA1 — I2C1 data input/output. Open drain output (for I2C compliance)

Note: LOW on this pin while RESET is LOW forces on-chip boot-loader to take over

Control of the part after reset.

P0.15/RI1/EINT2/AD1.5:It is 45th pin

RI1 — Ring Indicator input for UART1.

EINT2 — External interrupt 2 input.


P0.16/EINT0/MAT0.2/CAP0.2:It is 46th pin




P0.17/CAP1.2/SCK1/MAT1.2:It is 47th pin


SCK1 — Serial Clock for SSP. Clock output from master or input to slave.


P0.18/CAP1.3/MISO1/MAT1.3:It is 53rd pin


MISO1 — Master in Slave Out for SSP. Data input to SPI master or data output from

SSP slave.


P0.19/MAT1.2/MOSI1/CAP1.2:It is 54th pin


MOSI1 — Master out Slave In for SSP. Data output from SSP master or data input to

SSP slave.


P0.20/MAT1.3/SSEL1/EINT3:It is 55th pin


SSEL1 — Slave Select for SSP. Selects the SSP interface as a slave.


P0.21/PWM5/AD1.6/CAP1.3:It is the 1st pin

PWM5 — Pulse Width Modulator output 5.



P0.22/AD1.7/CAP0.0/MAT0.0: It is the 2nd pin.




P0.23/VBUS: It is he 58th pin.

VBUS — indicates the presence of USB bus power.

P0.25/AD0.4/Aout: It is the 9th pin


Aout — D/A converter output. Available in LPC2142/4/6/8 only.

P0.28/AD0.1/CAP0.2/MAT0.2: It is the 13th pin




P0.29/AD0.2/CAP0.3/MAT0.3:It is 14th pin


CAP0.3 — Capture input for Timer 0, Channel 3.


P0.30/AD0.3/EINT3/CAP0.0: It is 15th pin




P0.31: It is 15th pin. General purpose output only digital pin (GPO).

UP_LED — USB Good Link LED indicator. It is LOW when device is configured

(Non-control endpoints enabled). It is HIGH when the device is not

configured or during global suspend.

CONNECT — Signal used to switch an external 1.5 kΩ resistor under the software

Control (active state for this signal is LOW). Used with the Soft

Connect USB feature.

Note: This pin must not be externally pulled LOW when RESET pin is LOW or the

JTAG port will be disabled.

Port 1:

Port 1 is a 32-bit bi-directional I/O port with individual direction controls for

each bit. The operation of port 1 pins depends upon the pin function selected via the

pin connect block. Pins 0 through 15 of port 1 are not available.

P1.16/TRACEPKT0: It is 16th pin

P1.16 — General purpose digital input/output pin

TRACEPKT0 — Trace Packet, bit 0. Standard I/O port with internal pull-up.










P1.20/TRACESYNC: It is 48th pin


TRACESYNC — Trace Synchronization. Standard I/O port with internal pull-up.

Note: LOW on this pin while RESET is LOW enables pins P1.25:16 to operate as

Trace port after reset

P1.21/PIPESTAT0: It is 44th pin


PIPESTAT0 — Pipeline Status, bit 0. Standard I/O port with internal pull-up.







P1.24/TRACECLK: It is 32nd pin


TRACECLK — Trace Clock. Standard I/O port with internal pull-up.

P1.25/EXTIN0 : It is 28th pin


EXTIN0 — External Trigger Input. Standard I/O with internal pull-up.

P1.26/RTCK : It is 24th pin


RTCK — Returned Test Clock output. Extra signal added to the JTAG port. Assists

debugger synchronization when processor frequency varies. Bi-

directional pin with internal pull-up.

Note: LOW on this pin while RESET is LOW enables pins P1.31:26 to operate as

Debug port after reset

P1.27/TDO : It is 64th pin


TDO — Test Data out for JTAG interface.

P1.28/TDI: It is 60th pin


TDI — Test Data in for JTAG interface.

P1.29/TCK: It is 56th pin


TCK — Test Clock for JTAG interface. This clock must be slower than 1/6 of the

CPU clock (CCLK) for the JTAG interfacing to operate.

P1.30/TMS: It is 52nd pin


TMS — Test Mode Select for JTAG interface.

P1.31/TRST: It is 20th pin


TRST — Test Reset for JTAG interface.

D+: It is 10th pin. This pin is USB bidirectional D+ line.

D- : It is 11th pin. This pin is USB bidirectional D- line.

RESET: It is 57th pin.

External reset input: A LOW on this pin resets the device, causing I/O ports and

peripherals to take on their default states, and processor

execution to begin at address 0.TTL with hysteresis, 5 V

tolerant.

XTAL1: It is 62nd pin. Input to the oscillator circuit and internal clock generator

circuits.

XTAL2: It is 61st pin and is used to take output from the oscillator amplifier.

RTCX1: It is 3rd pin. Input to the RTC oscillator circuit. This pin can be left floating

if the RTC is not used.

RTCX2: It is 5th pin and is used to take output from the RTC oscillator circuit. This

pin can be left floating if the RTC is not used.

VSS: 6, 18, 25, 42, 50. Ground: 0 V reference

VSSA: It is 59th pin.

Analog Ground: 0 V reference. This should nominally be the same voltage as VSS,

but should be isolated to minimize noise and error. This pin must be grounded if the

ADC/DAC is not used.

VDD: 23, 43, 51

3.3 V Power Supply: This is the power supply voltage for the core and I/O ports.

VDDA: It is 7th pin.

Analog 3.3 V Power Supply: This should be nominally the same voltage as VDD but

should be isolated to minimize noise and error. This

voltage is used to power the ADC(s) and DAC

(where available). This pin must be tied to VDD

when the ADC/DAC is not used.

VREF: It is 63rd pin.

A/D Converter Reference: This should be nominally the same voltage as VDD but

should be isolated to minimize noise and error. Level

on this pin is used as a reference for A/D convertor and

DAC (where available). This pin must be tied to VDD

when the ADC/DAC is not used.

VBAT: It is 49th pin.

RTC Power Supply: 3.3 V on this pin supplies the power to the RTC

3.3. LCD

The most commonly used Character based LCDs are based on Hitachi's

HD44780 controller or other which are compatible with HD44580. In this, we will

discuss about character based LCDs, their interfacing with various microcontrollers,

various interfaces (8-bit/4-bit), programming, special stuff and tricks you can do with

these simple looking LCDs which can give a new look to your application.

LCDs are most commonly used because of their advantages over other display

technologies. They are thin and flat and consume very small amount of power

compared to LED displays and cathode ray tubes (CRTs).

3.3.1. Pin Description:

The most commonly used LCD’s found in the market today are 1 Line, 2 Line

or 4 Line LCDs which have only 1 controller and support at most of 80 characters,

whereas LCDs supporting more than 80 characters make use of 2 HD44780

controllers

The most commonly used LCD’s found in the market today are 1 Line, 2 Line

or 4 Line LCDs which have only 1 controller and support at most of 80 characters,

whereas LCDs supporting more than 80 characters make use of 2 HD44780

controllers.

Most LCDs with 1 controller has 14 Pins and LCDs with 2 controller has 16

Pins (two pins are extra in both for back-light LED connections).

Pin description is shown in the table below.

Table: 3.1. LCD pin description

Pin No. Name Description

Pin no. 1 VSS Power supply (GND)

Pin no. 2 VCC Power supply (+5V)

Pin no. 3 VEE Contrast adjust

Pin no. 4RS

0 = Instruction input

1 = Data input

Pin no. 5R/W

0 = Write to LCD module

1 = Read from LCD module

Pin no. 6 EN Enable signal

Pin no. 7 D0 Data bus line 0 (LSB)

Pin no. 8 D1 Data bus line 1






Pin no. 14 D7 Data bus line 7 (MSB)

DDRAM - Display Data RAM

Display data RAM (DDRAM) stores display data represented in 8-bit

character codes. Its extended capacity is 80 X 8 bits, or 80 characters. The area in

display data RAM (DDRAM) that is not used for display can be used as general data

RAM. So whatever you send on the DDRAM is actually displayed on the LCD. For

LCDs like 1x16, only 16 characters are visible, so whatever you write after 16 chars is

written in DDRAM but is not visible to the user.

http://www.8051projects.net/lcd-interfacing/basics.php


CGROM - Character Generator ROM

Now you might be thinking that when you send an ASCII value to DDRAM,

how the character is displayed on LCD? So the answer is CGROM. The character

generator ROM generates 5 x 8 dot or 5 x 10 dot character patterns from 8-bit

character codes (see Figure 5 and Figure 6 for more details). It can generate 208 5 x 8

dot character patterns and 32 5 x 10 dot character patterns. User defined character

patterns are also available by mask-programmed ROM.

As you can see in both the code maps, the character code from 0x00 to 0x07 is

occupied by the CGRAM characters or the user defined characters. If user wants to

display the fourth custom character then the code to display it is 0x03 i.e. when user

sends 0x03 code to the LCD DDRAM then the fourth user created character or pattern

will be displayed on the LCD.

CGRAM - Character Generator RAM

As clear from the name, CGRAM area is used to create custom characters in

LCD. In the character generator RAM, the user can rewrite character patterns by

program. For 5 x 8 dots, eight character patterns can be written, and for 5 x 10 dots,

four character patterns can be written.

BF - Busy Flag

Busy Flag is a status indicator flag for LCD. When we send a command or

data to the LCD for processing, this flag is set (i.e. BF =1) and as soon as the

instruction is executed successfully this flag is cleared (BF = 0). This is helpful in

producing and exact amount of delay for the LCD processing.

To read Busy Flag, the condition RS = 0 and R/W = 1 must be met and The

MSB of the LCD data bus (D7) act as busy flag. When BF = 1 means LCD is busy

and will not accept next command or data and BF = 0 means LCD is ready for the

next command or data to process.

Instruction Register (IR) and Data Register (DR)

There are two 8-bit registers in HD44780 controller Instruction and Data

register. Instruction register corresponds to the register where you send commands to


LCD e.g. LCD shift command, LCD clear, LCD address etc. and Data register is used

for storing data which is to be displayed on LCD. When send the enable signal of the

LCD is asserted, the data on the pins is latched in to the data register and data is then

moved automatically to the DDRAM and hence is displayed on the LCD. Data

Register is not only used for sending data to DDRAM but also for CGRAM, the

address where you want to send the data, is decided by the instruction you send to

LCD.

Commands and Instruction set Only the instruction register (IR) and the data register (DR) of the LCD can be

controlled by the MCU. Before starting the internal operation of the LCD, control

information is temporarily stored into these registers to allow interfacing with various

MCUs, which operate at different speeds, or various peripheral control devices. The

internal operation of the LCD is determined by signals sent from the MCU. These

signals, which include register selection signal (RS), read/write signal (R/W), and the

data bus (DB0 to DB7), make up the LCD instructions. There are four categories of

instruction sets:

Designate LCD functions, such as display format, data length, etc.

Set internal RAM address

Perform data transfer with Internal RAM

Performs miscellaneous functions

3.3.2. LCD initialization

Before using the LCD for display purpose, LCD has to be initialized either by

the internal reset circuit or sending set of commands to initialize the LCD. It is the

user who has to decide whether an LCD has to be initialized by instructions or by

internal reset circuit.

Table: 4.2 LCD Instructions

Instruction HEX DECFunction Set: 8-bit, 1 Line, 5x7 Dots 0x30 48


Function Set: 8-bit, 2 Line, 5x7 Dots 0x38 56Function Set: 4-bit, 1 Line, 5x7 Dots 0x20 32Function Set: 4-bit, 2 Line, 5x7 Dots 0x28 40Entry Mode 0x06 6Display (clearing display without clearing DDRAM content) 0x08 8Display on Cursor on 0x0E 14Display on Cursor off 0x0C 12Display on Cursor blinking 0x0F 15Shift entire display left 0x18 24Shift entire display right 0x1C 30Move cursor left by one character 0x10 16Move cursor right by one character 0x14 20Clear Display (also clear DDRAM content) 0x01 1Set DDRAM address or cursor position on display 0x80+add 128+addSet CGRAM address or set pointer to CGRAM location 0x40+add 64+add

4-bit programming of LCD There are many reasons why sometime we prefer to use LCD in 4-bit mode

instead of 8-bit. One basic reason is lesser number of pins are needed to interface

LCD.

In 4-bit mode the data is sent in nibbles, first we send the higher nibble and

then the lower nibble. To enable the 4-bit mode of LCD, we need to follow special

sequence of initialization that tells the LCD controller that user has selected 4-bit

mode of operation. We call this special sequence as resetting the LCD. Following is

the reset sequence of LCD.

Wait for about 20mS

Send the first init value (0x30)

Wait for about 10mS

Send second init value (0x30)

Wait for about 1mS

Send third init value (0x30)

Wait for 1mS

Select bus width (0x30 - for 8-bit and 0x20 for 4-bit)

Wait for 1mS

The busy flag will only be valid after the above reset sequence. Usually we do

not use busy flag in 4-bit mode as we have to write code for reading two nibbles from

the LCD. Instead we simply put a certain amount of delay usually 300 to 600uS. This

delay might vary depending on the LCD you are using, as you might have a different

crystal frequency on which LCD controller is running. So it actually depends on the

LCD module you are using.

In 4-bit mode, we only need 6 pins to interface an LCD. D4-D7 are the data

pins connection and Enable and Register select are for LCD control pins. We are not

using Read/Write (RW) Pin of the LCD, as we are only writing on the LCD so we

have made it grounded permanently. If you want to use it, then you may connect it on

your controller but that will only increase another pin and does not make any big

difference. Potentiometer RV1 is used to control the LCD contrast. The unwanted

data pins of LCD i.e. D0-D3 are connected to ground.

Sending data/command in 4-bit Mode

We will now look into the common steps to send data/command to LCD when

working in 4-bit mode. In 4-bit mode data is sent nibble by nibble, first we send

higher nibble and then lower nibble. This means in both command and data sending

function we need to separate the higher 4-bits and lower 4-bits.

The common steps are:

Mask lower 4-bits

Send to the LCD port

Send enable signal

Mark higher 4-bits

Send to LCD port

Send enable signal

http://www.8051projects.net/lcd-interfacing/lcd-4-bit.php

3.4. REGULATED POWER SUPPLY

Regulated power supply

There are many types of power supply. Most are designed to convert high

voltage AC mains electricity to a suitable low voltage supply for electronic circuits

and other devices. A power supply can by broken down into a series of blocks, each

of which performs a particular function. For example a 5V regulated supply can be

shown as above

Transformer: A transformer steps down high voltage AC mains to low voltage

AC. Here we are using a center-tap transformer whose output will be sinusoidal

with 36volts peak to peak value.

Fig: 5.3 Output Waveform of transformer

The low voltage AC output is suitable for lamps, heaters and special

AC motors. It is not suitable for electronic circuits unless they include a

rectifier and a smoothing capacitor. The transformer output is given to the

rectifier circuit.

Rectifier:

A rectifier converts AC to DC, but the DC output is varying. There

are several types of rectifiers; here we use a bridge rectifier.

The Bridge rectifier is a circuit, which converts an ac voltage to dc

voltage using both half cycles of the input ac voltage. The Bridge rectifier

circuit is shown in the figure. The circuit has four diodes connected to form a

bridge. The ac input voltage is applied to the diagonally opposite ends of the

bridge. The load resistance is connected between the other two ends of the

bridge.

For the positive half cycle of the input ac voltage, diodes D1 and D3

conduct, whereas diodes D2 and D4 remain in the OFF state. The conducting

diodes will be in series with the load resistance RL and hence the load current

flows through RL.

For the negative half cycle of the input ac voltage, diodes D2 and D4

conduct whereas, D1 and D3 remain OFF. The conducting diodes D2 and D4

will be in series with the load resistance RL and hence the current flows through

RL in the same direction as in the previous half cycle. Thus a bi-directional

wave is converted into unidirectional.

Figure 5.4 Rectifier circuit

Now the output of the rectifier shown in Figure 3.3 is shown in below Figure

The varying DC output is suitable for lamps, heaters and standard motors. It is

not suitable for lamps, heaters and standard motors. It is not suitable for

electronic circuits unless they include a smoothing capacitor.

Smoothing: The smoothing block smoothes the DC from varying greatly to a small

ripple and the ripple voltage is defined as the deviation of the load voltage from its

DC value. Smoothing is also named as filtering.

Filtering is frequently effected by shunting the load with a capacitor. The

action of this system depends on the fact that the capacitor stores energy during the

conduction period and delivers this energy to the loads during the no conducting

period. In this way, the time during which the current passes through the load is

prolonging Ted, and the ripple is considerably decreased. The action of the capacitor

is shown with the help of waveform.

Figure 5.5 Smoothing action of capacitor

Fig: 5.6 Waveform of the rectified output smoothing

Regulator:

Regulator eliminates ripple by setting DC output to a fixed voltage. Voltage

regulator ICs are available with fixed (typically 5V, 12V and 15V) or variable output

voltages. Negative voltage regulators are also available.

Many of the fixed voltage regulator ICs has 3 leads (input, output and high

impedance). They include a hole for attaching a heat sink if necessary. Zener diode is

an example of fixed regulator

The MC78XX/LM78XX/MC78XXA series of three terminal positive

regulators are available in the TO-220/D-PAK package and with several fixed output

voltages, making them useful in a wide range of applications. Each type employs

internal current limiting, thermal shut down and safe operating area protection,

making it essentially indestructible. If adequate heat sinking is provided, they can

deliver over 1A output current. Although designed primarily as fixed voltage

regulators, these devices can be used with external components to obtain adjustable

voltages and currents.

Part pin out of LM7805 showing its constant voltage reference

Fig: 5.7:LM705 voltage regulator LM7805 is the standard part number for an integrated three-terminal adjustable

linear voltage regulator. LM7805 is a positive voltage regulator supporting input

voltage of 3V to 40V and output voltage between 1.25V and 37V. A typical current

rating is 1.5A although several lower and higher current models are available.

Variable output voltage is achieved by using a potentiometer or a variable voltage

from another source to apply a control voltage to the control terminal. LM7805 also

has a built-in current limiter to prevent the output current from exceeding the rated

current, and LM7805 will automatically reduce its output current if an overheat

condition occurs under load. LM7805 is manufactured by many companies, including

National Semiconductor, Fairchild Semiconductor, and STMicroelectronics.

Although LM7805 is an adjustable regulator, it is sometimes preferred for

high-precision fixed voltage applications instead of the similar LM78xx devices

because the LM7805 is designed with superior output tolerances. For a fixed voltage

application, the control pin will typically be biased with a fixed resistor network, a

Zener diode network, or a fixed control voltage from another source. Manufacturer

datasheets provide standard configurations for achieving various design applications,

including the use of a pass transistor to achieve regulated output currents in excess of

what the LM7805 alone can provide.

LM7805 is available in a wide range of package forms for different

applications including heat sink mounting and surface-mount applications. Common

form factors for high-current applications include TO-220 and TO-3. LM7805 is

capable of dissipating a large amount of heat at medium to high current loads and the

use of a heat sink is recommended to maximize the lifespan and power-handling

capability. LM7905 is the negative voltage complement to LM7805 and the

specifications and function are essentially identical, except that the regulator must

receive a control voltage and act on an input voltage that are below the ground

reference point instead of above it.

Transformer + Rectifier + Smoothing + Regulator:

Fig:5.8: Bridge rectifier

RS-232:

Below is the pinout of a typical standard male 9-pin RS232 connector, this

connector type is also referred to as a DB9 connector.

A computer's serial COM port (DTE) is usually a male port as shown below, and any

peripheral devices you connect to this port usually has a female connector (DCE).

Pin SIG. Signal Name DTE (PC)1 DCD Data Carrier Detect in2 RXD Receive Data in3 TXD Transmit Data out4 DTR Data Terminal Ready out5 GND Signal Ground -6 DSR Data Set Ready in7 RTS Request to Send out8 CTS Clear to Send in9 RI Ring Indicator in

Fig: 5.9. RS232 diagram

TTL/CMOS Serial Logic Waveform

The diagram above shows the expected waveform from the UART

when using the common 8N1 format. 8N1 signifies 8 Data bits, No Parity and 1 Stop

Bit. The RS-232 line, when idle is in the Mark State (Logic 1). A transmission starts

with a start bit which is (Logic 0). Then each bit is sent down the line, one at a time.

The LSB (Least Significant Bit) is sent first. A Stop Bit (Logic 1) is then appended to

the signal to make up the transmission. The data sent using this method, is said to be

framed. That is the data is framed between a Start and Stop Bit.

RS-232 Voltage levels:

Send enable signal +3 to +25 volts to signify a "Space" (Logic 0)

3 to -25 volts for a "Mark" (logic 1).

Any voltage in between these regions (i.e. between +3 and -3 Volts) is undefined

The data byte is always transmitted least-significant-bit first. The bits are

transmitted at specific time intervals determined by the baud rate of the serial signal. This is the signal present on the RS-232 Port of your computer, shown below.

RS-232 Logic Waveform

RS-232 LEVEL CONVERTER:

Fig: 5.10: max 232 diagram

Standard serial interfacing of microcontroller (TTL) with PC or any RS232C

Standard device requires TTL to RS232 Level converter. A MAX232 is used for this

purpose. It provides 2-channel RS232C port and requires external 10uF capacitors.

The driver requires a single supply of +5V.

It is helpful to understand what occurs to the voltage levels. When a MAX232

IC receives a TTL level to convert, it changes a TTL Logic 0 to between +3 and

+15 V, and changes TTL Logic 1 to between -3 to -15 V, and vice versa for

converting from RS232 to TTL. This can be confusing when you realize that the

RS232 Data Transmission voltages at a certain logic state are opposite from the

RS232 Control Line voltages at the same logic state. To clarify the matter, see the

table below. For more information see RS-232 Voltage Levels.

Table: 5.1 RS232 Voltage levels

RS232 Line Type & Logic Level RS232 Voltage TTL Voltage to/from MAX232

Data Transmission (Rx/Tx) Logic 0 +3 V to +15 V 0 V

Data Transmission (Rx/Tx) Logic 1 -3 V to -15 V 5 V

Control Signals (RTS/CTS/DTR/DSR)

Logic 0-3 V to -15 V 5 V

Control Signals (RTS/CTS/DTR/DSR)

Logic 1+3 V to +15 V 0 V

Fig: 5.11. Max 232 pin diagram

CHAPTER 4

IMPLEMENTATION OF THE PROJECT

This chapter briefly explains about the firmware implementation of the

project. The required software tools are discussed in section 4.2. Section 4.3 shows

the flow diagram of the project design. Section 4.4 presents the firmware

implementation of the project design.

Block diagram:

Working flow:

When the message is sent, GSM modem receives the message and transmits

this message to microcontroller via RS 232 cable.

If the mobile number available in the microcontroller then the vote is

accepted.

Then according to the programmed candidates votes are incremented and the

final result appears on the pc.

The microcontroller has been programmed in such a way that no user can vote

more than once.

In this project GSM is connected to the microcontroller through USB or serial

cable. Microcontroller is programmed to store the mobile numbers of voters and when

mobile number received from GSM modem it verifies whether the number is stored or

not, if mobile number is available it takes the vote otherwise it will not accept.

When the message is received from the GSM modem by the microcontroller

after verifying mobile number the message or vote is stored in the EEPROM which

connected to the microcontroller through I2C(integrated ic).

LCD displays the message received and vote to the candidate if the number is

available in the microcontroller otherwise it displays sorry invalid vote.

Personal computers displays the details of the number of votes casted and how

many votes received by the each candidate.

Software Tools Required

Keil µv3, Flashmagic are the two software tools used to program

microcontroller. The working of each software tool is explained below in detail.

4.1.1 Programming Microcontroller

A compiler for a high level language helps to reduce production time. To

program the LPC2148 microcontroller the Keil µv3 is used. The programming is done

strictly in the embedded C language. Keil µv3 is a suite of executable, open source

software development tools for the microcontrollers hosted on the Windows platform.

The compilation of the C program converts it into machine language file

(.hex). This is the only language the microcontroller will understand, because it

contains the original program code converted into a hexadecimal format. The

compilation of the program is shown in Fig 4.1. If there are no errors and warnings

then run the program, the system performs all the required tasks and behaves as

expected the software developed. If not, the whole procedure will have to be repeated

again. Fig 4.2 shows expected outputs for given inputs when run compiled program.

One of the difficulties of programming microcontrollers is the limited amount

of resources the programmer has to deal with. In personal computers resources such

as RAM and processing speed are basically limitless when compared to

microcontrollers. In contrast, the code on microcontrollers should be as low on

resources as possible

4.2 Keil Compiler:

.

Fig 4.1: Compilation of source Code

Keil compiler is software used where the machine language code is written and

compiled. After compilation, the machine source code is converted into hex code which is to

be dumped into the microcontroller for further processing. Keil compiler also supports C

language code.

Fig 4.2: Run the compiled program

Keil compiler is software used where the machine language code is written and

compiled. After compilation, the machine source code is converted into hex code which is to

be dumped into the microcontroller for further processing. Keil compiler also supports C

language code.

4.3 Flash Magic:Flash Magic is a PC tool for programming flash based microcontrollers from

NXP using a serial or Ethernet protocol while in the target hardware. The figures

below show how the baud rate is selected for the microcontroller, how are the

registers erased before the device is programmed.

Features:

Straightforward and intuitive user interface.

Five simple steps to erasing and programming a device and setting any options

desired.

Programs Intel Hex Files.

Verifying after programming.

Fills unused flash to increase firmware security.

Ability to automatically program checksums. Using the supplied checksum

calculation routine your firmware can easily verify the integrity of a Flash

block, ensuring no unauthorized or corrupted code can ever be executed.

Program security bits.

Check which Flash blocks are blank or in use with the ability to easily erase all

blocks in use.

Read the device signature.

Read any section of Flash and save as an Intel Hex File.

Reprogram the Boot Vector and Status Byte with the help of confirmation

features that prevent accidentally programming incorrect values.

Displays the contents of Flash in ASCII and Hexadecimal formats.

Single-click access to the manual, Flash Magic home page and NXP

Microcontrollers home page.

Ability to use high-speed serial communications on devices that support it.

Flash Magic calculates the highest baud rate that both the device and your PC

can use and switches to that baud rate transparently.

Command Line interface allowing Flash Magic to be used in IDEs and Batch

Files in PDF format.

Supports half-duplex communications.

Verify Hex Files previously programmed.

Save and open settings.

Able to reset Rx2 and 66x devices (revision G or higher).

Able to control the DTR and RTS RS232 signals when connected to RST

and /PSEN to place the device into Boot ROM and Execute modes

automatically. An example circuit diagram is included in the Manual. This is

essential for ISP with target hardware that is hard to access.

This enables us to send commands to place the device in Boot ROM mode,

with support for command line interfaces. The installation includes an example

project for the Keil and Raisonance 8051 compilers that show how to build

support for this feature into applications.

Able to play any Wave file when finished programming built in automated

version checker - helps ensure you always have the latest version.

Powerful, flexible Just In Time Code feature. Write your own JIT Modules to

generate last minute code for programming. Uses include:

Serial number generation.

Copy protection and copy authorization.

Storing program date and time - manufacture date.

Storing program operator and location.

Lookup table generation.

Language tables or language selection.

Centralized record keeping.

Obtaining latest firmware from the Corporate Web site or project intranet.

Fig 4.3 Dumping procedure into the chip

Schematic:

ADVANTAGES:

Reduced costs:

Instead of having thousands of polling stations scattered all over the country

which will involve enormous logistics to is deployed deploy, the only 'polling

stations' will be one counting center per service provider where the election polling

software system, this makes it easier to monitor.

Increased participation and voting options:

People can vote from home or offices so no need of public holiday to enable

people vote. Participation will be higher because people do not have to leave their

home and stand on long endless queues. Participation will generally be higher than

ever before. Many people do not vote just because of the stress involved.

Reduced Risk:

The risks associated with road travel such as road traffic accidents and late

arrival of electoral resources due to unforeseen delays during deployment of polling

stations will be avoided.

Reduced time Consumption:

Due to its electronic nature, the results of the Poling will be available

immediately after voting with the GSM sms voting.

Greater speed and accuracy placing and tallying votes:

Possibility of rigging will be very low as compared with the ballot box

system. The reasons are:

1. Every political office candidate will be allocated a number eg. NCP candidate:

sms to 3005, BJP: sms to 5604, Congress: sms to 1009 etc.

2. An electronic voters' register (which is a primary requirement for the GSM

sms system) will be used to control the rigging. Every voter will also register

a particular GSM phone number in which he would use for voting during the

elections.

3. To vote, voters will type their registration number as a sms message eg.

00030611 and send to the number of their candidate of choice. To confirm the

vote, the voter will receive a confirmation message from the Counting Station

that their votes have been received. This is the voting receipt.

4. During registration voters who don't have phones can register with designated

handsets to be provided by service providers or use numbers of well known

friends. Once a number is used, it cannot be changed until after the voting

exercise.

5. Possibility of multiple voting is not possible since voter registration number

must match the GSM number used.

Provide Equal Opportunity:

Best of all, this process will guarantee that a new generation of political

leaders will emerge at last, since it provides an equal opportunity for all the political

parties.

DISADVANTAGES:

The SMS transition involves SMS server. This may introduce delay in

delivering the message. If it delivers after polling duration is completed then that vote

is not considered.

CHAPTER 5

CODE

#include<lpc214x.h>

#include<stdio.h>

#include<string.h>

#include"LPCLCD.h"

#include"LPCCOM.h"

#include"IICHEADER.h"

#define MOBNO1 "+919494541868"

#define MOBNO2 "+918885287207"

#define MOBNO3 "+918008075977"

#define MOBNO4 "+919440466055"

#define NFVOTS1 1 //loc noof vots to cadidate1




#define VOTSTATUS 11

unsigned char Temp[3];

unsigned char vs1=0,vs2=0,vs3=0,vs4=0,cad1nv=0,cad2nv=0,cad3nv=0,cad4nv=0;

unsigned char Times1=0,Times2=0,Times3=0;

unsigned char Times4=0,flag1=0,flag2=0,flag3=0,flag4=0;

int main()

{

Seril_Init(2,9600,9600);

lcd_init();

i2c_init();

Com0_Int_Enable(); //GSM connected to serial0

vs1= read_i2c(11);

vs2= read_i2c(12);

vs3= read_i2c(13);

vs4= read_i2c(14);

if(vs1 == 0xFF)

{

write_i2c(11,0);

vs1 = 0;

}

if(vs2 == 0xFF)

{

write_i2c(12,0);

vs2 = 0;

}

if(vs3 == 0xFF)

{

write_i2c(13,0);

vs3 = 0;

}

if(vs4 == 0xFF)

{

write_i2c(14,0);

vs4 = 0;

}

cad1nv = read_i2c(NFVOTS1);

if(cad1nv == 0xFF)

{

write_i2c(NFVOTS1,0);

cad1nv =0;

}


if(cad2nv == 0xFF)

{


cad2nv =0;

}


if(cad3nv == 0xFF)

{


cad3nv =0;

}


if(cad4nv == 0xFF)

{


cad4nv =0;

}

Trans_Str(0,"AT+CMGF=1\r"); //pde mode for character mode to read data for user

delay(1000);

while(1)

{

message(0x80,"GSM BASED VOTING");//for lcd display function

Trans_Str(0,"AT+CMGR=1\r");//to read mng from gsm s_buf stored msg in

intrruppt mode

delay(10000);

// if(strstr(S_Buf,"ERROR") != NULL)

{

if(strstr(S_Buf,MOBNO1) != NULL) //to check if buffer contains mob.

{

Times1++;

if(Times1>=2)

{

flag1=0;

Times1=0;

}

message(0xC0,"messageRec:1"); //pollx x=1/2/3/4

delay(5000);

if(( strstr(S_Buf,"poll1") != NULL )&&((vs1&0x01)==0) )

{

message(0xC0,"vote to Cad:1 Valid");

delay(5000);

flag1=1;

cad1nv++; //vote counting

vs1 = 0x01;

write_i2c(11,vs1);

write_i2c(NFVOTS1,cad1nv);

vs1 =read_i2c(11);

Com0_Buf_Clear();

delay(3000);

message(0xC0," ");

}

else if(( strstr(S_Buf,"poll2") != NULL )&&((vs1&0x01)==0) )

{


flag1=1;

cad2nv++;

vs1 = 0x01;

write_i2c(11,vs1);


vs1 =read_i2c(11);

Com0_Buf_Clear();

delay(3000);

message(0xC0," ");

}


{


flag1=1;

cad3nv++;

vs1 = 0x01;

write_i2c(11,vs1);


vs1=read_i2c(11);

Com0_Buf_Clear();

delay(3000);

message(0xC0," ");

}


{


flag1=1;

cad4nv++;

vs1 = 0x01;

write_i2c(11,vs1);


vs1 =read_i2c(11);

Com0_Buf_Clear();

delay(3000);

message(0xC0," ");

}

else if((vs1&0x01==0x01)&&(flag1==0))

{

message(0xC0,"Sorry InVALID");

delay(10000);

Trans_Str(0,"AT+CMGD=1\r"); //delete msg in gsm

delay(10000);

message(0xC0," ");

Com0_Buf_Clear();

}

Trans_Str(0,"AT+CMGD=1\r"); } //delete msg in gsm

else if(strstr(S_Buf,MOBNO2) != NULL)

{

Times2++;

if(Times2>=2)

{

flag2=0;

Times2=0;

}

message(0xC0,"messageRec:2"); //poll'x' x=1/2/3/4

delay(1000);


{


flag2=1;

cad1nv++;

vs2= 0x02;

write_i2c(12,vs2);


vs2=read_i2c(12);

Com0_Buf_Clear();

delay(3000);

message(0xC0," "); }


{


flag2=1;

cad2nv++;

vs2= 0x02;

write_i2c(12,vs2);


vs2=read_i2c(12);

Com0_Buf_Clear();

delay(3000);

message(0xC0," ");

}


{


flag2=1;

cad3nv++;

vs2= 0x02;

write_i2c(12,vs2);


vs2=read_i2c(12);Com0_Buf_Clear();delay(3000);

message(0xC0," ");

}


{


flag2=1;

cad4nv++;

vs2= 0x02;

write_i2c(12,vs2);


vs2=read_i2c(12);

Com0_Buf_Clear();

delay(3000);

message(0xC0," ");

}

else if((vs2&0x02==0x02)&&(flag2==0))

{


delay(10000);


delay(10000);

message(0xC0," ");

Com0_Buf_Clear();

}


}


{

Times3++;

if(Times3>=2)

{

flag3=0;

Times3=0;

}


delay(3000);


{


flag3=1;

cad1nv++;

vs3= 0x04;

write_i2c(13,vs3);


vs3=read_i2c(13);

Com0_Buf_Clear();

delay(1000);

message(0xC0," ");}


{


flag3=1;

cad2nv++;

vs3= 0x04;

write_i2c(13,vs3);


vs3=read_i2c(13);

Com0_Buf_Clear();

delay(3000);

message(0xC0," ");

}


{


flag3=1;

cad3nv++;

vs3= 0x04;

write_i2c(13,vs3);


vs3=read_i2c(13);

Com0_Buf_Clear();

delay(3000);

message(0xC0," ");

}


{


flag3=1;

cad4nv++;

vs3= 0x04;

write_i2c(13,vs3);


vs3=read_i2c(13);

Com0_Buf_Clear();

delay(3000);

message(0xC0," ");

}

else if((vs3&0x04==0x04)&&(flag3==0))

{


delay(10000);


delay(10000);

message(0xC0," ");

Com0_Buf_Clear();

}


}


{

Times4++;

if(Times4>=2)

{

flag4=0;

Times4=0;

}


delay(1000);


{


flag4=1;

cad1nv++;

vs4= 0x08;

write_i2c(14,vs4);


vs4=read_i2c(14);

Com0_Buf_Clear();

delay(3000);

message(0xC0," ");

}


{


flag4=1;

cad2nv++;

vs4= 0x08;

write_i2c(14,vs4);


vs4=read_i2c(14);

Com0_Buf_Clear();

delay(3000);

message(0xC0," ");

}


{


flag4=1;

cad3nv++;

vs4= 0x08;

write_i2c(14,vs4);


vs3=read_i2c(14);

Com0_Buf_Clear();

delay(3000);

message(0xC0," ");

}


{


flag4=1;

cad4nv++;

vs4= 0x08;

write_i2c(14,vs4);


vs4=read_i2c(14);

Com0_Buf_Clear();

delay(3000);

message(0xC0," ");

}

else if((vs4&0x08==0x08)&&(flag4==0))

{


delay(10000);


delay(10000);

message(0xC0," ");

Com0_Buf_Clear();

}


}

}

if((IOPIN0 & 0x00004000)== 0)

{

command_data(0x01,0);

message(0x80,"In Uploading");

Trans_Str(1,"\r\nRESULT:"); //transmiting data to com1

Trans_Str(1,"\r\nCadi1:");

cad1nv= read_i2c(NFVOTS1);

sprintf((char *)Temp,"%d",cad1nv);

Trans_Str(1,(char *)Temp);

memset(Temp,' ',3);





memset(Temp,' ',3);





memset(Temp,' ',3);









write_i2c(11,0);

write_i2c(12,0);

write_i2c(13,0);

write_i2c(14,0);

cad4nv=0;cad3nv=0;

cad2nv=0;cad1nv=0;

vs1=0;

vs2=0;

vs3=0;

vs4=0;

delay(5000);

command_data(0x01,0);

}

}

}

CHAPTER 6

RESULTS

CHAPTER 7

CONCLUSION

This project details the requirements, design and implementation of a generic e-

voting technique using GSM Mobile System as a most basic application of GSM Based

Personal Response System, where voters can cast their votes anytime, anywhere by

using a GSM Mobile Equipment (ME). Our proposal enables a voter to cast his vote

using a ME without additionally registering himself for voting in advance and going to

a polling place. Here the Mobile service provider authentication infrastructure is used to

provide voter authentication and improve voter mobility. Authentication is always a

difficult requirement to fulfill for remote voting schemes, most of which apply a public-

key based signature scheme for voter authentication.

In our scheme, we are using the existing authentication infrastructure. Our

scheme also enhances the security and provides more mobility and convenience to

voters, where the voters’ privacy is protected. In addition, proxy vote or double voting

is not possible. Any entities except for an e-voting device cannot know the voting result.

By implementing GSM based voting machine, accuracy and efficiency of voting

process increases.

CHAPTER 8

FUTURE SCOPE

However, further work is needed to address the importance that we place in the

trust on the Authentication Center (AC). In future work, we will discuss more on end-

user device (ME) and application security. In this paper, our concern is to present e-

voting system using a Mobile Equipment (ME) and to explain its process as a basic

application of GSM based Personal Response System. In which voter does not need to

go to polling booth to cast their votes.

GSM Based Voting Machine

Documents

tiny lqfp64

character

base station

subscriber

remote voting

open drain

individual

network switching