Fabrication of CMOS Integrated Circuits

Fabrication of CMOS Integrated Circuits

CHAPTER 4

John P. Uyemura

Wafer Preparation

Thin Films

Photo-lithography

Cleaning

Front-EndProcesses

EtchIonImplantation

Planarization

Test &Assembly

DesignWaferPreparation

• Polysilicon Refining

• Crystal Pulling

• Wafer Slicing & Polishing

• Epitaxial Silicon Deposition

Polysilicon Refining

Chemical Reactions Silicon Refining: SiO2 + 2 C Si + 2 CO Silicon Purification: Si + 3 HCl HSiCl3 + H2

Silicon Deposition: HSiCl3 + H2 Si + 3 HCl

Reactants H2 Silicon Intermediates H2SiCl2

HSiCl3

Crystal PullingQuartz Tube

Rotating Chuck

Seed Crystal

Growing Crystal (boule)

RF or ResistanceHeating Coils

Molten Silicon(Melt)

Crucible

Materials Polysilicon Nodules * Ar * H2

* High proportion of the total product use

Process Conditions Flow Rate: 20 to 50 liters/min Time: 18 to 24 hours Temperature: >1,300 degrees C Pressure: 20 Torr

3/15/98 PRAX01C.PPT Rev. 1.0

Wafer Slicing & Polishing

The silicon ingot is grown and individual wafers are sliced.

The silicon ingot is sliced into individual wafers, polished, and cleaned.

silicon wafer

p+ silicon substrate

OXIDATION PROCESS IN FABRICATION

WHAT IS OXIDATION?• It is a way to produce a layer of Silicon

dioxide on the surface of a wafer

• Normally referred to as “Thermal Oxidation”

• Process is done at very high temperatures

• Two types– Dry Oxidation– Wet Oxidation

WHY SiO2 ?

• Has excellent dielectric properties

• One among the best insulators

• Relatively easy to obtain when compared to other insulators

• Unwanted SiO2 can be removed selectively to Si without any problems

• It is very stable and chemically inert

• SiO2 is normally used

– As Gate oxides (thin layer insulating the gate and channel area)

– For electrical isolation between different layers on the chip

– For Masking– As Field oxides (thick layer insulating the

device from other devices on the chip)– For Passivation

OXIDATION PROCESS

DRY OXIDATION• Requires temperature of 8000C to 11000C

• Slow process (about 10 hours for 700nm oxide)

• Easily controllable

• Si + O2 SiO2

• Pure high quality oxide

• Used for Gate oxide

WET OXIDATION• Inlet gas is a mixture of water vapor and

oxygen

• Si + 2H2O SiO2 + 2H2

• Nearly 10 times faster than dry oxidation

• Temperatures of 7000C to 12000C

• Medium quality oxide

• Used for obtaining Field oxide

CVD• Chemical vapour deposition (CVD) is

used where Si cannot be directly oxidized • Wafer (substrate) is exposed to volatile

compounds (called precursors)• These react and decompose on the

substrate and produce the desired deposit• CVD can also be used for deposition of

– Polycrystalline Silicon– Silicon Nitride

Detailed Description of First Photolithographic Steps Only

• Top View

• Cross-Section View

A A’

B’B

C

C’

D

D’

A A’

B’B

A A’

B’B

Bulk CMOS Process Description

• N-well process

• Single Metal Only Depicted

• Double Poly

A A’

B’B

n-channel MOSFET

S

D

G

S

D

BG

A A’

B’B

S

D

BG

W L

A A’

B’B

n-channel MOSFET

Capacitor

p-channel MOSFET

Resistor

A A’

B’B

N-well Mask

A A’

B’B

N-well Mask

~

Blank Wafer

p-doped Substrate

ExposeDevelop

Photoresistn-well Mask

Implant

~

A A’

B’B

A-A’ Section

B-B’ Section

PhotoresistN-well MaskExposureDevelop

A-A’ Section

B-B’ Section

Implant

N-well Mask

A-A’ Section

B-B’ Sectionn-well

A A’

B’B

Active Mask

A A’

B’B

Active Mask

Active Mask

A-A’ Section

B-B’ Section

Field Oxide Field Oxide Field Oxide

Field Oxide

A A’

B’B

Poly1 Mask

A A’

B’B

Poly1 Mask

A A’

B’B

n-channel MOSFET

Capacitor

P-channel MOSFET

Resistor

Poly 1 Mask

A-A’ Section

B-B’ Section

Gate Oxide Gate Oxide

A A’

B’B

Poly 2 Mask

A A’

B’B

Poly 2 Mask

Poly 2 Mask

A-A’ Section

B-B’ Section

A A’

B’B

P-Select

A A’

B’B

P-Select

P-Select Mask – n-diffusion

A-A’ Section

B-B’ Section

n-diffusion

P-Select Mask – p-diffusion

A-A’ Section

B-B’ Section

p-diffusion

A A’

B’B

Contact Mask

A A’

B’B

Contact Mask

Contact Mask

A-A’ Section

B-B’ Section

A A’

B’B

Metal 1 Mask

A A’

B’B

Metal 1 Mask

Metal Mask

A-A’ Section

B-B’ Section

A A’

B’B

Contact Mask

A A’

B’B

Contact Mask

Contact Mask

A-A’ Section

B-B’ Section

A A’

B’B

Metal 1 Mask

A A’

B’B

Metal 1 Mask

Metal Mask

A-A’ Section

B-B’ Section