Electronics Lab Manual

Electronics Lab Manual

Volume 1

K. A. Navas, M Tech

Asst.Professor, ECE Dept.

College of Engineering Trivandrum

Thiruvananthapuram-695016

[email protected]

Rajath Publishers, Kochi 682020

Electronics Lab Manual Volume 1Fourth edition

Copyright c©2008 Rajath publishers and the author jointly

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Contents

1 ELECTRONICS WORKSHOP 9

1.1 Passive electronic components . . . . . . . . . . . . . . . . . . . . . . . . 9

1.2 Active electronic components . . . . . . . . . . . . . . . . . . . . . . . . 21

1.3 Colour code for resistors . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

1.4 Coding for capacitors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

1.5 Numbering of semiconductor devices . . . . . . . . . . . . . . . . . . . . 30

1.6 Cathode ray oscilloscope . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

1.7 Familiarisation of multimeters . . . . . . . . . . . . . . . . . . . . . . . . 36

1.8 DC source and signal generator . . . . . . . . . . . . . . . . . . . . . . . 40

1.9 Testing of electronic components . . . . . . . . . . . . . . . . . . . . . . 41

1.10 PCB fabrication . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

1.11 Soldering practice . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

1.12 Transformer winding practice . . . . . . . . . . . . . . . . . . . . . . . . 49

2 BASIC ELECTRONICS LAB (SOLID STATE DEVICES LAB) 52

2.1 Characteristics of PN junction diode . . . . . . . . . . . . . . . . . . . . 52

2.2 Characteristics of zener diode . . . . . . . . . . . . . . . . . . . . . . . . 58

2.3 Characteristics of LED . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60

2.4 Rectifier circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63

2.5 Study of filter circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69

2.6 Clipping circuits (Shunt clippers) . . . . . . . . . . . . . . . . . . . . . . 74

2.7 Clipping circuits (Series clippers) . . . . . . . . . . . . . . . . . . . . . . 82

2.8 Clipping circuits using zener diodes . . . . . . . . . . . . . . . . . . . . . 84

2.9 Clamping circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87

2.10 Clamping circuits using zener diodes . . . . . . . . . . . . . . . . . . . . 92

2.11 CE Characteristics of transistor . . . . . . . . . . . . . . . . . . . . . . . 93

2.12 CB Characteristics of transistor . . . . . . . . . . . . . . . . . . . . . . . 100

2.13 Characteristics of JFET . . . . . . . . . . . . . . . . . . . . . . . . . . . 104

5

6 Electronics Lab Manual Volume 1

2.14 Characteristics of MOSFET . . . . . . . . . . . . . . . . . . . . . . . . . 108

2.15 Characteristics of UJT . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111

2.16 Zener diode regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114

2.17 RC integrator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116

2.18 RC differentiator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119

2.19 RC low pass filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121

2.20 RC high pass filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123

2.21 Series resonant circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125

2.22 Parallel resonant circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . 127

2.23 Characteristics of SCR . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129

2.24 Characteristics of TRIAC . . . . . . . . . . . . . . . . . . . . . . . . . . 132

2.25 Characteristics of DIAC . . . . . . . . . . . . . . . . . . . . . . . . . . . 133

2.26 Solved examination questions . . . . . . . . . . . . . . . . . . . . . . . . 135

3 ELECTRONIC CIRCUITS LAB 152

3.1 Transistor biasing circuits . . . . . . . . . . . . . . . . . . . . . . . . . . 152

3.2 RC-coupled amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 156

3.3 Two stage RC-coupled amplifier . . . . . . . . . . . . . . . . . . . . . . . 164

3.4 Emitter follower . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 167

3.5 Tuned amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 170

3.6 Common source JFET amplifier . . . . . . . . . . . . . . . . . . . . . . . 173

3.7 Source follower . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 177

3.8 Power amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 179

3.9 Differential amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 184

3.10 Differential amplifier with constant current source . . . . . . . . . . . . 187

3.11 Cascode amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 189

3.12 RC phase shift oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . 192

3.13 RC phase shift oscillator using JFET . . . . . . . . . . . . . . . . . . . . 196

3.14 Wien bridge oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . 197

3.15 Wien bridge oscillator using JFET . . . . . . . . . . . . . . . . . . . . . 200

3.16 Hartley and Colpitts oscillators . . . . . . . . . . . . . . . . . . . . . . . 202

3.17 Series voltage regulator without feedback . . . . . . . . . . . . . . . . . 207

3.18 Series voltage regulator with feedback . . . . . . . . . . . . . . . . . . . 211

3.19 Crystal oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 216

3.20 Transistor as a switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . 218

3.21 Bistable multivibrator . . . . . . . . . . . . . . . . . . . . . . . . . . . . 221

3.22 Monostable multivibrator . . . . . . . . . . . . . . . . . . . . . . . . . . 227

3.23 Astable multivibrator . . . . . . . . . . . . . . . . . . . . . . . . . . . . 232

Electronics Lab Manual Volume 1 7

3.24 Gated astable multivibrator . . . . . . . . . . . . . . . . . . . . . . . . . 237

3.25 Schmitt trigger . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 239

3.26 Sweep wave generator . . . . . . . . . . . . . . . . . . . . . . . . . . . . 243

3.27 Linear sweep wave generator . . . . . . . . . . . . . . . . . . . . . . . . 246

3.28 Miller sweep circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 247

3.29 Bootstrap sweep circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . 249

3.30 Current time base generator . . . . . . . . . . . . . . . . . . . . . . . . . 253

3.31 UJT relaxation oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . 255

3.32 Feedback amplifiers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 258

3.33 UJT control of SCR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 263

3.34 TRIAC controlled with DIAC . . . . . . . . . . . . . . . . . . . . . . . . 264

3.35 Controlled full wave rectifier . . . . . . . . . . . . . . . . . . . . . . . . . 265

3.36 Controlled bridge rectifier . . . . . . . . . . . . . . . . . . . . . . . . . . 265

3.37 Light activated relay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 266

3.38 LVDT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 267

3.39 CA3028 cascode/differential amplifier . . . . . . . . . . . . . . . . . . . 268

3.40 Voltage controlled oscillator . . . . . . . . . . . . . . . . . . . . . . . . . 271

4 Digital Electronics Lab 274

4.1 Study of digital ICs and IC trainer kit . . . . . . . . . . . . . . . . . . . 274

4.2 TTL characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 278

4.3 Study of combinational circuits . . . . . . . . . . . . . . . . . . . . . . . 282

4.4 Half adder and full adder . . . . . . . . . . . . . . . . . . . . . . . . . . 285

4.5 Adder and subtractor circuits using 7483 . . . . . . . . . . . . . . . . . . 288

4.6 Code converters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 292

4.7 Timing circuits using gates . . . . . . . . . . . . . . . . . . . . . . . . . 296

4.8 Timing circuits using 74121 and 74123 . . . . . . . . . . . . . . . . . . . 299

4.9 Flip flops using gates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 303

4.10 Shift registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 307

4.11 Ring counter and Johnson counter . . . . . . . . . . . . . . . . . . . . . 310

4.12 Ring counter and Johnson counter using 7495 . . . . . . . . . . . . . . . 314

4.13 Ring counter and Johnson counter using 74194 . . . . . . . . . . . . . . 316

4.14 Asynchronous counters . . . . . . . . . . . . . . . . . . . . . . . . . . . . 318

4.15 Synchronous counters . . . . . . . . . . . . . . . . . . . . . . . . . . . . 323

4.16 Counter ICs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 333

4.17 Magnitude comparator . . . . . . . . . . . . . . . . . . . . . . . . . . . . 338

4.18 Multiplexers using gates . . . . . . . . . . . . . . . . . . . . . . . . . . . 340

4.19 Demultiplexers using gates . . . . . . . . . . . . . . . . . . . . . . . . . . 341


4.20 Study of multiplexer ICs . . . . . . . . . . . . . . . . . . . . . . . . . . . 342

4.21 Logic design using multiplexer ICs . . . . . . . . . . . . . . . . . . . . . 348

4.22 Study of demultiplexer ICs . . . . . . . . . . . . . . . . . . . . . . . . . 351

4.23 Logic design using demux/decoder ICs . . . . . . . . . . . . . . . . . . . 355

4.24 Binary sequence generator . . . . . . . . . . . . . . . . . . . . . . . . . . 357

4.25 Sequence detector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 358

4.26 CMOS characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 362

4.27 TTL-CMOS interconnections . . . . . . . . . . . . . . . . . . . . . . . . 363

4.28 Static display . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 365

4.29 Analog to digital converter . . . . . . . . . . . . . . . . . . . . . . . . . 367

4.30 Digital to analog converter . . . . . . . . . . . . . . . . . . . . . . . . . . 370

4.31 Astable multivibrator using 555 . . . . . . . . . . . . . . . . . . . . . . . 373

4.32 Monostable multivibrator using 555 . . . . . . . . . . . . . . . . . . . . 377

4.33 Parity generator and checker . . . . . . . . . . . . . . . . . . . . . . . . 379

4.34 Schmitt trigger using 7414 . . . . . . . . . . . . . . . . . . . . . . . . . . 381

4.35 Study of semiconductor memories . . . . . . . . . . . . . . . . . . . . . . 382

4.36 Solved examination questions . . . . . . . . . . . . . . . . . . . . . . . . 384

4.37 Unsolved examination questions . . . . . . . . . . . . . . . . . . . . . . . 390

Chapter 1

ELECTRONIC CIRCUITS LAB

1.1 TRANSISTOR BIASING CIRCUITS

Aim To bias a given BJT to work in a desired Quiescent operating point by

employing different biasing techniques.

Components and equipments required Transistor, dc source, resistors, bread

board, ammeter and voltmeter.

Theory A BJT must be biased in active operating region to function as an am-

plifier. In order to bias a BJT in active operating region, base-emitter junction must

be forward biased and base-collector junction must be reverse biased. Biasing can be

done with the help of a DC source and a few resistors. Different methods are used to

bias the BJT. The objective of this experiment is to study the effect of the variation of

the parameters on the operating point.

Fixed bias circuit A resistor is used to tie the base of the transistor to VCC for

the fixed bias set up. Saturation conditions are avoided in this bias set up because

the base-collector junction is no longer reverse biased. Therefore the signal output will

not be distorted. However the stability of the circuit is poor against the parameter

variations.

Emitter-stabilized bias circuit The stability of the fixed bias circuit can be

improved significantly by introducing a resistor RE in the emitter terminal.

Collector feedback bias circuit Stability can be improved by introducing a feed-

back path from collector to base through a resistor. Though Q-point is not completely

independent of β (hFE), current gain of the transistor, sensitivity to changes in β or

temperature variations are less than that for fixed bias and emitter-bias configurations.

Voltage divider bias circuit A potential divider resistor network R1R2 provides

9


the sufficient voltages across the transistor junctions. This amplifier set up is almost

independent of β. R1 and R2 are designed such that a stable voltage drop exists across

them even when the base current varies. For this, current through R1 and R2 is assumed

to be the same and it is much higher than the base current. Therefore R2 is made much

greater than the resistance across base and emitter which is (1 + β)RE . RE includes

internal emitter resistance re also.

Procedure

1. Set up the fixed bias circuit after testing the components. Vary only one of the

parameters VCC , RC , RB and β and enter the updated values in the table. To

change β, use transistor BC177 whose β is 75.

2. Repeat the experiments by changing other parameters. Draw the load line on a

graph with VCE along x-axis and IC along y-axis.

3. Set up other bias circuits one by one. Repeat the experiments by changing one

parameter at a time.

Fixed bias circuit

VCC 12 V

RB560 k

BC107

RC3.3 k

+

+-

0-10 mA

0-10 V

A

V

VCC RC RB VCE IC

-

β

Design

Select transistor BC107 since its β ranges from 100 to 500 at IC = 2 mA, as per

data sheet.

Let the Q-point be VCE = 6 V, and IC = 2 mA at VCC = 12 V.

Then VRC = IC ×RC = 6 V.

From this, RC = 3 k. Use 3.3 k std.


Design


Voltage across RC = 6 V. From this, RC = 3 k. Use 3.3 k.

VRB = VCE − VBE = 6 V - 0.7 V = 5.3 V.

Also, VRB = IB ×RB = 5.3 V. From this, RB = 265 k. Use 220 k.

Voltage divider bias

VCC 12 V

R147 k

RC2.2 k

BC107

R215 k

RE1 k

A

V

+

+

-

-0-10 mA

0-10 V

VCC RC VCE ICβ

Design


Assume voltage across RC = 4 V and that across RE = 2 V.

VRC = IC×RC = 4 V. From this, we get RC = 2 k. Use 2.2 k std. VRE = IE×RE= 2 V. Because, IE ≈ IC . From this, we get RE = 1 k.

Design of voltage divider R1 and R2

Assume the current through R1 = 10IB and that through R2 = 9IB to avoid loading

of the potential divider network R1 and R2 by the base current. (In other words to

keep the bias voltages across R1 and R2 stable against the base current variations).

i.e., VR2 = VBE + VRE = 0.6 V + 2 V = 2.6 V. Also, VR2 = 9IBR2 = 2.6 V

But IB = IC/β = 2 mA/100 = 20 µA. Then R2 = 2.69×20×10−6 = 14 k. Use 15 k.

VR1 = Voltage across R1 = VCC − VR2 = 12 V - 2.6 V = 9.4 V

Also, VR1 = 10IBR1 = 9.4 V. Then R1 = 9.410×20×10−6 = 47 k.


1.2 RC-COUPLED AMPLIFIER

Aim To design and set up an RC-coupled CE amplifier using bipolar junction

transistor and to plot its frequency response.

Components and equipments required Transistor, dc source, capacitors, re-

sistors, bread board, signal generator, multimeter and CRO.

Theory RC-coupled CE amplifier is widely used in audio frequency applications

in radio and TV receivers. It provides current, voltage and power gains. Base current

controls the collector current of a common emitter amplifier. A small increase in base

current results in a relatively large increase in collector current. Similarly, a small

decrease in base current causes large decrease in collector current. The emitter-base

junction must be forward biased and the collector base junction must be reverse biased

for the proper functioning of an amplifier. In the circuit diagram, an NPN transistor

is connected as a common emitter ac amplifier. R1 and R2 are employed for the

voltage divider bias of the transistor. Voltage divider bias provides good stabilisation

independent of the variations of β. The input signal Vin is coupled through CC1 to the

base and output voltage is coupled from collector through the capacitor CC2.

The input impedance of the amplifier is expressed as Zin = R1||R2||(1+hFEre) and

output impedance as Zout = RC ||RL where re is the internal emitter resistance of the

transistor given by the expression = 25 mV/IE , where 25 mV is temperature equivalent

voltage at room temperature.

Selection of transistor Transistor is selected according to the frequency of oper-

ation, and power requirements. The hFE of the transistor is another aspect we should

be careful about. Low frequency gain of a BJT amplifier is given by the expression.

Voltage gain Av = −hFE RLRi

. In the worst case with RL = Ri, AV = −hFE .

hFE of any transistor will vary in large ranges. For example, the hFE of SL100

(a general purpose transistor) varies from 40 to 300. hFE of BC107 (an AF driver)

varies from 100 to 500. Therefore a transistor must be selected such that its minimum

guaranteed hFE is greater than or equal to AV required.

Selection of supply voltage VCC For a distortionless output from an audio

amplifier, the operating point must be kept at the middle of the load line selecting

VCEQ = 50%VCC(= 0.5VCC). This means that the output voltage swing in either

positive or negative direction is half of VCC . However, VCC is selected 20% more than

the required voltage swing. For example, if the required output swing is 10 V, VCC is

selected 12 V.

Selection of collector current IC The nominal value of IC can be selected from


the data sheet. Usually it will be given corresponding to hFE bias. It is the bias current

at which hFE is measured. For BC107 it is 2 mA, for SL100 it is 150 mA, and for power

transistor 2N3055 it is 4 A.

Design of emitter resistor RE Current series feedback is used in this circuit

using RE . It stabilizes the operating point against temperature variation. Voltage

across RE must be as high as possible. But, higher drop across RE will reduce the

output voltage swing. So, as a rule of thumb, 10% of VCC is fixed across RE .

RE = VREIE

= VREIC

since IE ≈ IC , RE = 0.1VCCIC

Design of RC Value of RC can be obtained from the relation RC = 0.4VCC/ICsince remaining 40% of VCC is dropped across RC .

Design of potential divider R1 and R2 Value of IB is obtained by using the

expression IB = IC/hFE min. At least 10IB should be allowed to flow through R1 and

R2 for the better stability of bias voltages. If the current through R1 and R2 is near

to IB, slight variation in IB will affect the voltage across R1 and R2. In other words,

the base current will load the voltage divider. When IB gets branched into the base of

transistor, 9IB flows through R2. Values of R1 and R2 can be calculated from the dc

potentials created by the respective currents.

Design of bypass capacitor CE The purpose of the bypass capacitor is to bypass

signal current to ground. To bypass the frequency of interest, reactance of the capacitor

XCE computed at that frequency should be much less than the emitter resistance. As

a rule of thumb, it is taken XCE ≤ RE/10.

Design of coupling capacitor CC The purpose of the coupling capacitor is to

couple the ac signal to the input of the amplifier and block dc. It also determines the

lowest frequency that to be amplified. Value of the coupling capacitor CC is obtained

such that its reactance XC at the lowest frequency (say 100 Hz or so for an audio

amplifier), should be less than the input impedance of the amplifier. That means XC

must be ≤ Rin/10. Here Rin = R1||R2||(1 + hFEre) where re is the internal emitter

resistance of the transistor given by the expression = 25 mV/IE at room temperature.

Procedure

1. Test all the components using a multimeter. Set up the circuit and verify dc bias

conditions. To check dc bias conditions, remove input signal and capacitors in

the circuit.

2. Connect the capacitors in the circuit. Apply a 100 mV peak to peak sinusoidal

signal from the function generator to the circuit input. Observe the input and

output waveforms on the CRO screen simultaneously.


3. Keep the input voltage constant at 100 mV, vary the frequency of the input signal

from 0 to 1 MHz or highest frequency available in the generator. Measure the

output amplitude corresponding to different frequencies and enter it in tabular

column.

4. Plot the frequency response characteristics on a graph sheet with gain in dB on

y-axis and logf on x-axis. Mark log fL and log fH corresponding to 3 dB points.

(If a semi-log graph sheet is used instead of ordinary graph sheet, mark f along

x-axis instead of logf).

5. Calculate the bandwidth of the amplifier using the expression BW= fH − fL.6. Remove the emitter bypass capacitor CE from the circuit and repeat the steps 3

to 5 and observe that the bandwidth increases and gain decreases in the absence

of CE .

Circuit diagram

Ω

µ

Vin100 mV

CC1 10 F+-

R210 k

VCC +12 V

R147 k

RC2.2 k CC2 µ10 F

+ -

BC107

680RE

CEµ22 F

+

-

Ω820 RL

B

E

C

C B E

BC107

Vo

Design

Output requirements: Mid-band voltage gain of the amplifier = 50 and required output

voltage swing = 10 V.

Selection of transistor Select transistor BC107 since its minimum guaranteed

hFE(= 100) is more than the required gain (=50) of the amplifier.

Quick Reference data of BC107

Type: NPN-Silicon, Application: In audio frequency


Maximum rating: VCB = 50 V, VCE = 45 V, VEB = 6 V, IC = 100 mA.

Nominal rating: VCE = 5 V, IC = 2 mA, hFE = 100 to 500.

DC biasing conditions VCC is taken as 20% more than required ouput swing.

Hence VCC = 12 V.

IC = 2 mA, because hFE is guaranteed 100 at that current as per data sheet.

In order to make the operating point at the middle of the load line, assume the dc

conditions VRC = 40% of VCC = 4.8 V, VRE = 10% of VCC = 1.2 V and VCE = 50%

of VCC = 6 V .

Design of RC VRC = IC ×RC = 4.8 V. From this, we get RC = 2.4 k. Use 2.2 k.

Design of RE VRE = IE × RE = 1.2 V. From this, we get RE = 600 Ω because

IE ≈ IC . Use 680 Ω std.

Design of voltage divider R1 and R2

Assume the current through R1 = 10IB and that through R2 = 9IB for a stable

voltage across R1 and R2 independent of the variations of the base current.

VR2 = Voltage drop across R2 = VBE + VRE .

i.e., VR2 = VBE + VRE = 0.6 + 1.2 = 1.8 V. Also, VR2 = 9IBR2 = 1.8 V

But IB = IC/hFE = 2 mA/100 = 20 µA. Then R2 = 1.89×20×10−6 = 10.6 k. Use 10 k.

VR1 = voltage across R1 = VCC − VR2 = 12 V − 1.8 V = 10.2 V

Also, VR1 = 10IBR1 = 10.1 V. Then R1 = 10.210×20×10−6 = 50 k. Select 47 k std.

Design of RL: Gain of the common emitter amplifier is given by the expression

AV = −(rc/re). Where rc = RC ||RL and re = 25 mV/IE = 25 mV/2 mA = 12.5 Ω.

Since the required gain = 50, substituting it in the expression we get, RL = 845 Ω.

Use 820 Ω std.

Design of coupling capacitors CC1 and CC2

XC1 should be less than the input impedance of the transistor. Here, Rin is the

series impedance.

Then XC1 ≤= Rin/10. Here Rin = R1||R2||(1 + hFEre) because is RE bypassed.

We get Rin = 1.1 k. Then XC1 ≤ 110 Ω.

So, CC1 ≥ 1/2πfL × 110 = 14 µF . Use 15 µF std.


Similarly, XC2 ≤ Rout/10, where Rout = RC . Then XCE ≤ 240 Ω.

So, CC2 ≥ 1/2π × 240 = 6.6 µF. Use 10 µF std.

Design of bypass capacitors CE

To bypass the lowest frequency (say 100Hz), XCE should be less than or equal to

the resistance RE .

i.e., XCE ≤ RE/10 Then, CE ≥ 1/(2π × 100× 68) = 23 µF. Use 22 µF.

Graph

Gain in dB

log fL log fHlog f

With CE

Gain in dB

M-3 dB

log fL log fHlog f

Without CE

M dBM-3 dBM dB

Result

With CE :

Mid-band gain of the amplifier =. . . . . .

Bandwidth of the amplifier =. . . . . . Hz

Without CE :

Mid-band gain of the amplifier = . . . . . .

Bandwidth of the amplifier = . . . . . .Hz

Troubleshooting

1. Before the ac signal is applied, check dc conditions of the amplifier. Ensure that the

transistor is in active region by verifying that the E-B junction is forward biased and

C-B junction is reverse biased.

2. Replace RE by a pot and connect the bypass capacitor at the variable terminal of the

pot. Verify whether VBE = 0.6 V. This is very important.

3. If the output waveform gets clipped, reduce the amplitude of the input signal, vary RCor adjust VCC slightly.

4. If the voltage at the collector VC = 12 V, collector circuit is not drawing current. Tran-

sistor is in cut off state. Base-emitter junction may not be forward biased.

5. If VC = 0, possible trouble is open collector circuit or collector shorted to earth. If

VE = 0, emitter is drawing current.


Answered examination questions

1. Design and set up an amplifier for the specifications: gain = -50, output voltage = 10

VPP , fL = 50 Hz and calculate Zi.

Negative sign of the gain indicates that the output of an RC coupled amplifier is the

amplified and inverted version of the input. fL should be considered while designing the

coupling capacitor. Set up an RC coupled amplifier for a gain of 50. To obtain an output

voltage of 10 V peak to peak, take VCC 20% more than the required voltage swing. i.e.,

12 V. To measure the input impedance, connect a 10 k resistor in series with the function

generator and note down the potential difference across the resistor. Then calculate the

current through the resistor. The input impedance is equal to the ratio of the voltage at

the right side of the 10 k resistor with respect to the current through it.

2. Set up an RC coupled amplifier and measure its input and output impedances.

Measurement of input resistance Method 1: Connect a known resistor (say 1 k) in

series between the signal generator and the input of the circuit. Calculate the current

though the resistor from the potential difference across it. Since this current also flows

into the circuit, input resistance can be measured taking the ratio of the voltage at the

right side of the resistor to the current.

Method 2: Connect a pot in series between the signal source and the input of the circuit.

Adjust the pot until the input voltage to the circuit is 50% of the signal generator voltage.

Remove the pot from the circuit and measure its resistance using a multimeter.

Measurement of output resistance Method 1: Measure the open circuit output voltage.

This is the Thevenin voltage. Output resistance of the circuit is actually the Thevenin

resistance in series with the Thevenin voltage. Connect a known value resistor, say 1 k

and measure the voltage across it. A reduction in the output voltage can be observed.

Calculate the current through the resistor. Since this current also flows trough the

Thevenin resistance, output resistance is the ratio of the difference in the output voltage

to the current.

Method 2: Connect a pot at the output of the circuit. Adjust the pot until the voltage

across it is 50% of the open circuit voltage. Remove the pot from the circuit and measure

its resistance using a multimeter.

3. Set up an RC coupled amplifier using a PNP transistor for a gain = 20 dB and stability

factor = 5.

When a PNP transistor is used, polarity of supply voltage VCC must be reversed. Convert

dB to linear scale. Take stability factor 5 = 1 + RB/RE , where RB = R1 parallel with

R2.

4. Design and set up an RC coupled amplifier for a stability factor of 5 and fH = 30 kHz.

Design the amplifier as described in the previous question. Use a capacitor in parallel to

the output to function as a low pass filer for a cut off frequency fH = 1/2πRCC.


11. How is the input of the RC coupled amplifier phase shifted by 180 at the output?

The collector voltage is given by the expression VC = VCC − ICRC . The increase in the

input voltage causes an increase in the collector current. Increase in the collector current

reduces the collector voltage. Inverse is also true. Thus the amplifier provides the phase

inversion.

Exercise

1. Differentiate between ac and dc load lines? Explain their importance in amplifier analysis.

2. Why is the center point of the active region chosen for dc biasing?

3. What happens if extreme portions of the active region are chosen for dc biasing?

4. Draw the output characteristics of the amplifier and mark the load-line on it. Also mark

the three regions of operation on the output characteristics.

5. Which are the different forms of coupling used in multi-stage amplifiers?

6. Draw hybrid and hybrid-π equivalent models of a transistor in the CE configuration.

7. Draw the Ebers-Moll model of a BJT.

8. What are self bias and fixed bias?

9. Give a few applications of RC-coupled amplifier.

Table 1.1: Maximum ratings of commonly used transistors

Number Type Application IC β = hFE Package

BC107 Si, NPN Audio, low power 100 mA 100-500 TO 18

2N2222 Si, NPN Switching 800 mA 100-300 TO 18

SL100 Si, NPN General purpose 1 A 40-300 TO 5

SK100 Si, PNP General purpose 1 A 40-300 TO 5

BC147 Si, NPN Driver 200 mA 125-500 MM 10

BC177 Si, PNP Driver 200 mA 75-260 TO 18

BF194 Si, NPN AM radio 30 mA 67-220 TO 92

BF195 Si, NPN AM radio 30 mA 36-125 MM 10

2N3055 Si, NPN High power 15 A 20-70 TO 3


1.3 TWO STAGE RC-COUPLED AMPLIFIER

Aim To design, set up and study a two stage RC coupled CE amplifier using BJT.

Components and equipments required Transistor, dc source, capacitors, resis-

tors, bread board, signal generator, multimeter and CRO.

Theory Multistage amplifiers are used in cascade to improve parameters such as

voltage gain, current gain, input impedance and output impedance etc. Common

emitter stages are cascaded to increase the voltage gain. A two stage amplifier provides

an overall voltage gain of A1A2, where A1 and A2 are the gains of first and second

stages respectively. Since each stage provides a phase inversion, the final output signal

is in phase with the input signal.

The input impedance of the second stage is in parallel with RC1 of the first stage.

The ac voltage gain of the first stage is A1 = RC1||Rin2/(re + Re) where Rin2 is the

input resistance of the second stage. Rin2 = R12||R22||(1 + hFEre)

The ac voltage gain of the second stage is A2 = (RC2||RL)/re

Care must be taken while selecting A1 and A2. If A1 is large, the input to the

second stage will become too high. This may pull out the transistor of the second stage

from active region. For example, if we need an overall voltage gain of 100, select A1

= 4 and A2 = 25. Gain of the first stage can be controlled by a negative feed back in

series with the emitter. This is achieved by the unbypassed resistor Re.

Circuit diagram

Ω

µ

Vin100 mV

CC1 22 F

+-

R2110 k

VCC +12 V

R1147 k

RC12.2 k CC2 µ22 F

+ -

BC107

470R ‘e

Ω470 RL

Ω

R22

R1247 k

RC22.2 k CC2 µ22 F

+ -

BC107

680RE CE

µ33 F+

-10 k

Cµ33 F

+-

E

ReΩ180


RLCC >> TS where TS is the lowest signal frequency (20 Hz).

CC = 1/(2π20RL) = 360 µF . Use 470 µF std.

Class-AB power amplifier

R1 k

- +- +

+VCC +6 V

T2SL100

- +

T1SK100

R

RL22 Ω

- +

1N4001

VO

1 k

Vin 2 VPP

20 Hz

µFCC 470

µFCC 470

µFCC 470

1N4001

RB

1 k

Design

Design of class-AB power Design of RL and CC is same as that of class-B amplifier.

Design of R and RB The bias current through the compensating diodes ID is

same as the ICQ in order to match the diode curves and VBE curves of the transistor.

ICQ should be 1 to 5 percent of collector saturation current ICsat.

Average current ICsat = VCEQ/πRL = 3/πRL = 43 mA

ICQ = ID = ICsat × 5% = 2.15 mA

Applying KVL in the diode bias network, 6 V = ID × 2R+ 1.2 V + ID ×RB

ID ×RB should be about 2 V to drive into class-AB.

ID ×RB = 2 V . From this RB = 930 Ω. Use 1 k.

Waveforms


5. Calculate the bandwidth of the amplifier using the expression BW = fH − fL.

Observation and graph

Gain in dB

-3 dB

log fL log fHlog f

f in Hz

V =100mVinV in Voltso Gain (dB)

Result Bandwidth =· · · · · · Hz.

Answered viva-voce questions

1. Why is a cascode amplifier called as wide band amplifier?

The miller capacitance present in ordinary CE amplifier limits the high frequency op-

eration. But in cascode amplifier miller capacitance is absent and hence bandwidth is

widened.

2. What are the characteristics of a cascode amplifier?

AV = Same that of CE stage, Zi = Same as that of CE stage

Aj = Approximately equal to that of CE stage, Z0 = Very high like CB stage.

1.12 RC PHASE SHIFT OSCILLATOR

Aim To design and set up an RC phase shift oscillator using BJT and to observe the

sinusoidal output waveform.

Components and equipments required Transistor, dc source, capacitors, resis-

tors, potentiometer, breadboard and CRO.

Theory An oscillator is an electronic circuit for generating an ac signal voltage with

a dc supply as the only input requirement. The frequency of the generated signal is

decided by the circuit elements. An oscillator requires an amplifier, a frequency selec-

tive network, and a positive feedback from the output to the input. The Barkhausen

criterion for sustained oscillation is Aβ = 1 where A is the gain of the amplifier and β

is the feedback factor. The unity gain means signal is in phase. (If the signal is 180

out of phase, gain will be −1.)


If a common emitter amplifier is used, with a resistive collector load, there is a

180 phase shift between the voltages at the base and the collector. Feedback network

between the collector and the base must introduce an additional 180 phase shift at a

particular frequency.

In the figure shown, three sections of phase shift networks are used so that each

section introduces approximately 60 phase shift at resonant frequency. By analysis,

resonant frequency f can be expressed by the equation,

f =1

2πRC√

6 + 4Rc/R

The three section RC network offers a β of 1/29. Hence the gain of the amplifier

should be 29. For this, the requirement on the hFE of the transistor is found to be

hFE ≥ 23 + 29(R/RC) + 4(RC/R).

The phase shift oscillator is particularly useful in the audio frequency range.

Circuit diagram

Ω µF

R147 k

VCC +12 V

RC2.2 k

R210 k

RE680

+- C 22

BC107

µFC 0.01

R4.7 k

R4.7 k

µFC 0.01 µFC 0.01

R4.7 k

CC 1µF+ - Vo

Design

Output requirements Sine wave with amplitude 10 VPP and frequency 1 kHz.

Design of the amplifier Select transistor BC107. It can provide a gain more

than 29 because its minimum hFE is 100.

DC biasing conditions VCC = 12 V, IC = 2 mA,VRC = 40% of VCC = 4.8 V,

VRE = 10% of VCC = 1.2 V and VCE = 50% of VCC = 6 V.


Waveform

T

Vo

t

Result Amplitude and frequency of sine wave = · · · · · · V, · · · · · · Hz respectively.

Troubleshooting Ensure that the amplifier provides sufficient gain. For this, disconnect

the feedback, feed an input sine wave to the amplifier and observe the output. Gain should be

more than 33.

Answered examination questions

1. Obtain two sinusoidal signals which are 180 out of phase with each other.

This can be obtained from an RC phase shift oscillator. Two 180 out of phase signals can

be obtained from the base and collector terminals of the transistor. But the amplitude

of the signal at base will be small and distorted.

Answered viva-voce questions

1. Classify the sinusoidal oscillators.

Sinusoidal oscillators can be classified as RC and LC oscillators. LC oscillators are used

for high frequency generation while RC oscillators for audio frequency generation.

2. Explain Barkhausen criteria for sustained oscillation.

a) Total loop gain (Aβ) of the circuit must be exactly unity, where A is the gain of the

amplifier and β is the feedback factor. b) Total phase shift around the loop must be 360.

3. What are the practical applications of a phase shift oscillator?

RC-phase shift oscillator is widely used as audio frequency oscillator.

4. What happens when CE is removed? Why?

When CE is removed, gain of the amplifier decreases and oscillation gets damped.

5. Why is a minimum hFE value required for the circuit to function as an oscillator?

A minimum hFE is required to obtain sufficient gain for the amplifier part to satisfy the

Barkhausen criteria for oscillation.

6. How does one RC section generate a phase difference of 60?

Phase shift introduced by one RC network is tan−1(ωRC). Suitable values of R and C

will provide 60 phase shift between input and output of one RC network at a particular

frequency.


1.17 SERIES VOLTAGE REGULATORWITHOUT FEED-

BACK

Aim To study the performance of zener diode regulator with emitter follower output

and to plot line regulation and load regulation characteristics.

Components and equipments required Transistor, zener diode, resistor, rheostat,

dc source, voltmeter, ammeter and bread board.

Theory The limitations of an ordinary zener diode regulator are, the changes in

current flowing through the zener diode cause changes in output voltage, the maximum

load current that can be supplied is limited and large amount of power is wasted in

zener diode and series resistance.

These defects are rectified in a zener regulator with emitter follower output. It is a

circuit that combines a zener regulator and an emitter follower. The dc output voltage

of the emitter follower is V = VZ − VBE . When input voltage changes, zener voltage

remains the same and so does the output voltage.

In an ordinary zener regulator, if the load current IL required is in the order of

amperes, zener diode should also have the same current handling capacity. But in

zener regulator with emitter follower output, current flowing through the zener is IL/β.

Another advantage of this circuit is low output impedance.

The expression for the output voltage can also be expressed as V = Vi−VCE . This

means that when the input voltage increases, output remains constant by dropping

excess voltage across the transistor.

The limitation of this circuit is that the output voltage directly depends on the

zener voltage. This is rectified in the series voltage regulator with feedback using error

amplifier.

Procedure

1. Set up the circuit on the bread board after identifying the component leads.

Verify the circuit using a multimeter.

2. Note down output voltage by varying the input voltage from 0 V to 30 V in

steps of 1 V. Plot line regulation characteristics with Vi along x-axis and V along

y-axis. Calculate percentage line regulation using the expression ∆V/∆Vi.

3. Keep the input voltage at 15 V and note down output voltage by varying load

current from 0 to 500 mA in equal steps using a rheostat. Plot load regulation

characteristics with IL along x-axis and V along y-axis.


4. Measure the full load voltage VFL by adjusting the rheostat until ammeter reads

500 mA.

5. Remove the rheostat and measure the output voltage to get no-load voltage VNL.

6. Mark VNL and VFL on the load regulation characteristics and calculate load

regulation as per the equation,

VR =VNL − VFL

VNL100%

Circuit diagram

0 - 30 V

100 Ω1/2 W RB

SZ9.1

2N3055 A+ _

0 - 1 A

0 - 30 V800 1 A

ΩV

+

_0 - 30 VV

+

_

Design

Output requirements V = 8.5 V, IL = 500 mA when input is in the range 15± 5 V.

Selection of transistor Select the power transistor 2N3055

Details of 2N3055: type : Si-NPN. Application: AF Power, Maximum ratings:

VCB = 100 V, VCE = 60 V, VEB = 7 V, IC max = 15 A, P = 115 W, Nominal

ratings: VCE = 4 V, IC = 4 A, hFE = 20 to 70.

Pins are pointing towards viewer

2N3055

Top view

C is the case itself

Selection of zener diode

We know that, VZ = V + VBE . Since the required output voltage V = 8.5 V,

VZ = V + 0.6 V = 9.1 V . Select SZ9.1 zener diode.


Result

Mid-band gain of IF amplifier = · · · · · ·Centre frequency = · · · · · · Hz

1.40 VOLTAGE CONTROLLED OSCILLATOR

Aim To design and set up a voltage controlled oscillator using astable multivibrator

for a centre frequency of 1 kHz.

Equipments and components required Transistors, resistors, capacitors, signal

generator, bread board and dc supply.

Theory VCO is an oscillator whose frequency can be varied in accordance with

an input voltage. It is possible to convert an astable multivibrator into a VCO by

connecting an additional voltage source VBB to R1 and R2. The collector supply

remains VCC . If VBB is varied, the time period of output T changes in accordance

with the equation T = 2RCln(1 + VCC/VBB). With a fixed value of VCC , it can be

seen from the equation that the output frequency of the circuit is nonlinear function of

VBB. However, this relation can be linearized by employing a constant current source

for linear charging of the capacitor. This circuit is used as an FM generator because

frequency of a signal is varied according to the amplitude of another signal.

Circuit diagram

VCC +10 V

RC2.7 k

RE22 k

RE22 k

RC2.7 k

R1220 k

R2270 k

VC2

Q2

BC107

C µ0.1 F

VB2VB1

C 0.1 Fµ

Q1

BC107

Q3 2N869

Vin

B C

E

C B EPinout of 2N869

Q4 2N869


Design

Choose transistor BC107 as Q1 and Q2. For the design of astable part, refer

astable multivibrator experiment.

DC conditions VCC = 10 V and IC = 2 mA. Let Vin be 2 V.

Design of RE Voltage across RE = Vin − 2VBE = 2 V-1.2 V = 0.8 V.

Base current through Q1 or Q2 is IB = IC/hFE = 2 mA/100 = 20 µA

To ensure saturation, take base current = 2IB. Then RE < VRE/IB =

0.8 V/40 µA = 20 k. Use 22 k std.

Use 2N869 or equivalent as Q3 and Q4

Data of 2N869:

Maximum ratings: VCB = 25 V, VCE = 18 V, VEB = 5 V, IC = 100 mA

Nominal ratings: VCE = 5 V, IC = 10 mA, hFE = 20 (min)

Design of R1 and R2 Assume base current IB of Q3 and Q4 = IC/hFE =

40µA/20 = 2 µA

Let 10IB flows through R1 and 9IB through R2

A +5 V at the base of Q3 and Q4 will ensure that their collector base junctions

get reverse biased to function as a CB amplifier.

Then R1 = 5V/10IB = 250 k. Use 220 k std. R2 = 5V/9IB = 278 k. Use 270 k.

Graph

f Hz

VinVolts

Vin Volts f in Hz

Procedure

1. Set up a conventional astable multivibrator using base resistors 82 k. Observe

the collector and base waveforms of both transistors.


2. If the astable multivibrator is found to be working properly, connect the remaining

components.

3. Feed a 5 V, 10 Hz sine wave as the input Vin. Observe the input and output

waveforms on CRO.

4. Replace the sine wave by a 5 V dc. Vary the dc voltage and note down the

corresponding frequency. Enter it in tabular column and draw the graph with dc

voltage along x-axis and frequency along y-axis.

Waveforms

Vin

VB1

VC1

t

t

t

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