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CMR INSTITUTE OF TECHNOLOGYNo.132, AECS Layout, I.T.P.L. Road, Kundalahalli, Bangalore- 560 037
The bridge rectifier circuit is essentially a full wave rectifier circuit, using
four diodes, forming the four arms of an electrical bridge. To one diagonal of the
bridge, the ac voltage is applied through a transformer and the rectified dc
voltage is taken from the other diagonal of the bridge. The main advantage of
this circuit is that it does not require a center tap on the secondary winding of
the transformer; ac voltage can be directly applied to the bridge.
The bridge rectifier circuit is mainly used as a power rectifier circuit for
converting ac power to dc power, and a rectifying system in rectifier type ac
meters, such as ac voltmeter in which the ac voltage under measurement is first
converted into dc and measured with conventional meter.
CIRCUIT DIAGRAM:
BRIDGE RECTIFIER WITHOUT FILTER CAPACITOR
Department of Electronics & Communication Engg. – CMRIT 7
RL
- +
BRIDGE
1
4
3
2
C2
0.1UF
AC(230V/50HZ)
12V
12V
0
Step downTransformer
Vo
A
Ammeter(0-250mA)
+ -
Analog Electronics Laboratory Manual - 06ESL37
BRIDGE RECTIFIER WITH FILTER CAPACITOR
C1
470UF
RL
- +
BRIDGE
1
4
3
2
C2
0.1UF
AC(230V/50HZ)
12V
12V
0
Step downTransformer
Vo
A
Ammeter(0-250mA)
+ -
+ -
DESIGN:
Vin rms = 12VVin m = 2Vin rms = 16.97V
VO DC = 2Vm/ = 10.8V
Given VO DC = 10V
IO DC = 100mA
RL = VO DC / IO DC = 100
Ripple = r = Vo rms / VO DC = 0.48 Design for the filter capacitor
Ripple = 1/(43 f C RL)
Given r = .06 C = 1/(43 f r RL)
RL = 100
f = 50Hz
= 470UF
Efficiency = PDC /PAC
= (I2DC * RL) / [(Irms)2 * (RL + RF)]
Regulation % Regulation =
Department of Electronics & Communication Engg. – CMRIT 8
Analog Electronics Laboratory Manual - 06ESL37
PROCEDURE:
1. Connections are made as shown in the circuit diagram
2. Switch on the AC power supply
3. Observe the wave form on CRO across the load resistor and measure the o/p amplitude and frequency.
4. Note down RL, IDC, VODC , Vinac, Voac in the tabular column for different load resistances.
5. Calculate the ripple factor, efficiency and regulation for each load resistance.
6. Repeat the above procedure with filter capacitor.
TABULAR COLUMN:
Sl. No.
RL IDC VO (DC)VIN
(AC)VO (AC) Ripple Efficiency
Regulation
WAVEFORMS:
Vin
20
t
0
- 20
Vo
0 Vo (Without Filter)
t
Vo (with filter)
VC
t
RESULT:
Ex.No:02 CLAMPING CIRCUITS
Department of Electronics & Communication Engg. – CMRIT 9
Analog Electronics Laboratory Manual - 06ESL37
AIM:
Design a clamping circuit for the given output.
COMPONENTS REQUIRED:
Sl. No. Components Details Specification Qty
1. Diodes BY127 1 No
2. Capacitors 0.1 F 1 No
Signal generator, Cathode Ray Oscilloscope (CRO) with Probes, Dual Power Supply, Connecting Board
THEORY: A clamper is one, which provides a D.C shift to the input signal. The D.C
shift can be positive or negative. The clamper with positive D.C shift is called
positive clamper and clamper with negative shift is called negative clamper.
Consider a clamper circuit shown below.
In the positive half cycle as the diode is forward biased the capacitor charges to
the value with the polarity as shown in the figure. In the negative half
cycle the diode is reverse biased. Hence the output is .
Initially let us assume that the capacitor has charged to i.e.
(5 – 0.5) = 4.5V
Then in the positive half cycle diode is forward biased and applying KVL to
the loop,
Vin –VC –V0 = 0 V0 =Vin –VC
When Vin = 0 V0 = 0 - 4.5 = - 4.5V
Vin = 5V V0 = 5 – 4.5 = 0.5V
In the negative half cycle
When Vin = -5V V0 = -5 – 4.5 = -9.5V
The output shifts between 0.5V and – 9.5V.Here the output has shifted
down by 4.5V
The peak to peak voltage at the output of a clamper is the same as that of
the input.
Department of Electronics & Communication Engg. – CMRIT 10
D 1
B Y 1 2 7
0 . 1 u
+ -
VoVin
C
Analog Electronics Laboratory Manual - 06ESL37
CIRCUIT DIAGRAM AND DESIGN:
Given Vin = 10V (p-p)
A] In the positive half cycle:
Diode is forward biased.
Applying KVL to loop 1
Vin – VC – VD = 0
VC = Vin – VD
= 5 - 0.5 4.5V
In the negative half cycle:
Vin – VC – V0 = 0
V0 = Vin – VC
When Vin = 0 V0 = - 4.5V
When Vin = 5V V0 = 0.5V
When Vin = -5V V0 = -9.5V
B]In the negative half cycle:
Diode is forward biased
Applying KVL to loop 1
Vin + VC + VD = 0
VC = - ( Vin + VD)
VC = - (-5 + 0.5)
= 4.5V
In the positive half cycle:
Diode is reverse biased.
Apply KVL to the loop
Vin + VC – V0 = 0
V0 = Vin + VC
When Vin = 0 V0 = 4.5V
When Vin = 5V V0 = 5 + 4.5 = 9.5V
When Vin = - 5V V0 = - 0.5V
Department of Electronics & Communication Engg. – CMRIT 11
D 1
B Y 1 2 7
0 . 1 u
+ -
VoVin
C
D 1BY1 2 7
0 .1 u
- +
VoVin
C
Analog Electronics Laboratory Manual - 06ESL37
C] Assume VR = 2V
In the positive half cycle:
Diode is forward biased.
Apply KVL to loop 1
Vin – VC – VD – VR = 0
VC = Vin – VD – VR
= 5 - 0.5 – 2
= 2.5V
In the negative half cycle:
Diode is reverse biased
Vin – VC – V0 = 0
V0 = Vin – VC
When Vin = 0V V0 = - 2.5V
When Vin = 5V V0 = 2.5V
When Vin = -5V V0 = -7.5V
D] Assume VR = 2V
In the positive half cycle:
Diode is forward biased and the capacitor charges.
Apply KVL to loop 1
Vin – VC – VD + VR = 0
VC = Vin – VD + VR
= 5 –0.5 +2
= 6.5V
In the negative half cycle:
Vin – VC – V0 = 0
V0 = Vin – VC
When Vin = 0V V0 = - 6.5V
When Vin = 5V V0 = - 1.5V
When Vin = -5V V0 = - 11.5V
Department of Electronics & Communication Engg. – CMRIT 12
Vo
0.1u
D1 BY127
+ -
Vin
C
VR
VoD1 BY127
0.1u
C
Vin
-+
VR
Analog Electronics Laboratory Manual - 06ESL37
E]In the negative half cycle:
Assume VR = 2V
Diode is forward biased and capacitor charges.
Apply KVL to the loop1
Vin + VC + VD + VR = 0
VC = - ( Vin + VR + VD)
= - (- 5 + 0.5 + 2)
= 2.5V
From the fig. we see that
Vin + VC – V0 = 0
V0 = Vin + VC
When Vin = 0 V0 = 2.5V
When Vin = 5V V0 = 7.5V
When Vin = -5V V0 = -2.5V
F] VR = 2V
In the negative half cycle:
Diode is forward biased and capacitor charges.
Apply KVL to loop 1
Vin + VC + VD - VR =0
VC = - ( Vin + VD - VR)
= - (- 5 + 0.5 – 2)
= 6.5V
From the circuit we see that,
Vin + VC - V0 =0
V0 = Vin – VC
When Vin =0V V0=6.5V
When Vin = 5V V0= 11.5V
When Vin = - 5V V0= 1.5V
PROCEDURE:
1. Rig up the circuit as shown in the circuit diagram.
2. Give a sinusoidal input of 10V peak to peak
3. Check and verify the output.
Department of Electronics & Communication Engg. – CMRIT 13
Vo
0.1u
D1BY127
VR
C
Vin
- +
Vo
0.1u
D1BY127C
Vin
+-
VR
Analog Electronics Laboratory Manual - 06ESL37
WAVEFORMS:
Vin
5V
0 t - 5V
V0
0.5 0 t
[A] - 4.5
- 9.5
V0
9.5
4.5
[B] 0 t - 0.5
V0
2.5 0
[C] t - 2.5
- 7.5
Department of Electronics & Communication Engg. – CMRIT 14
Analog Electronics Laboratory Manual - 06ESL37
V0
0 t
[D] - 1.5
- 6.5
- 11.5
V0
7.5
2.5
[E] 0 t
- 2.5
V0
11.5
6.5
[F]
1.5
0 t
RESULT:
Department of Electronics & Communication Engg. – CMRIT 15
Analog Electronics Laboratory Manual - 06ESL37
Ex.No:03 CLIPPING CIRCUITS
AIM:
Design a clipping circuit for the given values.
COMPONENTS REQUIRED:
Sl. No. Components Details Specification Qty
1. Diodes BY127 1 No
2. Resistors 10 K 1 No
THEORY:
The process by which the shape of a signal is changed by passing the
signal through a network consisting of linear elements is called linear wave
shaping. Most commonly used wave shaping circuit is clipper. Clipping circuits
are those, which cut off the unwanted portion of the waveform or signal without
distorting the remaining part of the signal. There are two types of clippers
namely parallel and series. A series clipper is one in which the diode is
connected in series with the load and a parallel clipper is one in which the diode
is connected in parallel with the load.
CIRCUIT DIAGRAM AND DESIGN:
Assume Vin = 10V (Peak to Peak)
(a) Consider the circuit in fig. 1
In the positive half cycle D is forward biased
V0 = Vin – 0.5 = 5 – 0.5 = 4.5 (0.5V is the diode drop)
In the negative half cycle D is reverse biased
V0 = 0V
(b) Consider the circuit in fig. 2
In the positive half cycle D is reverse biased
V0 = 0V
In the negative half cycle D is forward biased
Applying KVL to the loop
Vin + VD – V0 = 0
V0 = Vin + VD = -5 + 0.5 = - 4.5V
Department of Electronics & Communication Engg. – CMRIT 16
10k
D 1
BY1 2 7Vin Vo
(a)
10k
D 1
BY1 2 7Vin Vo
Analog Electronics Laboratory Manual - 06ESL37
(c) Consider the circuit in fig. 3
Given VR = 2.5V
In the positive half cycle
(i) When |Vin| > |VD + VR|, D is forward biased
Applying KVL, we get
Vin = VD + VR + V0
V0 = Vin – VD – VR
V0 = 5 – 0.5 – 2.5
V0 = 2V
(ii) When |Vin| < |VD + VR|, D is reverse biased
V0 = 0V
In the negative half cycle, D is reverse biased
V0 = 0V
(d) Consider the circuit in fig. 4
Assume VR = 3V
In the positive half cycle, D is reverse biased
V0 = 0V
In the negative half cycle
(i) When |Vin| > |VD + VR|, D is forward biased
Applying KVL, we get
Vin = - VD - VR + V0
V0 = Vin + VD + VR
V0 = -5 + 0.5 + 3
V0 = -1.5V
(ii) When |Vin < |VD + VR|, D is reverse biased
V0 = 0V
Department of Electronics & Communication Engg. – CMRIT 17
D 1
BY1 2 710k
V R
Vin Vo
V R
10k
D 1
BY1 2 7Vin Vo
Analog Electronics Laboratory Manual - 06ESL37
(e) Consider the circuit in fig. 5
Assume VR1 = 2.5V and VR2 = 3V
In the positive half cycle, D2 is reverse biased
(i) When |Vin| > |VD1 + VR1|, D1 is forward biased
Applying KVL, we get
Vin = VD1 + VR1 + V0
V0 = Vin - VD1 - VR1
V0 = 5 - 0.5 – 2.5
V0 = 2V
(ii) When |Vin < |VD1 + VR1|, D1 is reverse biased
V0 = 0V
In the negative half cycle
(i) When |Vin| > |VD2 + VR2|, D2 is forward biased
Applying KVL, we get
Vin = - VD - VR + V0
V0 = Vin + VD2 + VR2
V0 = -5 + 0.5 + 3
V0 = -1.5V
(ii) When |Vin < |VD2 + VR2|, D2 is reverse biased
V0 = 0V
(f) Consider the circuit in fig. 6
During the positive half cycle, D is forward biased
V0 = VD = 0.5V
During negative half cycle, D is reverse biased
V0 = Vin
Department of Electronics & Communication Engg. – CMRIT 18
BY1 2 7 V R2
10kBY1 2 7 V R1 VoD 1Vin
1
2
D 2
10k
D 1
BY1 2 7
VoVin
Analog Electronics Laboratory Manual - 06ESL37
(g) Consider the circuit in fig. 7
During positive half cycle,
D is reverse biased
V0 = Vin
During negative half cycle,
D is forward biased
V0 = -VD = -0.5V
(h) Consider the circuit in fig. 8
During positive half cycle
(i) When |Vin| > |VD + VR|,
D is forward biased
V0 = VD + VR = 0.5 + 2.5
V0 = 3V
(ii) When |Vin| < |VD + VR|, D is reverse biased
V0 = Vin
During negative half cycle, D is reverse biased
V0 = Vin
(i)Consider the circuit in fig. 9
Assume VR = 2.5V
During positive half cycle,
D is reverse biased
V0 = Vin
During negative half cycle
(i) When |Vin| > |VD + VR|,
D is forward biased
Applying KVL to the loop, we get
V0 = -VD - VR = - 0.5 - 2.5
V0 = -3V
(ii) When |Vin| < |VD + VR|,
D is reverse biased
V0 = Vin
During negative half cycle, D is reverse biased
V0 = Vin
Department of Electronics & Communication Engg. – CMRIT 19
10k
D 1BY1 2 7
V R
Vin Vo
10k
D 1BY1 2 7Vin Vo
10k
D 1BY1 2 7
V R
Vin Vo
+
-
Analog Electronics Laboratory Manual - 06ESL37
(j) Consider the circuit in fig. 10
Assume VR1 = VR2 = 2.5V
During positive half cycle, D2 is reverse biased.
(i) When |Vin| > |VD1 + VR1|, D1 is forward biased
V0 = VD1 + VR1 = 0.5 + 2.5
V0 = 3V
(ii) When |Vin| < |VD1 + VR1|,
D1 is reverse biased
V0 = Vin
During negative half cycle,
D1 is reverse biased
(i)When |Vin| > |VD2 + VR2|, D2 is forward biased
Applying KVL to the loop, we get
V0 = -VD2 - VR2 = -0.5 - 2.5
V0 = -3V
(ii) When |Vin| < |VD2 + VR2|, D2 is reverse biased
V0 = Vin
(k) Consider the circuit in fig. 11
Assume VR1 = 3.5V and VR2 = 2V
During positive half cycle
(i) When |Vin| > |VD1 + VR1|
D1 is forward biased and
D2 is reverse biased
V0 = VD1 + VR1 = 0.5 + 3.5 = 4 V
(ii) When |Vin| < |VR2 – VD2|
D1 is reverse biased and
D2 is forward biased
V0 = -VD2 + VR2 = - 0.5 + 2 1.5V
During negative half cycle,
D1 is reverse biased and D2 is forward biased
V0 = -VD2 + VR2 = - 0.5 + 2 V0 = 1.5VPROCEDURE:
1. Rig up the circuit as shown in the fig.2. Give a sinusoidal input of 10V peak to peak.3. Check the output at the output terminal.4. To plot the transfer characteristics, connect channel 1 of the CRO to
the output and channel 2 to the input and press the XY knob5. Adjust the grounds of both the channels to the centre.6. Measure the designed values.
Department of Electronics & Communication Engg. – CMRIT 20
D 1BY1 2 7
V R1 V R2
10k
BY1 2 7Vin
D 2
Vo
1
Vo
Vin
10k
D1
BY127
VR1
BY127
D2
VR2
Vo
Analog Electronics Laboratory Manual - 06ESL37
WAVEFORMS:
Series Clipper
Vin
5
3
0 t
- 3.5
- 5
Vo
4.5
(a) 0 t
Vo(b)
0 t
- 4.5
2.0(c)
0 t
(d) 0 t
-1.5
2
(e) 0 t
-1.5
Department of Electronics & Communication Engg. – CMRIT 21
Vin
Vo
Vin
Vo
Vin
Vo
3
Vin
Vo
-3.5
Vin
Vo
-3.5
3
Analog Electronics Laboratory Manual - 06ESL37
Shunt ClipperVin
+5
0 t
+5
(f) 0.5 t
0.5
-5
4.5
(g) 0 t 0.5
VO
3
(h) t
-5
+5
(i) 0 t
-3
+3
(j) 0 t
-3
+4
1.5
( k ) 0 t
RESULT:
Department of Electronics & Communication Engg. – CMRIT 22
Vin
Vo
Vin
Vo
Vin
Vo
-3.0
Vin
Vo
3.0
Vin
Vo
Vin
Vo
3.0
Analog Electronics Laboratory Manual - 06ESL37
Ex.No:04 RC COUPLED AMPLIFIER - BJT
AIM:
Design an RC coupled single stage BJT amplifier and determine its gain
and frequency response, input and output impedances.
COMPONENTS REQUIRED:
Sl. No. Components Details Specification Qty
1. Transistor SL100 1 No
2. Capacitors 0.1 f , 47µf Each 1 No
3. Resistors 22K, 4.7K, 1.2K, 330 Each 1 No
DC Supply, Signal Generator, CRO with Probe
CIRCUIT DIAGRAM:
To Find Input Impedance
To Find the Output Impedance
DESIGN:
Given VCC = 12V, IC = 4mA, = 100.
Department of Electronics & Communication Engg. – CMRIT 23
Department of Electronics & Communication Engg. – CMRIT 36
Analog Electronics Laboratory Manual - 06ESL37
PROCEDURE:
1. Rig up the circuit as shown in the circuit diagram.
2. Before connecting the feedback network, check the circuit for biasing conditions i.e. check VCE, and VRE.
3. After connecting the feedback network. Check the output.
4. Check for the sinusoidal waveform at output. Note down the frequency of the output waveform and check for any deviation from the designed value of the frequency.
5. To get a sinusoidal waveform adjust 1K potentiometer.
6. DCB/DIB can be varied to vary the frequency of the output waveform.
TABULAR COLUMN
HARTLEY OSCILLATOR COLPITTS OSCILLATOR
SL NO C fo SL NO L fo
WAVEFORM:
Vo
0
t
T
frequency fo = 1/T
RESULT:
Department of Electronics & Communication Engg. – CMRIT 37
Analog Electronics Laboratory Manual - 06ESL37
Ex.No:06 CRYSTAL OSCILLATOR
AIM:
To design a crystal oscillator to oscillate at the specified crystal frequency.
COMPONENTS REQUIRED:
Sl. No. Components Details Specification Qty
1. Transistor BC109 1 No
2. Capacitors0.1 f 2 No
47µf 1 No
3. Resistors 18K, 1.8K, 3.9K, 4701 K Pot
Each 1 No
4. Crystal 2 MHz or 1.8 MHz 1 No
DC Supply, CRO with Probe
CIRCUIT DIAGRAM:
Department of Electronics & Communication Engg. – CMRIT 38
Department of Electronics & Communication Engg. – CMRIT 39
Analog Electronics Laboratory Manual - 06ESL37
PROCEDURE:1. Rig up the circuit as shown in the circuit diagram.
2. Before connecting the feedback network, check the circuit for biasing conditions i.e. check VCE, and VRE.
3. After connecting the feedback network. Check the output.
4. Check for the sinusoidal waveform at output. Note down the frequency of the output waveform and check for any deviation from the designed value of the frequency.
5. To get a sinusoidal waveform adjust 1K potentiometer.
WAVEFORM:
Vo
0
t
T
frequency fo = 1/T
RESULT:
Department of Electronics & Communication Engg. – CMRIT 40
Analog Electronics Laboratory Manual - 06ESL37
Ex.No:07 RC PHASE SHIFT OSCILLATOR
AIM:
Design a circuit, which generates repetitive waveform (Sinusoidal signal)
of frequency 7 KHz.
COMPONENTS REQUIRED:
Sl. No. Components Details Specification Qty
1. Transistor SL100 1 No
2. Capacitors 0.02 f 3 NoS.
0.1 f 2 Nos.
47µf 1 No
3. Resistors 22K, 4.7K, 1.2K, 3301 K Pot
Each 1 No
470 3 Nos.
DC Supply, CRO with Probe
THEORY:
RC Phase shift oscillator consists of a single transistor amplifier and a
RCphase shift network. The Phase shift network consists of three RC sections.
Here a fraction of the output of the amplifier is passed through a phase shift
network before feeding back to the input. The phase shift in each section is 600
so that the total phase shift is 1800.Another 1800 phase shift is provided by the
transistor amplifier and therefore the total phase shift of the oscillator is 360 0
.The frequency of oscillations is given by
fo = 1 / [26(RC)]
Let us consider a RC circuit..
Let I be the current flowing through both R and C. Then using I as the
reference vector,Vo is in phase with I while Vc ,the voltage across the capacitor
is 900 behind as shown in the figure.
Vi is the sum of Vo and Vc.Hence Vc is degrees ahead of Vi and represents a
phase shift of degrees
Vo = IR, Vc =IXc
Tan =Vc/Vo =Ixc/IR = Xc/R = 1/(2fCR)
Therefore f = 1/(2fCR Tan )
If there are 3 sections each must give approximately 600
i.e. = 600 Tan =3 =1.73
f= 1/(2CR3)
Department of Electronics & Communication Engg. – CMRIT 41
Analog Electronics Laboratory Manual - 06ESL37
The above phase discussion ignored the additional current I that flows
through C for other sections, so that Vc is actually larger than the value
2. Check the circuit for biasing, i.e. check VCE, VCC and VRE.
3. Give a sinusoidal input signal of 1KHz from a signal generator.
4. Set the input signal to a value such that the output doesn’t get clipped.
5. For different frequencies of the input signal, read the output on the voltmeter and verify that the gain is 1.
6. To measure input impedance, connect a resistor of 47k in series with the signal generator.
7. Measure the voltage at the input point (VS) and at the point after the resistor (VIN).
8. Current through the resistor is given by the expression I = (VS - VIN) / 47K.
9. Input impedance is given by ZIN = VIN / 47 K
10.To measure output impedance, connect a DRB in parallel with the output.
11.Adjust all the knobs of the DRB to maximum.
12.Start reducing the resistance in the DRB from a large value until the output reduces to half.
13.The resistance in the DRB is the output impedance.TABULAR COLUMN:
VIN = __________ constant
Frequency(Hz)
V0 (V) AV AV (dB)
Department of Electronics & Communication Engg. – CMRIT 62
Analog Electronics Laboratory Manual - 06ESL37
WAVEFORM:
Vin
Vin 0 t
V0
0 t Vin
RESULT:
Department of Electronics & Communication Engg. – CMRIT 63
Analog Electronics Laboratory Manual - 06ESL37
Ex.No: 12 TRANSFORMERLESS CLASS-B PUSH PULL POWER AMPLIFIER
Aim: Testing of a transformer less class-B push pull power amplifier and determination of its conversion efficiency.
COMPONENTS REQUIRED:
Sl. No. Components Details Specification Qty
1. TransistorSL100 1 No.
SK100 1 No.
2. Diode BY127 2 Nos.
3. Capacitors47 f 2 Nos.
470 µf 1 No.
4. Resistors220 2 No
DRB 1 No
DC Supply, CRO with Probe, Signal generator, AC millivoltmeter
Theory: In class B operation, to obtain output for the full cycle of signal, it is necessary to use two transistors and have each conduct on opposite half cycle, the combined operation providing a full cycle of output signal. Since one part of the circuit pushes the signal high during one half cycle and the other part pulls the signal low during the other half cycle, the circuit is referred to as a push pull circuit.
Circuit diagram:
Department of Electronics & Communication Engg. – CMRIT 64
Analog Electronics Laboratory Manual - 06ESL37
DESIGN:
Given Vcc =2.5V; RL= 10 Ω; IDC = 3mA
To Find R1 & R2:Applying KVL at the input circuit; We get ; Vcc = 2VR1 + 1.4Therefore; VR1 = 0.55V; VR1 =IDCR1 = 0.55V; R1 = 183Ω.Choose; R1 = R2 = 220Ω.
To Find Ci :Input coupling capacitor is given by, Xci >Zieff/10 >1.1K/10Xci > 1/2πfCi ;Ci >28μF; Choose Ci = 47μF
To Find CO:Output coupling capacitor is given by, Xco = 10Xco > 1/2πfCoCo > 318μF; Choose; Co = 470μFPoac=Vo2/8RL Pidc=VccIdc
Calculate circuit efficiency, η = Po (ac)/Pi(dc) = (π/4)Vo/Vcc = ?
Procedure:1. Connect the circuit as per the circuit diagram.2. Set VI = 3V, using the signal generator.3. Keeping the input voltage constant, vary the load resistor and note down
the readings of the ammeter and peak to peak output voltage.4. Calculate PDC, PAC and % efficiency η.5. Draw the plot of resistance versus output power.
Tabulation
Vi = ----------------
RL () VO (v) IDC(mA) PAC PDC %
Department of Electronics & Communication Engg. – CMRIT 65
Resistance(Ω)
Po (watts)
Analog Electronics Laboratory Manual - 06ESL37
Result:
BIBLIOGRAPHY
1. “Electronic devices and circuit theory”, Robert L.Boylestad and
Louis Nashelsky.
2. “Integrated electronics”, Jacob Millman and Christos C Halkias.
3. “Electronic devices and circuits”, David A. Bell.
4. “Electronic devices and circuits”, G.K.Mittal.
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Analog Electronics Laboratory Manual - 06ESL37
VIVA-VOCE QUESTIONS
1. What are conductors, insulators, and semi-conductors? Give egs.2. Name different types of semiconductors.3. What are intrinsic semiconductors and extrinsic semiconductors?4. How do you get P-wpe and N-type semiconductors?5. What is doping? Name different levels of doping.6. Name different types of Dopants. .7. What do you understand by Donor and acceptor atoms?8. What is the other name for p-type and N-type semiconductors?9. What are majority carriers and minority carriers?
10. What is the effect of temperature on semiconductors?11. What is drift current? .12. What is depletion region or space charge region?13. What is junction potential or potential barrier in PN junctioI).?14. What is a diode? Name different types of diodes and name its applications 15. What is biasing? Name different types w.r.t. Diode biasing16. How does a diode behave in its forward and reverse biased conditions?17. What is static and dyriantic resistance of diode?18. Why the current in the fo~ard biased diode takes exponential path?19. What do you understand 1?y AvaJanche breakdown and zener breakdown?20. Why diode is called unidirectional device.21. What is PIV of a diode22. What is knee voltage or cut-in voltage?23. What do you mean by transition capacitance or space charge capacitor?24. What do you mean by diffusion capacitance or storage capacitance?25. What is a transistor? Why is it called so? .26. Name different types, of transistors?27. Name different configurations in which the transistor is operated28. Mention the applications of transistor. Explain how transistor is used as switch 29. What is transistor biasing? Why is it necessary?30. What are the three different regions in which the transistor works?31. Why trmisistor is called current controlled device?32. What is FET? Why it is called so?33. What are the parameters ofFET?34. What are the characteristics of FET?35. Why FET is known as voltage controlled device?36. What are the differences between BJT and FET?37. Mention applications ofFET. What is pinch offvQltage, VGS(ofJ) and lDss38. What is an amplifier? What is the need for an amplifier circuit?39. How do you classify amplifiers? ,40. What is faithful amplification? How do you achieve this?41. What is coupling? Name different type.s of coupling42. What is operating point or quiescent point?43. What do you mean by frequency response of an amplifier?44. What are gain, Bandwidth, lower cutoff frequency and upper cutoff frequency?45. What is the figure of merit of an amplifier circuit?46. What are the advantages of RC coupled amplifier?47. Why a 3db point is taken to calculate Bandwidth?48. What is semi-log graph sheet? Why it is used to plot frequency response?49. How do you test a diode, transistor, FET?50. How do you identify the tenninals of Diode, Transistor& FET? Mention the type
number of the devices used in your lab.
Department of Electronics & Communication Engg. – CMRIT 67
Analog Electronics Laboratory Manual - 06ESL37
51. Describe the operation ofNPN transistor. Define reverse saturation current.52. Explain Doping w.r.t. Three regions of transistor53. Explain the terms hie/hib, hoelhob, hre/hrb, hre/hfb.54. Explain thermal run-.taway. How it can'be prevented.55. Define FET parameters and write the relation between them.56. What are Drain Characteristics and transfer characteristics?57. Explain the construction and working of FET58. What is feedback? Name different types.59. What is the effect of negative feedback on the characteristics of an amplifier?60. Why common collector amplifier is known as emitter follower circuit?61. What is the application of emitter follower ckt?62. What is cascading and cascoding? Why do you cascade the amplifier ckts.?63. How do you determine the value of capacitor?64. Write down the diode current equation.65. Write symbols of various passive and active components66. How do you determine th~value of resistor by colour code method?67. What is tolerance and power rating of resistor?68. Name different types of resistors.69. How do you c1assify resistors?70. Name different types of capacitors..71. What are clipping circuits? Classify them.72. Mention the application of clipping circuits.73. What are clamping circuits? Classify them74. What is the other name of clamping circuits?75. Mention the applications of clamping circuits.76. 'What is Darlington emitter follower circuit?77. Can we increase the number of transistors in Darlington emitter follower circuit?
Justify your answer.78. What is the different between Darlington emitter follower circuit & Voltage
follower circuit using Op-Amp. Which is better.79. Name different types of Emitter follower circuits.80. What is an Oscillator? Classify them.81. What ar~ The Blocks, which fonns an Oscillator circuits?82. What are damped & Un-damped Oscillations?83. What are Barkhausen's criteria?84. What type of oscillator has got frequency stability?85. What is the disadvantage of Hartley & Colpiit's Oscillator?86. Why RC tank Circuit Oscillator is used for AF range?87. Why LC tank Circuit Oscillator is used for RF range?88. What type of feedback is used in Oscillator circuit?89. In a Transistor type No. SL 100 and in Diode BY 127, what does SL and BY stands
for90. Classify Amplifiers based on: operating point selection.91. What is the efficiency of Class B push pull amplifier?92. What is the drawback of Class B Push pull Amplifier? How it is eliminated.93. What is the advantage of having complimentary symmetry push pull amplifier?94. What is Bootstrapping? What is the advantage of bootstrapping?95. State Thevenin's Theorem and Max.power transfer theorem.96. What is the figure of merit of resonance circuit?97. What is the application of resonant circuit?98. What is a rectifier? Classify.99. What is the efficiency of half wave and full wave rectifier?
100. What is the advantage of Bridge rectifier of Centre tapped type FWR
Department of Electronics & Communication Engg. – CMRIT 68
Analog Electronics Laboratory Manual - 06ESL37
101. What is the disadvantage of Bridge rectifier?102. What is a filter?103. Name different types of filter ckts.104. Which type of filter is used in day to day application and why?105. What is ripple and ripple factor? .106. What is the theoretical value of ripple for Half Wave and .Full wave rectifier?107. What is need for rectifier ckts.108. Why a step down transformer is used at the input of Rectifier ckt.109. What is TUF? .110. What is regulation w.r.t rectifier? And how it is calculated?111. What is figure of merit of Rectifier ckt.
Department of Electronics & Communication Engg. – CMRIT 69