Jan 19, 2015
Syllabus Analog Circuits
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Syllabus for Analog Circuits
Small Signal Equivalent circuits of diodes, BJTs, MOSFETs and analog CMOS. Simple diode
circuits, clipping, clamping, rectifier. Biasing and bias stability of transistor and FET amplifiers.
Amplifiers: singleand multistage, differential and operational, feedback, and power. Frequency
response of amplifiers. Simple opamp circuits. Filters. Sinusoidal oscillators; criterion for
oscillation; singletransistor and opamp configurations. Function generators and waveshaping
circuits, 555 Timers. Power supplies.
Analysis of GATE Papers
(Analog Circuits)
Year ECE EE IN
2013 15.00 8.00 18.00
2012 6.00 5.00 5.00
2011 10.00 5.00 15.00
2010 9.00 4.00 9.00
Over All
Percentage
10.00% 5.50% 11.75%
Contents Analog Circuits
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CC OO NN TT EE NN TT SS
Chapters Page No. #1. Diode CircuitsAnaylsis & Application 1 – 39
Wave Shaping Circuit 1 – 12
Rectifiers and Power Supplies 13 – 17
Solved Examples 18 – 20
Assignment 1 21 – 28
Assignment 2 29 – 32
Answer Keys 33
Explanation s 33 – 39
#2. AC & DC BiasingBJTs & FET 40  87 Operating Point 40 – 46
BIAS Stabilization 46 – 55
Compensation Techniques 55 – 66
Assignment 1 67 – 73
Assignment 2 74 – 78
Answer Keys 79
Explanations 79 – 87
#3. Small Signal Modeling Of BJT & FET 88 – 136 BJT Transistor Modeling 88 – 94
The Hybrid Equivalent Model 94 – 99
Characteristic of Common Base Amplifier 99 – 105
FET Small signal Model. 105 – 114
Assignment 1 115 – 121
Assignment 2 122 – 126
Answer Keys 127
Explanations 127 – 136
#4. BJT & JFET Frequency Response 137 – 169 Introduction 137 – 139
Low Frequency Response –BJT Amplifier 139 – 142
Low frequency Response –FET Amplifier 142 – 144
Miller Effect Capacitance 144 – 147
High Frequency Response –BJT Applfier 147 – 149
High Frequency Response FET Amplifier 149 – 155
Assignment 1 156 – 160
Assignment 2 161 – 164
Answer Keys 165
Explanations 165 – 169
Contents Analog Circuits
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#5. Feedback & Oscillator Circuits 170 – 210 Classification of Amplifier 170 – 173
Feedback of Connection Types. 173 – 178
FET Phase Shift Oscillator 179
Wien Bridge Oscillator 180 – 188
Solved Examples 189 – 194
Assignment 1 195 – 199
Assignment 2 200 – 204
Answer Keys 205
Explanations 205 – 210
#6. Operational Amplifiers & Its Applications 211 – 291 Differential Amplifiers 211 – 212
Analysis of Differential Amplifier 212 – 214
Common Mode Rejection Ratio (CMRR) 214
Operational Amplifier 214 – 223
Practical OpAmp Circuits 223 – 240
Astable Multivibrator (Square Wave Generator) 241  243
ZeroCrossing Detector 244  254
The 555 Timer 255 – 260
Solved Examples 261 – 265
Assignment 1 266 – 274
Assignment 2 275 – 280
Answer Keys 281
Explanations 281  291
#7. Power Amplifiers 292 – 317 Introduction 292 – 294
Series –Fed Class Amplifer 294
DC Bias Operation 295
AC Operation 295 – 298
Transformer Coupled Amplifier 298 – 299
Push Pull Amplifier 299 – 301
Transformer Coupled Push Pull Circuit 301
Complementary –symmetry circuit 301 – 305
Total Hormonic distrtion. 305 – 306
Assignment 1 307 – 311
Assignment 2 311 – 312
Answer Keys 313
Explanations 313 – 317
Contents Analog Circuits
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Module Test 318 – 345 Test Questions 318 – 335
Answer Keys 336
Explanations 336 – 345
Reference Books 346
Chapter1 Analog Circuits
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CHAPTER 1
Diode Circuits  Analysis and Application
Wave Shaping Circuits
Wave shaping circuits are of two types
(A) Linear wave shaping circuits (B) Non linear wave shaping circuits
A. Linear Wave Shaping Circuits
The process by which the wave form of non sinusoidal signal is altered by passing it through the linear network is called the linear wave shaping
High Pass Circuit
Fig. 1 High Pass Circuit
This circuit is called the high pass filter because it passes the high frequency components and attenuates the low frequency components.
For low frequency, the reactance of the capacitance is large
(a) Sinusoidal input:
( )


√ (
⁄ )
( ) ( )
Vo R
Vi
C
+ +
 
Chapter1 Analog Circuits
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Fig. 2 Gainfrequency plot of high pass circuit
(b) Step Input:
Fig. 3 Output voltage of high pass circuit when input is a step voltage
(t) = ( ) ( ) ( ) ( )
( ) = 1/C ( )
iR,
So ( ) 1/RC (t) dt + ( ) ( )
It is a single time constant circuit and a first order equation is obtained. The general solution of any single time constant circuit can be written as,
( ) ( ) , here Vf = 0, Vi = V, Vo(t) = Ve τwhere τ
(c) Pulse Input: ( ) [ ( ) ( )]
1)
2) ( )
τ
τ
( )
0
V
 
1 0.707
Chapter1 Analog Circuits
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Fig. 4 Output of high pass filter, when input is a pulse
For a low time constant the peak – to – peak amplitudes will be double. The process of converting pulses into spikes by means of a low time constant is called peaking.
In high pass RC circuit, the average level of the output is always zero. The area above the zero axis should be equal to the area below the zero axis, A1 = A2
(d) Square Wave Input
For a nonsymmetrical square wave , + = T = 1/f. The extreme cases are
Case 1: τ τ The input and output are shown below,
(a)
(b)
Fig: 5 (a) Square wave input; (b) Output voltage if the time constant is very large (compared with T). The dc component V d –c of the output is always zero. Area A1 equals area A2.
V0
V 0
T1 T2
t
Zero voltage
T
T1
A2
A1
Zero voltage
Average voltage
( )
0
V
1
2
Chapter1 Analog Circuits
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Case 2: τ τ The response is shown below;Note: 5(a) Square wave input
Fig: 6 Peaking of a square wave resulting from a time constant small compared with T.
More generally the response to a square wave must have the appearance shown below:
The four levels V1, V1’ 2,V2’ can be determined from (refer figure 7)
For symmetrical square wave:
T1 = T2 = T/2
’ and the response is shown below in Fig. 7(b)
P c ‘P’ by
P =
100
100 %
=
100 %
Where f1 =
and
V0
T1 T2
T
V
V
0
Input
t
Chapter1 Analog Circuits
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Fig. 7 Linear tilt of a square wave when RC/T >> 1.
(e) Ramp Input:
Vi(t) = t u (t) and Vo(t) = τ (1 ), are shown below,
Fig. 8 (a) Response of a high pass RC circuit to a ramp voltage for RC / T >> 1;
(b)Response to a ramp voltage for RC / T << 1.
For t <<τ as a measure of departure from linearity, transmission error, et is defined as
Deviation from Linearity
Output
Input = Signal
0 T t
Fig (a)
t
Output
0 T
Fig (b)
t
( )
t
( )
Output
Input
(b)