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Digital Logic - University of Pennsylvania · Logic families TTL (transistor-transistor logic) CMOS (complementary metal-oxide semiconductor) basic L low power S Schottky LS low-power

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Page 1: Digital Logic - University of Pennsylvania · Logic families TTL (transistor-transistor logic) CMOS (complementary metal-oxide semiconductor) basic L low power S Schottky LS low-power

Digital Logic1

Page 2: Digital Logic - University of Pennsylvania · Logic families TTL (transistor-transistor logic) CMOS (complementary metal-oxide semiconductor) basic L low power S Schottky LS low-power

4-bit countercirca 1960

8-bit countercirca 1990

2

Page 3: Digital Logic - University of Pennsylvania · Logic families TTL (transistor-transistor logic) CMOS (complementary metal-oxide semiconductor) basic L low power S Schottky LS low-power

Logic gates

Operates on logical values (TRUE = 1, FALSE = 0)

NOT

A B C

0 - 11 - 0

A B C

0 0 01 0 00 1 01 1 1

AND

A B C

0 0 01 0 10 1 11 1 1

OR

A B C

0 0 01 0 10 1 11 1 0

XOR

(buffer)

A B C

0 - 01 - 1

NAND

A B C

0 0 11 0 10 1 11 1 0

NOR

A B C

0 0 11 0 00 1 01 1 0

XNOR

A B C

0 0 11 0 00 1 01 1 1

3

Page 4: Digital Logic - University of Pennsylvania · Logic families TTL (transistor-transistor logic) CMOS (complementary metal-oxide semiconductor) basic L low power S Schottky LS low-power

Transistors & MOSFETS (briefly)

NPN

MOSFET(metal oxide semiconductor field-effect transistor)

BJT(bipolar junction transistor)

PNP N-channel P-channel

simplified switch behavior

forward bias the internal diode

requires relatively large current to “hold open”

exceed the gate threshold

draws very little current

~0.7 Volts 1-8 Volts

4

Page 5: Digital Logic - University of Pennsylvania · Logic families TTL (transistor-transistor logic) CMOS (complementary metal-oxide semiconductor) basic L low power S Schottky LS low-power

Logic families

TTL (transistor-transistor logic) CMOS (complementary metal-oxide semiconductor)

basicL low powerS SchottkyLS low-power SchottkyAS advanced SchottkyALS advanced low-power Schottky

F Fast

C originalHC high speed

HCT high speed, TTL outputAC advanced

AHC advanced, high speedFC fast

LCX 3V supply, 5V tolerantLVQ 3.3VLVX 3.3V, 5V tolerantVHC very high speed

G super high speeds (>1 GHz)

74 _ _ # # #

invertercircuit

7400 series of IC logic chips

5

Page 6: Digital Logic - University of Pennsylvania · Logic families TTL (transistor-transistor logic) CMOS (complementary metal-oxide semiconductor) basic L low power S Schottky LS low-power

Logic ICs

Function 74 series

Quad 2-in NAND 00

Quad 2-in NOR 02

Hex NOT (inverter) 04

Hex buffer 07

Quad 2-in AND 08

Quad 2-in OR 32

Quad 2-in XOR 86

... ...

active components (require POWER and GROUND)

you should ground unused inputs

5-1

FAST AND LS TTL DATA

HEX INVERTER

14 13 12 11 10 9

1 2 3 4 5 6

VCC

8

7

GND

GUARANTEED OPERATING RANGES

Symbol Parameter Min Typ Max Unit

VCC Supply Voltage 54

74

4.5

4.75

5.0

5.0

5.5

5.25

V

TA Operating Ambient Temperature Range 54

74

–55

0

25

25

125

70

°C

IOH Output Current — High 54, 74 –0.4 mA

IOL Output Current — Low 54

74

4.0

8.0

mA

SN54/74LS04

HEX INVERTER

LOW POWER SCHOTTKY

J SUFFIX

CERAMIC

CASE 632-08

N SUFFIX

PLASTIC

CASE 646-06

141

14

1

ORDERING INFORMATION

SN54LSXXJ Ceramic

SN74LSXXN Plastic

SN74LSXXD SOIC

14

1

D SUFFIX

SOIC

CASE 751A-02

74HC04

6

Page 7: Digital Logic - University of Pennsylvania · Logic families TTL (transistor-transistor logic) CMOS (complementary metal-oxide semiconductor) basic L low power S Schottky LS low-power

Voltage levelsVih(min) minimum high-level input voltageVil(max) maximum low-level input voltageVoh(min) minimum high-level output voltageVol(max) maximum low-level output voltage

5-2

FAST AND LS TTL DATA

SN54/74LS04

DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified)

S b l P

Limits

U i T C di iSymbol Parameter Min Typ Max Unit Test Conditions

VIH Input HIGH Voltage 2.0 VGuaranteed Input HIGH Voltage for

All Inputs

VIL Input LOW Voltage54 0.7

VGuaranteed Input LOW Voltage for

VIL Input LOW Voltage74 0.8

Vp g

All Inputs

VIK Input Clamp Diode Voltage –0.65 –1.5 V VCC = MIN, IIN = –18 mA

VOH Output HIGH Voltage54 2.5 3.5 V VCC = MIN, IOH = MAX, VIN = VIHVOH Output HIGH Voltage74 2.7 3.5 V

CC , OH , IN IHor VIL per Truth Table

VOL Output LOW Voltage54, 74 0.25 0.4 V IOL = 4.0 mA VCC = VCC MIN,

VIN = VIL or VIHVOL Output LOW Voltage74 0.35 0.5 V IOL = 8.0 mA

VIN = VIL or VIHper Truth Table

IIH Input HIGH Current20 µA VCC = MAX, VIN = 2.7 V

IIH Input HIGH Current0.1 mA VCC = MAX, VIN = 7.0 V

IIL Input LOW Current –0.4 mA VCC = MAX, VIN = 0.4 V

IOS Short Circuit Current (Note 1) –20 –100 mA VCC = MAX

ICC

Power Supply Current

Total, Output HIGH 2.4 mA VCC = MAXICC p

Total, Output LOW 6.6

mA VCC MAX

Note 1: Not more than one output should be shorted at a time, nor for more than 1 second.

AC CHARACTERISTICS (TA = 25°C)

S b l P

Limits

U i T C di iSymbol Parameter Min Typ Max Unit Test Conditions

tPLH Turn-Off Delay, Input to Output 9.0 15 ns VCC = 5.0 V

tPHL Turn-On Delay, Input to Output 10 15 ns

CCCL = 15 pF

74LS04

7

Page 8: Digital Logic - University of Pennsylvania · Logic families TTL (transistor-transistor logic) CMOS (complementary metal-oxide semiconductor) basic L low power S Schottky LS low-power

Voltage levels

0

1

2

3

4

5

basic C HC HCT

0.8

2.0

2.7

0.5

LS

0.8

2.0

2.7

0.4

2.4

1.5

3.5

4.5

0.5

1.5

3.5

0.50.8

2.0

0.3

4.5

3.8

I O

TTL CMOS

8

Page 9: Digital Logic - University of Pennsylvania · Logic families TTL (transistor-transistor logic) CMOS (complementary metal-oxide semiconductor) basic L low power S Schottky LS low-power

Input / output demandsInputs demand voltage AND current

Iih high-level input current

Iil low-level input current

5-2

FAST AND LS TTL DATA

SN54/74LS04

DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified)

S b l P

Limits

U i T C di iSymbol Parameter Min Typ Max Unit Test Conditions

VIH Input HIGH Voltage 2.0 VGuaranteed Input HIGH Voltage for

All Inputs

VIL Input LOW Voltage54 0.7

VGuaranteed Input LOW Voltage for

VIL Input LOW Voltage74 0.8

Vp g

All Inputs

VIK Input Clamp Diode Voltage –0.65 –1.5 V VCC = MIN, IIN = –18 mA

VOH Output HIGH Voltage54 2.5 3.5 V VCC = MIN, IOH = MAX, VIN = VIHVOH Output HIGH Voltage74 2.7 3.5 V

CC , OH , IN IHor VIL per Truth Table

VOL Output LOW Voltage54, 74 0.25 0.4 V IOL = 4.0 mA VCC = VCC MIN,

VIN = VIL or VIHVOL Output LOW Voltage74 0.35 0.5 V IOL = 8.0 mA

VIN = VIL or VIHper Truth Table

IIH Input HIGH Current20 µA VCC = MAX, VIN = 2.7 V

IIH Input HIGH Current0.1 mA VCC = MAX, VIN = 7.0 V

IIL Input LOW Current –0.4 mA VCC = MAX, VIN = 0.4 V

IOS Short Circuit Current (Note 1) –20 –100 mA VCC = MAX

ICC

Power Supply Current

Total, Output HIGH 2.4 mA VCC = MAXICC p

Total, Output LOW 6.6

mA VCC MAX

Note 1: Not more than one output should be shorted at a time, nor for more than 1 second.

AC CHARACTERISTICS (TA = 25°C)

S b l P

Limits

U i T C di iSymbol Parameter Min Typ Max Unit Test Conditions

tPLH Turn-Off Delay, Input to Output 9.0 15 ns VCC = 5.0 V

tPHL Turn-On Delay, Input to Output 10 15 ns

CCCL = 15 pF

74LS04

74HC04

Absolute Maximum Ratings (Notes 1 ! 2)

If Military!Aerospace specified devices are required"please contact the National Semiconductor SalesOffice!Distributors for availability and specifications#

Supply Voltage (VCC) b0"5 to a7"0V

DC Input Voltage (VIN) b1"5 to VCCa1"5V

DC Output Voltage (VOUT) b0"5 to VCCa0"5V

Clamp Diode Current (IIK# IOK) g20 mA

DC Output Current# per pin (IOUT) g25 mA

DC VCC or GND Current# per pin (ICC) g50 mA

Storage Temperature Range (TSTG) b65!C to a150!CPower Dissipation (PD)

(Note 3) 600 mWS"O" Package only 500 mW

Lead Temperature (TL)(Soldering 10 seconds) 260!C

Operating ConditionsMin Max Units

Supply Voltage (VCC) 2 6 V

DC Input or Output Voltage 0 VCC V

(VIN# VOUT)

Operating Temp" Range (TA)

MM74HC b40 a85 !CMM54HC b55 a125 !C

Input Rise or Fall Times

VCCe2"0V(tr# tf) 1000 ns

VCCe4"5V 500 ns

VCCe6"0V 400 ns

DC Electrical Characteristics (Note 4)

TAe25!C74HC 54HC

Symbol Parameter Conditions VCC TAeb40 to 85!C TAeb55 to 125!C Units

Typ Guaranteed Limits

VIH Minimum High Level 2"0V 1"5 1"5 1"5 V

Input Voltage 4"5V 3"15 3"15 3"15 V

6"0V 4"2 4"2 4"2 V

VIL Maximum Low Level 2"0V 0"5 0"5 0"5 V

Input Voltage"" 4"5V 1"35 1"35 1"35 V

6"0V 1"8 1"8 1"8 V

VOH Minimum High Level VINeVIL

Output Voltage lIOUTls20 mA 2"0V 2"0 1"9 1"9 1"9 V

4"5V 4"5 4"4 4"4 4"4 V

6"0V 6"0 5"9 5"9 5"9 V

VINeVIL

lIOUTls4"0 mA 4"5V 4"2 3"98 3"84 3"7 V

lIOUTls5"2 mA 6"0V 5"7 5"48 5"34 5"2 V

VOL Maximum Low Level VINeVIH

Output Voltage lIOUTls20 mA 2"0V 0 0"1 0"1 0"1 V

4"5V 0 0"1 0"1 0"1 V

6"0V 0 0"1 0"1 0"1 V

VINeVIH

lIOUTls4"0 mA 4"5V 0"2 0"26 0"33 0"4 V

lIOUTls5"2 mA 6"0V 0"2 0"26 0"33 0"4 V

IIN Maximum Input VINeVCC or GND 6"0V g0"1 g1"0 g1"0 mA

Current

ICC Maximum Quiescent VINeVCC or GND 6"0V 2"0 20 40 mA

Supply Current IOUTe0 mA

Note 1$ Absolute Maximum Ratings are those values beyond which damage to the device may occur"

Note 2$ Unless otherwise specified all voltages are referenced to ground"

Note 3$ Power Dissipation temperature derating $ plastic ‘‘N’’ package% b12 mW&!C from 65!C to 85!C' ceramic ‘‘J’’ package% b12 mW&!C from 100!C to 125!C"

Note 4$ For a power supply of 5V g10% the worst case output voltages (VOH# and VOL) occur for HC at 4"5V" Thus the 4"5V values should be used when designingwith this supply" Worst case VIH and VIL occur at VCCe5"5V and 4"5V respectively" (The VIH value at 5"5V is 3"85V") The worst case leakage current (IIN# ICC# andIOZ) occur for CMOS at the higher voltage and so the 6"0V values should be used"

""VIL limits are currently tested at 20% of VCC" The above VIL specification (30% of VCC) will be implemented no later than Q1# CY’89"

2

TTL inputs require significantly more current than CMOS inputs

9

Page 10: Digital Logic - University of Pennsylvania · Logic families TTL (transistor-transistor logic) CMOS (complementary metal-oxide semiconductor) basic L low power S Schottky LS low-power

Logic family compatibility

ToToToTo

TTLHCTACT

HCAC

HC, AC@ 3.3V

TTL OK OKpull-up to

+5VOK

HCTACT

OK OK OK NO

HCAC

OK OK OK NO

HC, AC@ 3.3V

OK OK NO OK

From

10

Page 11: Digital Logic - University of Pennsylvania · Logic families TTL (transistor-transistor logic) CMOS (complementary metal-oxide semiconductor) basic L low power S Schottky LS low-power

Special outputsTTL open collector / CMOS open drain

Tri-state output

LOW - output driven to groundHIGH - output releases

need a pull-up resistor to enable HIGH output

uses: high-voltage output, wired AND/OR

S (select) input switches output

LOW - output driven to groundHIGH - output driven to +VccOFF - output releases

11

Page 12: Digital Logic - University of Pennsylvania · Logic families TTL (transistor-transistor logic) CMOS (complementary metal-oxide semiconductor) basic L low power S Schottky LS low-power

Sizing pull-up resistors

Minimum high input voltage dictates maximum R

Maximum low output voltage dictates minimum R

+5V

74HC04

74HC05 74HC04

74HC04

R

74HC05 (open-collector)

74HC04

V ih (min) V il (max) I ih I il

3.15 V 1.5 V 1 uA -1 uA

V oh (min) V ol (max) I oh I ol

O.C. 0.33 V 5 uA 4 mA

12

Page 13: Digital Logic - University of Pennsylvania · Logic families TTL (transistor-transistor logic) CMOS (complementary metal-oxide semiconductor) basic L low power S Schottky LS low-power

74HC00 quad 2-in NAND

74HC02 quad 2-in NOR

74HC04 hex inverter

74C04 hex inverter

74HC05 hex open-collector inverter

74HC08 quad 2-in AND

74HC14 hex schmitt inverter

74HC32 quad 2-in OR

74HC74 dual D flip-flop

74HC125 quad 3-state buffer

74HC151 8-to-1 mux

In the mini-store

13