Architectural Implications of Brick and Mortar Silicon

Architectural Implications of

Brick and Mortar Silicon Manufacturing

Mojtaba MehraraTodd Austin

University of Michigan

Martha Mercaldi Kim Mark Oskin

University of Washington

Cost of Production

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Standard Cell ASIC

Product Volume

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Cost of Production

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Standard Cell ASICFPGA

Product Volume

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Standard Cell ASICFPGABrick & Mortar Goal

Cost of Production

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Brick and Mortar Chips

1. Bricks

• Mass-produced ASICs

• Standard interface

• Fixed set of functions

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Brick and Mortar Chips

1. Bricks

• Mass-produced ASICs

• Standard interface

• Fixed set of functions

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uP

USB

3DES

VGA

DMA

ETH

SRAM

MPEG

uP

USB

3DES

VGA

DMA

ETH

SRAM

MPEG

Brick and Mortar Chips

1. Bricks

• Mass-produced ASICs

• Standard interface

• Fixed set of functions

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2. “Mortar”

• Mass-produced ASIC

• Standard interface

• Single, interconnect function

Interconnect

Brick and Mortar Chips

1. Bricks

• Mass-produced ASICs

• Standard interface

• Fixed set of functions

2. “Mortar”

• Mass-produced ASIC

• Standard interface

• Single, interconnect function

3. Assembly

• Alignment

• e.g. robotics, fluidic

• Bonding

• e.g. flip-chip, proximity

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Benefits of Brick and Mortar

•Chip manufacture: mask-free, fab-free, improved yields

•Chip performance: mostly ASIC

•Chip design: uses today’s SoC design flow

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Why Should Architects Care?

•Good architecture essential for viability

• Brick function and form-factor

• Inter-brick interconnect design

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Outline

•Brick and Mortar Chips

• Definition

• Potential

• Architectural Questions

•Brick and Mortar Architecture

• Bricks

• Interconnect

•Brick and Mortar Assembly

• Options

• Interaction with architecture

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Brick Form Factor

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Functional Block

Interconnect Interface

flipchip pad:25 um pitch, 2.5 Gbps

•Each brick . . .

• is square

• has 15% of area reserved for extra circuitry

• has one surface covered with flipchip pads

Brick Architecture

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HDL

Synopsys DC Ultra area (um2)

max freq. (MHz)

opencores.org,

etc.

Artisan memory compiler

Function Description Area (um2) Max Freq. (MHz)

USB 1.1 Physical Layer 2,201 2941

JPEG Decoder 625,457 629

RISC Core + 256K Cache 3,111,025 1087

Functional Block

Interconnect Interface

Multiple Brick Sizes

2 mm

1 mm

.5 mm

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Brick Size Selection

FunctionDescription

Circuit Freq. Range at Brick Size

Area(um2)

Max Freq.(MHz)

Small Medium Large

256 K SRAM(single-ported) 2,729,344 2315 No Space No Space N/A - 2315

JPEG Decoder 625,457 629 No Space N/A - 629 No Benefit

VGA/LCD Controller

4,301 1219 N/A - 1046 N/A - 1219 No Benefit

• Smallest brick to fit circuit, unless bandwidth severely constrained

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Outline

•Brick and Mortar Chips

• Definition

• Potential

• Architectural Questions

•Brick and Mortar Architecture

• Bricks

• Interconnect

•Brick and Mortar Assembly

• Options

• Interaction with architecture

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Interconnect Dilemma

Architecture Design

Chip Design

Execution

1. Brick Functions2. Brick Size3. Interconnect Design

time

processsteps

1. Brick Selection2. Brick Arrangment

1. Input Data

Static Communication

Dynamic Communication

•General purpose interconnect facilities

• Communication known at design time configurable wires

• Dynamic communication packet-switched net

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Outline

•Brick and Mortar Chips

• Definition

• Potential

• Architectural Questions

•Brick and Mortar Architecture

• Bricks

• Interconnect

•Brick and Mortar Assembly

• Options

• Interaction with architecture

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Brick and Mortar Chips

1. Bricks

• Mass-produced ASICs

• Standard interface

• Fixed set of functions

2. “Mortar”

• Mass-produced ASIC

• Standard interface

• Single, interconnect function

3. Assembly

• Alignment

• e.g. robotics, fluidic

• Bonding

• e.g. flip-chip, proximity

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Assembly Alternatives

19

•Alignment

• Robotic

• Self-Assembly

• Martha + tweezers

• ...

•Bonding

• Flip-chip

• Proximity

• ...

Assembly Alternatives

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•Alignment

• Robotic

• Self-Assembly

• Martha + tweezers

• ...

•Bonding

• Flip-chip

• Proximity

• ...

$$$, but fast

$, but slow

Assembly Alternatives

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•Alignment

• Robotic

• Self-Assembly

• Martha + tweezers

• ...

•Bonding

• Flip-chip

• Proximity

• ...

$$$, but fast

$, but slow

Assembly Alternatives

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•Alignment

• Robotic

• Self-Assembly

• Martha + tweezers

• ...

•Bonding

• Flip-chip

• Proximity

• ...

$$$, but fast

$, but slow

medium-density, but more robust connection

high-density

Assembly Alternatives

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•Alignment

• Robotic

• Self-Assembly

• Martha + tweezers

• ...

•Bonding

• Flip-chip

• Proximity

• ...

$$$, but fast

$, but slow

medium-density, but more robust connection

high-density

Alignment: Fluidic Self Assembly

• Template - brick communication via proximity communication

• Brick type check, BIST, speed grade

• Polymer on template can grip or eject bricks

template (active silicon)

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Alignment: Fluidic Self Assembly

• Washington EE experimental system 21

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Assembly Time v. Number of Bricks

• Statistical simulator driven by experimentally derived rates of assembly and disassembly

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Assembly Time v. Number of Bricks

10 bricks 10 bricks 20 bricks

250

75

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Assembly Time v. Kinds of Bricks

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Assembly Time v. Kinds of Bricks

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Assembly Time v. Kinds of Bricks

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Assembly Time v. Kinds of Bricks

Assembly Time v. Brick Arrangement Slack

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Evaluating Slack: Design Size

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Evaluating Slack: Brick Kinds

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Evaluating Slack: Brick Kinds

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Assembly and Architecture

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•Architecture can assist assembly by

• Reducing the number of kinds of bricks

• i.e., two brick kinds v. one slightly reconfigurable circuit

• Accommodating variable assemblies

Conclusion

•Brick and Mortar process offers ASIC-like chips without the masks and fabs

•Architecture is crucial to meet the performance goals of the process

•With low-cost assembly techniques, can meet the economic goal as well

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