Slide 1 Idit Keidar and Dmitri Perelman Technion 1 SPAA 2009 Slide 2 The emergence of multi-core architectures… Conventional locking… Transactional Memory…
On Avoiding Spare Aborts in TM On Avoiding Spare Aborts in Transactional Memory Idit Keidar and Dmitri Perelman Technion 1 SPAA 2009 Transactional Memory – Background The…