Slide 1 VLSI Physical Design: From Graph Partitioning to Timing Closure Chapter 3: Chip Planning © KLMH Lienig 1 Modern Floorplanning Based on B*-Tree and Fast Simulated…
Simulated Annealing * Simulated Annealing Charactersictics: Iterative improvement Begins with an initial (arbitrary) solution and seeks to incrementally improve the objective…