342 IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, VOL. 21, NO. 2, FEBRUARY 2013 A Variation Tolerant Current-Mode Signaling Scheme for On-Chip Interconnects…
Slide 1 Assigned readings Slide 2 SIGNALSTORM NANOMETER DELAY CALCULATOR CADENCE DATASHEET Slide 3 Introduction: The movement of VLSI chips to nanometer process geometries…