Slide 1Low-power FinFET Circuit Design Niraj K. Jha Dept. of Electrical Engineering Princeton University Joint work with: Anish Muttreja and Prateek Mishra Slide 2 2 Talk…
Slide 1 Jan 4-8, 2008 VLSI Design Conference 1 Total Power Minimization in Glitch-Free CMOS Circuits Considering Process Variation Yuanlin Lu Intel Corporation, Folsom, CA…