Department of Electrical and Computer Engineering Vishal Saxena -1- SRAM Architecture Vishal Saxena, Boise State University ([email protected]) Vishal Saxena -2-…
CTD – Master CANS 1 Memory Structures Ramon Canal CTD – Master CANS Slides based on:Introduction to CMOS VLSI Design. D. Harris CTD – Master CANS 2 Outline • Memory…