Computer System Organization – §1 of SGGComputer System Architecture – §1 of SGG
Operating Systems
P. Healy
CS1-08Computer Science Bldg.
tel: [email protected]
Autumn 2019–2020
P. Healy (University of Limerick) CS4023 Autumn 2019–2020 1 / 20
Computer System Organization – §1 of SGGComputer System Architecture – §1 of SGG
Outline
1 Computer System Organization – §1 of SGG
2 Computer System Architecture – §1 of SGG
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Computer System Organization – §1 of SGGComputer System Architecture – §1 of SGG
Computer System Operation
One or more CPUs, device controllers connectproviding access to shared memory
Concurrent execution of CPUs and devices competing formemory cycles
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Computer System Organization – §1 of SGGComputer System Architecture – §1 of SGG
Computer Startup
bootstrap program1 is loaded at power-up or rebootTypically stored in ROM or EEPROM, generally known asfirmware
Loads operating system kernel and starts executionThe OS then starts executing the first process, such asinit
init is a system program or daemon; i.e., it providesservices on behalf of OS but is outside kernel
init loads other daemonsexample of a daemon is the “listener” program that reacts toexternal network requests e.g. ftp
OS then waits for some event to occur
1Bootstrap program is sometimes also called bootloaderP. Healy (University of Limerick) CS4023 Autumn 2019–2020 4 / 20
Computer System Organization – §1 of SGGComputer System Architecture – §1 of SGG
Computer Startup: Linux
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Computer System Organization – §1 of SGGComputer System Architecture – §1 of SGG
Computer System Operation
I/O devices and the CPUEach device controller (hardware) is in charge of aparticular device typeEach device controller has a local buffer (memory)CPU moves data from main memory to local buffersI/O is from local buffer of controller to the deviceDevice controller informs CPU that it has finished itsoperation by causing an interrupt
P. Healy (University of Limerick) CS4023 Autumn 2019–2020 6 / 20
Computer System Organization – §1 of SGGComputer System Architecture – §1 of SGG
Computer System Operation
I/O devices and the CPUEach device controller (hardware) is in charge of aparticular device typeEach device controller has a local buffer (memory)CPU moves data to main memory from local buffersI/O is to local buffer of controller from the deviceDevice controller informs CPU that it has finished itsoperation by causing an interrupt
P. Healy (University of Limerick) CS4023 Autumn 2019–2020 6 / 20
Computer System Organization – §1 of SGGComputer System Architecture – §1 of SGG
Common Functions of Interrupts
Interrupt transfers control to the interrupt service routinegenerally, through the interrupt vector, which contains theaddresses of all the service routines (computer code)Interrupt architecture must save the address of theinterrupted instructionIncoming interrupts are disabled while another interrupt isbeing processed to prevent a lost interruptA trap is a software-generated interrupt caused either byan error or a user request
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Computer System Organization – §1 of SGGComputer System Architecture – §1 of SGG
I/O Structure
A device controller (hardware) maintains some localbuffer storage and a set of special purpose registersOS has a device driver (software) for each devicecontrollerStart of an I/O operation:
The loads the appropriate registers withinthe device controllerThe examines the contents of theseregisters to determine what action to takeThe device controller starts the transfer of data from/to thelocal buffer to the to/from the deviceOnce the transfer is complete, the device controller informsthe device driver via an interruptThe device driver then returns control to the OS, possiblyreturning (if the operation was a ’read’) the data or a pointerto the data
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Computer System Organization – §1 of SGGComputer System Architecture – §1 of SGG
Interrupt Timeline
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Computer System Organization – §1 of SGGComputer System Architecture – §1 of SGG
Direct Memory Access Structure
Used for high-speed I/O devices able to transmitinformation at close to memory speedsDevice controller transfers from bufferstorage directly to main memory without CPU interventionOnly one interrupt is generated per block, rather than oneper byte (as previously done)On current linux systems blocksize is bytes
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Computer System Organization – §1 of SGGComputer System Architecture – §1 of SGG
Storage Structure
– only large storage media that the CPUcan access directly (via data bus)
cache doesn’t count as it is small
– extension of main memory thatprovides large nonvolatile storage capacityMagnetic disks – rigid metal or glass platters covered withmagnetic recording material
Disk surface is logically divided into tracks, which aresubdivided into sectorsThe disk controller determines the logical interactionbetween the device and the computerBeginning to become obselete for laptops, lightweightdevices; replaced by solid-state disks
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Computer System Organization – §1 of SGGComputer System Architecture – §1 of SGG
Storage Hierarchy
Storage systems organized in hierarchySpeedCostVolatility
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Computer System Organization – §1 of SGGComputer System Architecture – §1 of SGG
Storage Hierarchy
Storage systems organized in hierarchy
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Computer System Organization – §1 of SGGComputer System Architecture – §1 of SGG
Large-Scale Storage Devices
Main memory: only large storage media that the CPU canaccess directly
Random accessTypically volatile
Secondary storage: extension of main memory thatprovides large nonvolatile storage capacityTwo of these:
Hard disks: rigid metal or glass platters covered withmagnetic recording material
Disk surface is logically divided into tracks, which aresubdivided into sectorsThe disk controller determines the logical interactionbetween the device and the computer
Solid-state disks: faster than hard disks, nonvolatileVarious technologies e.g. a mixture of RAM and magneticdiskPopular in cameras, PDAs, USB etc,; now in larger devices
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Computer System Organization – §1 of SGGComputer System Architecture – §1 of SGG
Large-Scale Storage Devices (contd.)
Dummies guide to HDD and SSD here
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Computer System Organization – §1 of SGGComputer System Architecture – §1 of SGG
Caching
Important principle, performed at many levels in acomputer (in hardware, operating system, software)Information in use (i.e., it will likely be used soon again)copied from slower to faster storage temporarilyFaster storage (cache) checked first to determine ifinformation is there
If it is, information used directly from the cache (fast)If not, data copied to cache and used there
Cache smaller than storage being cachedCache management important design problemCache size and replacement policy
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Computer System Organization – §1 of SGGComputer System Architecture – §1 of SGG
How a Modern Computer Works
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Computer System Organization – §1 of SGGComputer System Architecture – §1 of SGG
System Types
Traditionally, systems use a single general-purposeprocessor (from PDAs all the way to mainframes) – thoughthat is changing
Most systems have special-purpose processors as wellMultiprocessor systems growing in use and importance
Also known as parallel systems, tightly-coupled systemsAdvantages include
Increased throughputEconomy of scaleIncreased reliability: graceful degradation or fault tolerance
Two typesAsymmetric Multiprocessing (master-slave relationship)Symmetric Multiprocessing
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Computer System Organization – §1 of SGGComputer System Architecture – §1 of SGG
Symmetric Multiprocessing Architecture
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Computer System Organization – §1 of SGGComputer System Architecture – §1 of SGG
A Dual-Core Design
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Computer System Organization – §1 of SGGComputer System Architecture – §1 of SGG
Clustered Systems
Like multiprocessor systems, but multiple systems workingtogether
Usually sharing storage via a storage-area network(SAN)Provides a high-availability service which survivesfailures
Asymmetric clustering has one machine in hot-standbymodeSymmetric clustering has multiple nodes runningapplications, monitoring each other
Some clusters are for high-performance computing(HPC)
Applications must be written to use parallelization
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