Lecture 3a Complex Programmable Logic Devices.ppt

7/24/2019 Lecture 3a Complex Programmable Logic Devices.ppt

http://slidepdf.com/reader/full/lecture-3a-complex-programmable-logic-devicesppt 1/18

ECT 358ECT 358

Lecture 3aLecture 3a

CPLD’sCPLD’s



Luck: a loser’s excuse for aLuck: a loser’s excuse for a

winner’s position.winner’s position.

The soul of the sluggard desireth,The soul of the sluggard desireth,

and hath nothing: but the soul of theand hath nothing: but the soul of thediligent shall be made fat.diligent shall be made fat.

Proverbs 13:4Proverbs 13:4



Complex Programmale LogicComplex Programmale Logic

De!ice "CPLD#De!ice "CPLD#

$ Large structures of cominational logicLarge structures of cominational logic

$ Programmale on c%ip interconnect faricProgrammale on c%ip interconnect faric

$ &a'e of PLD locks&a'e of PLD locks

$ (i'e fan)in *+D gates(i'e fan)in *+D gates$ P*L like internal structureP*L like internal structure

$ ,nternal outputs route' to ot%er inputs,nternal outputs route' to ot%er inputs

$ Erasale PLD "EPLD#Erasale PLD "EPLD#$ -*&/transmission gates-*&/transmission gates

$ EP0&EP0&

$ *ntifuses "low resistance links#*ntifuses "low resistance links#

$ -%arale Expan'ers-%arale Expan'ers









$ 1p to 24 functions1p to 24 functions

$ Large numer of inputsLarge numer of inputs

$ Large *reaLarge *rea$ 26 connecti!it7 etween PLD cells26 connecti!it7 etween PLD cells



*ltera *rc%itecture*ltera *rc%itecture

"CPLD#"CPLD#

$ 9loating gate EEP0& conguration9loating gate EEP0& congurationmemor7 for routingmemor7 for routing

$ Logic *rra7 ;locks "L*;’s#Logic *rra7 ;locks "L*;’s#< -ame arc%itecture-ame arc%itecture

$ Programmale ,nterconnection *rra7Programmale ,nterconnection *rra7

< =loal us etween ,/0 an' L*;’s=loal us etween ,/0 an' L*;’s$ Programmale ,/0 locksProgrammale ,/0 locks

< Connect clocks to all macrocellsConnect clocks to all macrocells



*ltera *rc%itecture*ltera *rc%itecture

"CPLD#"CPLD#



*ltera &acrocell*ltera &acrocell

*rc%itecture*rc%itecture

$ Programmale *+D planeProgrammale *+D plane

$ Pro'uct Term select matrix for 0 gatePro'uct Term select matrix for 0 gate

$ Programmale 9lip)>opProgrammale 9lip)>op

$ &ini)P*L arc%itecture&ini)P*L arc%itecture

$ 9lip >op gate' 7 clock or pro'uct term9lip >op gate' 7 clock or pro'uct term

$ Expan'er -ignalsExpan'er -ignals

l ll



*ltera &acrocell*ltera &acrocell


l -% l



*ltera -%areale*ltera -%areale

Expan'erExpan'er

$ Enale s%are' pro'uct termsEnale s%are' pro'uct terms

$ ,ncrease numer of literals for,ncrease numer of literals for

expressionsexpressions

$ ,n!erte' an' sent to ot%er macrocells,n!erte' an' sent to ot%er macrocells

$ -%are' pro'uct resources-%are' pro'uct resources

*l -% l



*ltera -%areale*ltera -%areale

Expan'erExpan'er



*ltera Parallel Expan'er*ltera Parallel Expan'er

$ -%are up to 25 pro'uct terms wit%-%are up to 25 pro'uct terms wit%

neig%oring macrocellsneig%oring macrocells

$ C%ain eginning an' en'C%ain eginning an' en'



*ltera Parallel Expan'er*ltera Parallel Expan'er



*ltera ,/0 an' Timing*ltera ,/0 an' Timing

$ De'icate' input or output or i'irectionalDe'icate' input or output or i'irectional

$ Timing is pre'ictale Timing is pre'ictale

$ *ll inputs can go to an7 cell*ll inputs can go to an7 cell$ C%annel !s faric tra'eo?s "routingC%annel !s faric tra'eo?s "routing

'ela7s#'ela7s#

$ -7nt%esis tool optimi@es for resources-7nt%esis tool optimi@es for resources$ ,n s7stem programmale,n s7stem programmale

Aili ACB5 * %it tAili ACB5 * %it t



Ailinx ACB5 *rc%itectureAilinx ACB5 *rc%itecture

"CPLD#"CPLD#

$ 9las% ase' in s7stem programmale9las% ase' in s7stem programmale

$ P*L structureP*L structure

$ 9astC0++ECT switc% matrix9astC0++ECT switc% matrix

$ ,/0 locks u?er inputs an' outputs,/0 locks u?er inputs an' outputs

$ Programmale slew rateProgrammale slew rate

$ B pro'uct terms / macrocellB pro'uct terms / macrocell

Aili ACB5 * %it tAili ACB5 * %it t



Ailinx ACB5 *rc%itectureAilinx ACB5 *rc%itecture

"CPLD#"CPLD#

Aili ACB5 & llAili ACB5 & ll



Ailinx ACB5 &acrocellAilinx ACB5 &acrocell


$ 488 &acrocells488 &acrocells

$ gates gates

$ 488 registers488 registers$ 5 ns propagation 'ela7 "xe'#5 ns propagation 'ela7 "xe'#

$ 45 &@45 &@

$ Pre'ictale performance in'epen'entPre'ictale performance in'epen'entof t%e internal placement an' routingof t%e internal placement an' routingof 'esignof 'esign

Aili ACB5 & llAili ACB5 & ll



Ailinx ACB5 &acrocellAilinx ACB5 &acrocell


Lecture 3a Complex Programmable Logic Devices.ppt

Documents

Lecture 3a Complex Programmable Logic Devices.ppt