7/30/2019 Analog Circuit Synthesis
1/24
7/30/2019 Analog Circuit Synthesis
2/24
Introduction
Need
Process
Difficulty
Tools And Techniques
Conclusion
References
7/30/2019 Analog Circuit Synthesis
3/24
7/30/2019 Analog Circuit Synthesis
4/24
7/30/2019 Analog Circuit Synthesis
5/24
7/30/2019 Analog Circuit Synthesis
6/24
The analog CMOS integrated circuit synthesisprocess consists of three steps.
Topology Selection
Circuit Sizing
Design Verification
7/30/2019 Analog Circuit Synthesis
7/24
Analog circuit synthesis is a designoptimization problem containing two parts.
Topology Selection
Transistor Sizing
7/30/2019 Analog Circuit Synthesis
8/24
7/30/2019 Analog Circuit Synthesis
9/24
7/30/2019 Analog Circuit Synthesis
10/24
7/30/2019 Analog Circuit Synthesis
11/24
7/30/2019 Analog Circuit Synthesis
12/24
Parallel on Analog Circuit Synthesis.
Problem Partitioning Techniques is used.
Functionality analysis based circuit partitioning
Performance specification decomposition
Generation of test bench performance evaluation
Speed is improved.
Computing efficiency is improved.
Multi-threading is used.
Adaptive task scheduler and/or MPI based task scheduler isused.
7/30/2019 Analog Circuit Synthesis
13/24
7/30/2019 Analog Circuit Synthesis
14/24
The Sizing Rules Method for CMOS Analog Integrated
Circuit Synthesis.
Topology Synthesis of Analog Circuits with yieldoptimization and evaluation using Pareto Fronts(2011)
7/30/2019 Analog Circuit Synthesis
15/24
7/30/2019 Analog Circuit Synthesis
16/24
Differential Evolution and Swarm Intelligence techniques for AnalogCircuit Synthesis.
Based on evolutionary optimization of ANFIS Space Mapped Model(2008)
Anaconda: Simulation-based synthesis of Analog Circuits via stochastic
Pattern Search.
Abstract Model Of Analog Synthesis
7/30/2019 Analog Circuit Synthesis
17/24
An Analog Performance estimator for improving theeffectiveness of CMOS Analog System circuit
Synthesis(VHDL -AMS)
7/30/2019 Analog Circuit Synthesis
18/24
7/30/2019 Analog Circuit Synthesis
19/24
Knowledge Based Encode the circuit behavior in memory.
Tools:
OASYS(Generate and simulate approach)
IDAC
Optimization Based
Obtain the circuit behavior via simulation.
Tools:
OPASYN(selects a circuit by relating the topology structures toperformance specification)
STAIC(successive solution refinement methodology)
DELIGHT.SPICE
KOAN/ANAGRAM(Placement Tools)
7/30/2019 Analog Circuit Synthesis
20/24
Algorithm Based
Uses mathematical calculation for circuit behavior estimation.
ARIADNE(symbolic simulation based)
DARWIN(depends on basic blocks)
DONALD(works on system design equation )
FASY(fuzzy logic based which selects topology from a predefined
library)
ASTRX/OBLX(automated synthesis tool , circuit topology already
selected)
LAYLA(placement algorithm using genetic)
7/30/2019 Analog Circuit Synthesis
21/24
From every corner of the world researchers trying toimprove the synthesis technique for analog circuit
based on time , complexity , area and efficiency.
Some are proposed and some are accepted.
Not satisfactory result till today.
Still an ongoing research topic
7/30/2019 Analog Circuit Synthesis
22/24
Automated Synthesis of Analog Electrical Circuits by Means ofGenetic Programming John R. Koza , Member, IEEE, Forrest HBennett, III, Associate Member, IEEE , David Andre, Martin A.Keane, Member, IEEE, and Frank Dunlap, Member, IEEE
Techniques for Synthesis of Analog Integrated Circuits Topology Synthesis of Analog Circuits with Yield Optimization
and Evaluation using Pareto Fronts Oliver Mitea, MarkusMeissner, Lars Hedrich Electronic Design Methodology,Department of Computer Science, University of Frankfurt/Main,Germany{mitea , meissner , hedrich}@em.cs.uni-frankfurt.de
Fast Synthesis of Analog Circuits Based on EvolutionaryOptimization of ANFIS Space Mapped Model Vahid AsadpourElectrical Engineering Faculty Sadjad University Mashad, IRAN
Email: [email protected] Differential Evolution and Swarm Intelligence techniques for
Analog CircuitSynthesis
mailto:hedrich%[email protected]:hedrich%[email protected]:[email protected]:[email protected]:[email protected]:hedrich%[email protected]:hedrich%[email protected]:hedrich%[email protected]:hedrich%[email protected]:hedrich%[email protected]7/30/2019 Analog Circuit Synthesis
23/24
Parallel on Analog Circuit Synthesis ,Yuping Wu Lan ChenTianchunYe
Institute of Microelectronics of CAS Beijing, P.R. of China
Email: {wuyuping, chenlan, yetianchun}@ime.ac.cn
A novel real-coded scheme for evolutionary analog circuit
synthesis, Jingsong He Department of Electronic Science andTechnology ,University of Science and Technology of ChinaHefei, China [email protected]
The roIe of designer knowledge for circuit-level optimizationwithin an analog synthesis system D.Enright, R.J.Mack, &R.E.Massara ,Department of Electronic Systems Engineering
,University of Essex, UK Multi-Placement Structures for Fast and Optimized Placement
in Analog Circuit Synthesis , Raoul F. Badaoui and RangaVemuri
mailto:yetianchun%[email protected]:[email protected]:[email protected]:[email protected]:yetianchun%[email protected]:yetianchun%[email protected]:yetianchun%[email protected]7/30/2019 Analog Circuit Synthesis
24/24