VISHAL GUNTUR [email protected] Phone: 310-254-6421 Objective: To pursue a career in the field of Electrical Engineering with a result oriented approach in a dynamic work environment. Education: Master of Science – Electrical and Computer Engineering University of Illinois-Chicago, Chicago, IL (Expected Graduation 2011) Bachelor of Technology – Electrical and Electronics Engineering Jawaharlal Nehru Technological University, Hyderabad, INDIA (74.5%) (May 2007) Research Interests VLSI Design, Power electronics, Control Systems, VLSI Design for Test, VLSI Testing and Reliability Academic Projects “Survey and Analysis of On-line Testing schemes for interconnects in VLSI circuits" (May 2010) “Analysis and implementation of Test Data Compression and compaction” (April 2010) “Fault coverage analysis for ATPG generated test vectors & randomly generated vectors" (Feb 2010) “Design, Layout and Simulation of 4-bit Parallel-in Parallel-out Universal Shift Register" (December 2009) “Design and Simulation of an n-bit 3-Number Adder using Divide and Conquer Strategy" (November 2009) “Performance Analysis of VSI and CSI fed Induction Motor Using MATLAB/SIMULINK" (Jan-Apr 2007) “DC Bus Voltage Control for a Distributed Power System" (March 2006) Professional Experience: Graduate Assistant (Jan 2010 –Till Date) The Graduate College, University of Illinois at Chicago • Actively involved in performing application programming. IBM India Pvt. Ltd., (Sep 2007 – Jul 2009) Associate System Engineer (Server Systems Operations, IBM India Pvt. Ltd.) • Actively involved in providing application support and developing new enhancements for a global telecommunications client. Skill Sets: Languages : C, C++, Verilog, VHDL, CADENCE SKILL, JAVA, UNIX Shell & Perl scripting. Database : Oracle 9i, PL/SQL, MS-ACCESS, Oracle 10g Operating Systems : Windows, Linux, UNIX, AIX (IBM Certified Professional™) Tools : MATLAB/SIMULINK, PSPICE. CADENCE, QUARTUS II, HSPICE
VISHAL GUNTUR - ece.uic.edumazumder/Guntur.pdf · VISHAL GUNTUR [email protected] Phone: 310-254-6421 Objective: ... “Performance Analysis of VSI and CSI fed Induction Motor Using
Feb 27, 2019
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VISHAL [email protected]
Phone: 310-254-6421
Objective:
To pursue a career in the field of Electrical Engineering with a result oriented approach in a dynamic work environment.
Education:
Master of Science – Electrical and Computer EngineeringUniversity of Illinois-Chicago, Chicago, IL(Expected Graduation 2011) Bachelor of Technology – Electrical and Electronics EngineeringJawaharlal Nehru Technological University, Hyderabad, INDIA (74.5%) (May 2007)
Research Interests
VLSI Design, Power electronics, Control Systems, VLSI Design for Test, VLSI Testing and Reliability
Academic Projects
“Survey and Analysis of On-line Testing schemes for interconnects in VLSI circuits"(May 2010)
“Analysis and implementation of Test Data Compression and compaction” (April 2010) “Fault coverage analysis for ATPG generated test vectors & randomly generated vectors"
(Feb 2010)“Design, Layout and Simulation of 4-bit Parallel-in Parallel-out Universal Shift Register"
(December 2009) “Design and Simulation of an n-bit 3-Number Adder using Divide and Conquer Strategy"
(November 2009) “Performance Analysis of VSI and CSI fed Induction Motor Using MATLAB/SIMULINK"
(Jan-Apr 2007) “DC Bus Voltage Control for a Distributed Power System" (March 2006)
Professional Experience:
Graduate Assistant (Jan 2010 –Till Date)The Graduate College, University of Illinois at Chicago
• Actively involved in performing application programming.
IBM India Pvt. Ltd., (Sep 2007 – Jul 2009)Associate System Engineer (Server Systems Operations, IBM India Pvt. Ltd.)
• Actively involved in providing application support and developing new enhancements for a global telecommunications client.
Skill Sets:
Languages : C, C++, Verilog, VHDL, CADENCE SKILL, JAVA, UNIX Shell & Perl scripting.Database : Oracle 9i, PL/SQL, MS-ACCESS, Oracle 10gOperating Systems : Windows, Linux, UNIX, AIX (IBM Certified Professional™)Tools : MATLAB/SIMULINK, PSPICE. CADENCE, QUARTUS II, HSPICE
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