Id 1 Question 80386 Segmentation unit allows segments of _____ size at maximum. A 4Gbytes B 6Mbytes C 4Mbytes D 1 Mbytes Answer A Marks 1 Unit 2 Id 2 Question If ______input pin of 80386 if activated, allows address pipelining during 80386 bus cycles. A BS16# B NA# C PEREQ D ADS# Answer B Marks 1 Unit 1 Id 3 Question Virtual Mode Flag bit can be set using ____ instruction or any task switch operation only in the _____ mode A IRET, Virtual B POPF, Real C IRET, protected D POPF, protect ed Answer C Marks 1
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Id 1
Question 80386 Segmentation unit allows segments of _____ size at maximum.
A 4Gbytes
B 6Mbytes
C 4Mbytes
D 1 Mbytes
Answer A
Marks 1
Unit 2
Id 2
Question If ______input pin of 80386 if activated, allows address pipelining during 80386 bus cycles.
A BS16#
B NA#
C PEREQ
D ADS#
Answer B
Marks 1
Unit 1
Id 3
Question Virtual Mode Flag bit can be set using ____ instruction or any task switch operation only in the _____ mode
A IRET, Virtual
B POPF, Real
C IRET, protected
D POPF, protected
Answer C
Marks 1
Unit 2
Id 4
Question The interrupt vector table in real mode of 80386 has been allocated ______ space starting from _______ to _______.
A 1Kbyte, 00000H, 003FFH
B 2Kbyte, 10000H, 004FFH
C 3Kbyte, 01000H, 007FFH
D 4Kbyte, 01000H, 009FFH
Answer A
Marks 1
Unit 2
Id 5
Question The ___ bit decides whether it is a system descriptor or code/data segment descriptor
A P
B S
C D
D G
Answer B
Marks 1
Unit 2
Id 6
Question 80386 support which type of descriptor table from the following?
A TDT
B ADT
C GDT
D MDT
Answer C
Marks 1
Unit 2
Id 7
Question 80386 support overall ___ addressing modes to facilitate efficient execution of higher level language programs.
A 9
B 10
C 11
D 12
Answer C
Marks 2
Unit 2
Id 8
Question The 80386 is a _____ bit Microprocessor.
A 16
B 20
C 32
D 64
Answer C
Marks 1
Unit 2
Id 9
Question The ALU of 80386 is ______ bit
A 16
B 20
C 32
D 64
Answer C
Marks 1
Unit 2
Id 10
Question The 80386DX can address up to ______ virtual memory
A 1 TB
B 8TB
C 16TB
D 64TB
Answer D
Marks 2
Unit 2
Id 11
Question _______ Architecture of 80386 allows simultaneous instruction fetching, decoding and execution of instruction.
A Pipelined
B Harward
C Princeton
D Von Neuman
Answer A
Marks 2
Unit 2
Id 12
Question Which of the following function unit supported by 80386?
A Central Processing Unit
B Memory Management Unit
C Bus Control Unit
D All of these
Answer D
Marks 1
Unit 1
Id 13
Question _____ Unit reads the instruction from instruction queue
A Execution
B Paging
C Instruction predecode
D Segmentation
Answer C
Marks 1
Unit 1
Id 14
Question The Execution unit of 80386 consist of_________
A Control Unit
B Data Unit
C Protection test unit
D All of these
Answer D
Marks 1
Unit 2
Id 15
Question ____ unit takes instruction bytes from the code prefetch queue and translates them into microcode
A Control Unit
B Data Unit
C Instruction decode
D Segmentation
Answer C
Marks 1
Unit 2
Id 16
Question Decoded instructions are stored in ______
A CPU register
B Memory
C Decoded Instruction queue
D None of these
Answer C
Marks 1
Unit 2
Id 17
Question Which unit Translate logical address into linear address?
A Instuction Decode
B Paging
C Segmentation
D Control
Answer C
Marks 1
Unit 2
Id 18
Question _____ address and _______ are added to generate linear address.
A Effective, Segment Base
B offset, instruction register
C Effective, Instruction register
D None of these
Answer A
Marks 1
Unit 2
Id 19
Question _____ unit translate the linear address into physical address
A Segmentation
B Instruction Decode
C Instruction predecode
D Paging
Answer D
Marks 1
Unit 2
Id 20
Question Page size in 80386 is _________
A 1 Kbytes
B 2 Kbytes
C 4 kbytes
D 8 kbytes
Answer C
Marks 1
Unit 2
Id 21
Question In 80386, which of the following signal is used to identify machine cycle?
A M / IO#
B D/C#
C W/R#
D All of these
Answer D
Marks 1
Unit 2
Id 22
Question The data Bus of 80386 consist of how many _______ pins
A 16
B 32
C 64
D 128
Answer B
Marks 2
Unit 2
Id 23
Question What is the size of GDTR in 80386?
A 16 bits
B 32 bits
C 48 bits
D 64 bits
Answer C
Marks 1
Unit 2
Id 24
Question What is the size of LDTR in 80386?
A 16 bits
B 32 bits
C 48 bits
D 64 bits
Answer A
Marks 1
Unit 2
Id 25
Question What is the size of IDTR in 80386?
A 16 bits
B 32 bits
C 48 bits
D 64 bits
Answer C
Marks 1
Unit 2
Id 26
Question What is the size of TR in 80386?
A 16 bits
B 32 bits
C 48 bits
D 64 bits
Answer A
Marks 1
Unit 2
Id 27
Question How many maximum entries are possible in GDT?
A 8190
B 8192
C 8100
D 8200
Answer B
Marks 1
Unit 2
Id 28
Question How many maximum entries are possible in LDT?
A 8190
B 8192
C 8100
D 8200
Answer B
Marks 1
Unit 2
Id 29
Question How many maximum descriptors are possible in IDT?
A 253
B 254
C 256
D 255
Answer C
Marks 1
Unit 2
Id 30
Question Which of the following are known as protected mode register?
A LDTR
B GDTR
C IDTR
D All of these
Answer D
Marks 1
Unit 2
Id 31
Question Which of the following is not a bus control signal?
A ADS#
B INTR
C BE0#-BE3#
D All of these
Answer B
Marks 1
Unit 2
Id 32
Question ________ Signal activate the 16-bit data bus operation.
A NA#
B HOLD
C READY#
D BS16#
Answer D
Marks 1
Unit 2
Id 33
Question How many Special flags are available in 80386?
A 2
B 3
C 4
D 1
Answer C
Marks 1
Unit 2
Id 34
Question Following flags are available in 80386.
A VM
B IOPL
C RF
D All of these
Answer D
Marks 1
Unit 2
Id 35
Question What is the size of EFLAGs in 80386?
A 64
B 48
C 16
D 32
Answer D
Marks 1
Unit 2
Id 36
Question Which control register holds the machine status word?
A CR0
B CR2
C CR3
D CR1
Answer A
Marks 1
Unit 2
Id 37
Question Page directory base address (PDBR) is available in ________ .
A CR0
B CR2
C CR3
D CR1
Answer C
Marks 1
Unit 2
Id 38
Question Which of the following not a system address register?
A GDTR
B LDTR
C IDTR
D None of these
Answer B
Marks 1
Unit 2
Id 39
Question What is the size of Physical address in 80386?
A 16
B 32
C 64
D 48
Answer B
Marks 1
Unit 2
Id 40
Question The TLB is a ______-way set associative _______ -entry page table cache.
A Four, 64
B Four, 32
C Six, 32
D Two, 32
Answer B
Marks 2
Unit 2
Id 41
Question The upper _____ linear address bits are compared with all _______ entries in the TLB to determine if there is a match.
A 32, 20
B 32, 32
C 20, 32
D None of these
Answer C
Marks 1
Unit 2
Id 42
Question What is the size of segment selector in 80386?
A 32
B 16
C 48
D 64
Answer B
Marks 1
Unit 2
Id 43
Question Which Test Register/s is/are available in 80386
A TR6
B TR7
C Both a and b
D None of these
Answer C
Marks 1
Unit 2
Id 44
Question How many 8 bit ports, the IO space of 80386 consists of?
A 32K
B 64K
C 128K
D 48K
Answer B
Marks 1
Unit 2
Id 45
Question What is the memory space of 80386 in real mode?
A 64 Kbytes
B 1 Mbytes
C 4 Gbytes
D 64 Terabytes
Answer A
Marks 1
Unit 2
Id 46
Question Locations FFFFFFF0H through FFFFFFFFH are reserved for __________ .
A interrupt table area
B GDT
C system initialization area
D None of these
Answer C
Marks 1
Unit 2
Id 47
Question Length of quadword is ____________
A 16 bits
B 32 bits
C 8 bits
D 64 bits
Answer B
Marks 2
Unit 2
Id 48
Question Where the LDT descriptors are present in 80386?
A In GDT
B In LDT
C In IDT
D None of these
Answer A
Marks 1
Unit 2
Id 49
Question How many hardware interrupts are available in 80386?
A 3
B 2
C 1
D None of these
Answer B
Marks 1
Unit 2
Id 50
Question If S = 0 and TYPE = 2 defines ___________ .
A LDT descriptor
b TSS Descriptor
C Gate Descriptor
D All of these
Answer A
Marks 1
Unit 2
Id 51
Question How many priviledge levels are avilable in 80386?
A 3
B 4
C 2
D 1
Answer B
Marks 1
Unit 2
Id 52
Question What is the advantage of virtual 86 mode?
A Execution of 8086 applications with protection
B Multitasking
C Multiuser
D All of above
Answer D
Marks 1
Unit 2
Id 53
Question In virtual 86 mode of 80386, what is the size of address bus?
A 20 bit
B 21 bit
C 24 bit
D 32 bit
Answer A
Marks 1
Unit 2
Id 54
Question How 80386 can switch to virtual 86 mode?
A Through a task switch
B An IRET instruction from a procedure
C both (a) and (b)
D after reset
Answer C
Marks 1
Unit 2
Id 55
Question Which descriptor table should be maintained for switching to virtual 86 mode
A Interrupt Descriptor Table
B Global Descriptor Table
C Local Descriptor Table
D None of above
Answer D
Marks 1
Unit 2
Id 56
Question Which control register is used when a virtual mode is invoked?
A CR0
B CR1
C CR2
D CR3
Answer D
Marks 2
Unit 2
Id 57
Question In virtual 8086 mode
A paging can be enabled
B paging can be disable
C (a) or (b)
D None of these
Answer C
Marks 2
Unit 2
Id 60
Question If CS = F000H and IP = FFF0H, what is the linear address generated in virtual
A FFFF0H
B FFFFFH
C 000FFFFH
D None of these
Answer A
Marks 2
Unit 2
Id 61
Question In a virtual memory system, the addresses used by the programmer belongs to
A memory space
B physical addresses
C address space
D main memory address
Answer C
Marks 2
Unit 2
Id 62
Question To enter in protected mode, bit should be at logic 1.
A PG
B ET
C PE
D NT
Answer C
Marks 2
Unit 2
Id 63
Question To return from a task, instruction is used.
A RET
B IRET
C JMP
D CALL
Answer B
Marks 1
Unit 2
Id 64
Question What is the size of visible part present in TR of 80386?
A 16 bit
B 20 bit
C 24 bit
D 32 bit
Answer A
Marks 1
Unit 2
Id 65
Question What is the minimum size of TSS in 80386?
A 64 bytes
B 104 byte
C 4 KB
D 64 KB
Answer B
Marks 1
Unit 2
Id 66
Question One Page Table Entry is used to access of memory.
A 4 KB
B 4 MB
C 1 MB
D 1 byte to 4 GB
Answer A
Marks 1
Unit 2
Id 67
Question One Page Directory Entry is used to access of memory.
A 4 KB
B 4 MB
C 1 MB
D 1 byte to 4 GB
Answer B
Marks 1
Unit 2
Id 68
Question If page fault generates then address is stored in register.
A physical, CR2
B physical, CR3
C linear, CR2
D linear, CR3
Answer C
Marks 1
Unit 2
Id 69
Question What is the size of page table entry and page directory entry?
A 16 bit
B 24 bit
C 32 bit
D 64 bit
Answer C
Marks 1
Unit 2
Id 70
Question If present (P) bit in Page Directory Entry is 0, then of memory is not present.
A 4 KB
B 8 KB
C 4 MB
D 4 GB
Answer C
Marks 1
Unit 2
Id 71
Question In page table entry, bits are used to store address of a page frame.
A 12 bits
B 20 bits
C 24 bits
D 32 bits
Answer B
Marks 1
Unit 2
Id 72
Question The TLB holds the recent entries of page tables.
A 16
B 32
C 64
D none of these
Answer B
Marks 1
Unit 2
Id 73
Question What is the size of page directory?
A 4 KB
B 8 KB
C 64 KB
D Changeable
Answer A
Marks 1
Unit 2
Id 74
Question If paging is disabled then,
A logical address is same as physical address
B linear address is same as physical address
C all three addresses are same
D all three addresses are different
Answer B
Marks 1
Unit 2
Id 75
Question In 80386, privilege levels are defined by
A DPL
B CPL
C RPL
D All of above
Answer D
Marks 1
Unit 2
Id 76
Question Since each task on Intel386 DX has a maximum of ________ selectors, and offsets can be ______ this gives a total of ________ terabytes of logical address space per task.
A 6, 4GB, 64
B 64, 4GB, 64
C 16K, 4GB, 64
D None of these
Answer C
Marks 4
Unit 2
Prepared and Compiled by: Prof.M.B.Salunke & Prof.R.S.Vairagde of SITS, Narhe.
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