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Training ICE Basics
TRACE32 Online Help
TRACE32 Directory
TRACE32 Index
TRACE32 Training ............................................................................................................................
Training ICE Emulator ...................................................................................................................
Training ICE Basics .................................................................................................................... 1
System Architecture TRACE32-ICE ....................................................................................... 4
Module Structure 4
SCU32 - System Controller Unit 5
ECU32 - Emulation Controller Unit 6
HA120 - High Speed State Analyzer 7
ICE Base 7
CPU Pod 7
Block Diagram of TRACE32 Hardware 8
TRACE32 Software 9
Setup the TRACE32 Software ................................................................................................ 10
The Properties Window (Windows only) 10
The Configuration File 11
Starting-up the Emulator ........................................................................................................ 16
Allows to configure TRACE32-ICE to fit your project requirements (host interface, size of the emulation memory, adaptation etc.)
• Universality
Most of the system is universal for all CPUs supported by TRACE32-ICE ➨ moving to another CPU or an other architecture requires only a few changes in the hardware configuration
The SCU32 contains a 32-bit CPU that runs the TRACE32-ICE system software. All operations are performed in the emulator. The debug information is also downloaded to the emulator and is maintained there.
• SCU memory
The SCU has its own memory. Default size is 64 MByte and the memory can be upgraded up to 128 MByte.
• Connection to host
The download time also includes the time to build up the internal symbol data base.
• Power Supply
SETUP.MEMory
Download Times
Parallel Interface (LPT) 100-500 KByte/s
USB up to 900 KByte/s
Ethernet Interface for 10 BaseT ethernet(Twisted Pair Interface, AUI Connector)
The Emulation Controller Unit contains all parts of an emulator which are not CPU specific:
• Mapper
• Emulator Trigger Unit
• Universal Counter
• VCO
• etc.
The Emulation Controller can also contain the Emulation Memory Card (SDIL).
Probe connectors:
Probe Connectors
BANK Input Input for external banking.If your target is using specific ports or addresses for bank selec-tion, these signals have to be fed back into the emulator espe-cially for the use of breakpoints and tracing.
EXTERNAL Input The EXTERNAL probe allows you to combine asynchronous or synchronous events and to synchronize these events with the trigger units of TRACE32-ICE.The EXTERNAL input can be configured by the TrIn com-mand.
STROBE Output The STROBE outputs provides information on the internal state of TRACE32-ICE and on the occurrence of trigger events.
PODBUS Connector to add additional devices to TRACE32-ICE like Stim-uli Generator, BDM Debugger etc.
Up to 376 CPU lines can be recorded on each CPU cyclesmallest cycle time is 50ns trace depth is 32k frameseach entry to the trace buffer is marked by a timestamp with a resolution of 25 ns
2. Programmable Trigger Unit
Trigger programs can be used to do selective tracing or to generate an event depending on the current state of the system
3. Performance Analyzer
For performance analysis based on programs, functions or modules. The resolution of the performance analyzer is 1s.
Probe connectors:
ICE Base
The ICE-Base usually supports a complete CPU family. It includes all parts of the emulator, that are specific for the supported CPU family
The properties window of your application allows some basic setting for the ICE.
1. Definition of a user specific configuration file.
The configuration file defines how the TRACE32 software works together with the other components of the host system.
By default the configuration file config.t32 in the system directory is used. The option -c allows you to define your own location and name for the configuration file.
StandBy Emulator is in StandBy mode and waits for target power and clock. As soon as the target power and clock is available, the EmulExt mode is activated.
This is useful, if there are several CPUs on the target, which should be started synchronously.
Not available on all CPUs.
AloneInt Emulator is working in stand-alone mode. The internal (emulator) clock is used and all lines to the target are blocked.
AloneExt The emulator is working in stand-alone mode. The external (target) clock is used and all lines to the target are blocked.
EmulInt The emulator works with access to the target system and uses the internal (emulator) clock.
EmulExt The emulator works with access to the target system and uses the external (target) clock.
Via the Emulator Controller Unit the memories within the ICE can be read or written to while the CPU is executing the program. This means for the user:
• Read and write access to the emulation memory
• Trigger programming
• Read access to the flag memory
is supported while the program execution is running.
There is no effect on the realtime behavior or the effect is very small.
Timeout for the dualport access and for the access to the target memory
TimeOut Timeout for access to the target memory. When an access to the target memory is not terminated within this time, the emulator will terminate the bus cycle. Timeout error message is then displayed in the emulator state line.
TimeRequest Timeout for the dualport access. After the specified time the attempt to do a dualport access will be aborted and an error message will be displayed.
The configuration of the mapper is done in 3 steps:
1. Select the mapper mode
2. Define the memory organization
3. Activate the memory
Select the Mapper Mode
The emulator supports 2 mapper modes:
For information which mapper mode you should use, please refer in the ICE Target Guide to the section Emulation Frequency. For some CPUs the dualport access has also influence on the max. cpu speed.
Mapper Mode SLOW:
Map.Mode Slow
For some CPUs the CPU can not reach high frequencies in this mode. But memory mapping is done in 4 KByte blocks.
Map.Mode Fast
The CPU can work up to a higher speed, but memory mapping is done in 512 KByte blocks.
• If you are using a 32-bit CPU use MAP.PRE to define the workbenches.
The basic mapper of TRACE32 uses an address area of 16 MByte. The CPU however supplies 32 address lines, which means an address range up to 4 GByte. TRACE32 solves this problem by a 2-stage mapping system. The first system, named premapper, allows to define 16 different 1 MByte areas named workbenches. Within this areas it is possible to set breakpoints on a byte by byte level. Outside this area breakpoints may only be set on ranges limited by 1 MByte.
All settings done within the first 2 steps are locked and can only be changed after MAP.RESet.
After the memory allocation you have to decide where you want to use emulation memory and where you want to use target memory.
If emulation memory is mapped, the emulation memory will be located parallel to the target memory.
Memory Attributes
The protect attribute is used to simulate a ROM using the emulation memory. The protection is only active, when the realtime emulation is running (write cycles are ignored).
MAP.Intern [<range>] Internal memory
MAP.Extern [<range>] External memory
MAP.DEFault [<range>] [/<option>] Standard memory mapping
MAP.Wait <waitcycles> [<range>] Wait cycles
MAP.Protect [<range>] Write protection
MAP.BUS8 [<range>] Bus width mapping
Processor Specific Memory Attributes [<range>] Bus width mapping
Emulation CPU
Target MemoryEmulation Memory
Memory Write Cycles
Emulation CPU
Target MemoryEmulation Memory
Memory Read Cycles
At memory read cycles the mapperdecides which data are used by the CPU
; reset mapper; use fast mode; emulation RAM; memory accesses in the range from; 08000--0ffff are done to internal; emulation RAM; define the area 0C000--0FFFF as code; area -> the area from 0--0BFFF is; treated as data area
vco.clock 16. ; frequency: set to 16 MHz; (necessary if internal clock used)
system.mode emulint ; system up: emulation external; (target, ext. clock); or: system.mode aloneint; (stand alone, int. clock)
A first example for a start up batch job can be found in the ICE Target Guide.
Menu: HelpICE Target Guide, section Quick Start.
Data.Set d:0x038 0x0F
Data.Set d:0x03C 0x030
Data.Set d:0x037 0x0C0
; specify which lines of Port G are used; as general purpose I/O and which are; used as address lines by writing MXAR; activate used chip selects by writing ; CSCTL registers; activate used windows by writing; WINDEF registers
Data.Load.COSMIC file.cos12 /verify
; load application file and verify if it; is written correct to memory
The main tool bar provides fast access to often used commands.
The user can add his own buttons very easily:
Information on the <tool image> can be found in Help -> TRACE32 Documents -> IDE User Interface -> -> IDE Reference Guide -> MENU -> Programming Commands -> TOOLITEM.
MENU.AddTool <tooltip text> <tool image> <command> Add a button to the toolbar
MENU.RESet Reset menu to default
MENU.AddTool "Set PC to main" "PM,X" "Register.Set PC main"
For more complex changes to the main tool bar refer to the training section: Menu Programming
The Window Header displays the command which was executed to open the window
By clicking with the right mouse button to the window header, the command whichwas executed to open the window is re-displayed in thecommand line and can be modified there
SETUP.Var %SpotLight Switch the option SpotLight on for all Variable windows, the Register window, the Peripheral window, the HLL Stack Frame window and all Data.dump windows
Register.view /SpotLight
The registers changed by the last step are markedin dark red. The registers changed by the step beforethe last step are marked a little bit lighter. This worksup to a level of 4.
If SpotLight is ON, the SpotLight feature is automatically on for:1.) all Variable windows2.) the Register window this includes also register bits3.) the Peripheral window4.) the hll stack frame5.) all Data.dump windowsThe SpotLight feature will be only valid for windows, which will be opend after activating this feature.
TRACE32 supports a free configurable window to display/manipulate configuration registers and the on-chip peripheral registers at a logical level. Predefined peripheral windows are available for most standard CPUs.
Tree Display
The individual configuration registers/on-chip peripherals are organized by TRACE32 in a tree structure. On demand, details about a selected register can be displayed.
The address, bit position and the full name of the selected item are displayed in the state line; the full name of the selected item is taken from theCPU manual.
You can modify the contents of a configuration/on-chip peripheral register:
• By pressing the right mouse button and selecting one of the predefined values from the pull-down menu.
• By a double-click to a numeric value. A PER.Set command to change the contents of the selected register is displayed in the command line. Enter the new value and confirm it with return.
Depending on the setting of the mapper target memory or emulation memory is displayed and can be modified.
Dualport Access
The default memory access is done by the Emulation CPU. Depending on the mapper settings target memory or emulation/overlay memory is accessed. Using the default access it is not possible to display or modify memory by the TRACE32 user interface while the Emulation CPU is executing the application program.
Using the Dualport access, the memory access is done via the Emulation Controller Unit. Using this memory access it is possible to display and modify the emulation/overlay memory while the system in running in real-time.
If you enter an address range, only the specified address range will be displayed. This is useful if a memory area close to an I/O area should be displayed and you do not want the development tool to generate read cycles for the I/O area.
Oriented: By default an oriented display is used (line break at 2x). If Orient is OFF, the Dump window starts at the given address.
Ascii: By default ASCII characters are displayed together with the hex. memory contents.
Spotlight: The option Spotlight can be used to highlight the memory locations that changed while single stepping.
Oriented display
No oriented display
The memory location changed by the last step is markedin dark red. The memory location changed by the step beforethe last step is marked a little bit lighter. This worksup to a level of 4.
TRACE32-ICE has a memory based breakpoint system. 1 byte of break memory can be assigned to each address. That means 8 different breakpoints can be set for each address.
The break memory can be activated independent from the other TRACE32-ICE memories. It is not necessary to explicitly map break memory. Break memory is automatically mapped, when a breakpoint is set.
There is always the same amount of emulation memory and break memory available on the system.
8 different breakpoints can be set for each address
High level language debugging is implemented by Hll breakpoints. All hll lines are marked with an Hll breakpoint, when debug information is loaded with the file.
If you switch to HLL mode, debugging is done on hll level.
Spot breakpoints are synchronous in the program range.
They are used as watchpoints. So whenever the program reaches a spot breakpoint, the realtime emulation is interrupted shortly to update the information displayed on the screen. This will usually take 100 … 500 s.
The information on the screen is updated, whenever the program reaches the Spot Breakpoint
An red S in the state line indicates that there is a spot point and the system is no longer running in realtime
Over The Call is executed in real time but for the user it seems to be only one step over the call.
Next Next sets a temporary breakpoint to the next assembler or hll line and starts then the program execution. This command is useful to overstep a subroutine call or to leave a loop.
There are local buttons in the Data.List window for all basic debug commands
Program Counter
With Next a temporary breakpoint is set to the next written code line, here e.g. to leave the loop
Return Return sets a temporary breakpoint to the last instruction of a function and then starts the program execution.
Up This command is used to return to the function that called the current function. For this a temporary breakpoint is set at the instruction directly after the function call.
After pressing Return the program execution is stopped at the last instruction of the function
Press Up to return to the function that called the current function
TRACE32-ICE has a third memory, called Flag Memory that can be used for software analysis. It is a 2 bit memory. Flag memory has always to be allocated (MAP.Flag).
• When there is a read or opfetch to an address, the ReadFlag is set.
• If there is a write access to an address, the Write Flags is set.
The Flag memory can be used for:
• Code coverage
• Checking variables
• Stack depth analysis
The Flag system can not decide, if a prefetched instruction is executed or not.
• Short skips are not detected as not executed code.
• Prefetches at the end of a functions sets some flag bits in the next function
The analyzer base code coverage can do this without problems.
A read bit is set for all fetched instructions
Read Flag and Write Flags are set corresponding to the access to a variable/data
If the section information is provided by the compiler, use the Flag.SetSec to preset write flags to the code area and initialized data area, to prevent RBW triggering on these areas.
If now an access to an not-initialized variable happens, the realtime emulation will be stopped.