Thesis presentation

• 1. MULTI-FUNCTIONAL ANDRE-CONFIGURABLEMICROWAVE CONTROLDEVICESCHIK Man Chum, JonathanDepartment Electronic Engineering

2. Content Motivation Part 1 Tunable hybrids and couplers Literature review Proposed Rat-race Coupler with Wide bandwidthand Tunable Power Dividing Ratio Proposed CMOS Variable Power Divider DesignUsing Integrated Transformer 3. Content (cont) Part 2 Tunable attenuator Literature review Varactor-based Microwave Attenuator with WideTuning Ratio and Flat Insertion Loss High Linearity Varactor-Based Variable Attenuator Conclusion 4. Motivation To improve channel capacity and transmissionquality of future communication systems, re-configurabilityis an essential feature forenhanced performance, size and cost reduction. For example, Beam steering Polarization diversity MIMO Signal control devices (magnitude and phase)with compact size and low cost are of primeinterest. 5. Part 1 Tunable hybrid andcouplers Basic requirements of tunable couplers: Continuous tuning Large tuning range (coupling coefficient) Minimal control complexity (voltages andcomponents) Compact size Available bandwidth Insertion loss 6. Literature review: tunabledevices Based on directional couplers with variablecoupling Modifying the characteristic impedance ofmicrostrip branches 7. Literature review (tunabledevices) Based on Wilkinson Power Divider withvariable dividing ratio DGS + tuning diodes: to realize transmission lineof variable characteristic impedanceIsland MicrostripUnequal Dividing Ratio [1 : N]Bias Voltage (V) 8. Conventional Methods: MajorDrawbacks Variation of insertion loss with frequency Small tuning range Poor return loss performance Limited bandwidth Complex fabrication (multi-layer, backsideetching) 9. Tunable Rat-race Coupler(TRRC)1 Port 2 Port0 0 Z , 270 @ f9 At center frequency: Tunable power dividing ratio =4323= 2141=00 Ideal port isolation and return loss performance Single control voltageCDVCZ0 , 90 @ f0Biasing circuitryCDPort 4 Port 3Cheng, K.M.; and Sung Yeung, "A Novel Rat-Race Coupler With Tunable Power Dividing Ratio, Ideal Port Isolation, and Return Loss Performance,"IEEE Transactions on Microwave Theory and Techniques, vol.61, no.1, pp.55-60, Jan. 2013 10. K = 0.5K = 1K = 2Simulated Performance (ideal)10S11S22S31S21S41S23 Port 1Port 3Port 1Port 3Phase Difference () 11. Application Examples11 Variable Power Divider(anti-phase output) Variable Power Divider(in-phase output) Variable attenuator 12. Proposed Tunable Rat-race Coupler (New) Broadband operation (~40%) Wide tuning ratio Compact size Simple control (Single voltage, only two tuningdiodes) Simple fabrication (single layer)N1 N2Port 1Port 4Port 2Port 3CDCD 13. Proposed Tunable Rat-race Coupler (New) N1 and N2 are passive networks with specificfrequency characteristics (Frequency compensation) dY dY K d bYd d d Z2 2Ze,1 o,1 0 0 0 0 0 0 0dY dYe,2 o,1d d 0 0dY dYo,2 e,1d d 0 0N1 N2Port 1Port 4Port 2Port 3CDCDCheng, K.M.; and Chik, M.C., "A Novel Frequency Compensated Rat-Race Coupler With Wide Bandwidth and Tunable Power Dividing,"IEEE Transactions on Microwave Theory and Techniques, vol.62, no.8, pp.55-60, August 2013 14. Circuit diagram and Prototype Semi-distributed implementation Avoid lossy lumped inductor Lower assembly costPort1 Port 2C V bias Rblock CD CPort 3D CPort 4 , B Z, A Z, A Z 1 N, A Z2 NCenter frequency : 1 GHzSubstrate: Duroid RO4003CSize: g/5 g/15Tuning diode: InfineonBB857ZA = 86, ZB = 48, = 30, = 33 15. Ideal simulationPhase Difference ()K = 0.5K = 1K = 2S11S22S31S21S41S23Port 1Port 3Port 1Port 3 16. Measurement Results (K = 0.5)0-10-20-30-400-2-4-6-8-10| (Measured) |S| (Measured) |S| (Measured) |S| (Measured) |S| (EM)| (EM)| (EM)| (EM)| (Measured) |S| (EM)| (Measured) |S| (EM)| (Measured) |S| (EM)0.75 0.875 1 1.125 1.25Frequency (GHz)(dB)(dB)Sij|S2121|S4141|S2323|S43432001801600.75 0.875 1 1.125 1.25Frequency (GHz)S41- S21(Measured)S41- S21(EM)200-200.75 0.875 1 1.125 1.25Frequency (GHz)Phase Difference ()S43- S23(Measured)S43- S23(EM)0.75 0.875 1 1.125 1.25Frequency (GHz)Sij|S1111|S2222|S3131 17. Measurement Results/S| (EM)/S| (EM)/S| (Measured)/S| (Measured)1 4.5 8 11.5 151050-5-10Control Voltage (V)Power Dividing Ratio (dB)|S2141|S4323|S2141|S4323 18. Short Summary Novel broadband tunable rat-race coupler Optimal design of N1 and N2 for broadbandoperation (analytical formulation) Increased Bandwidth (from 10% to 40%) Semi-lumped implementation (internal lossand size) 19. Proposed CMOS variable powerdivider For CMOS implementation, transmission line isreplaced of LC circuit. For further size reduction (inductors),transformer is introduced.Port 1 Port 2Port 4Port 3CCPort 1 Port 2Port 3kAChik, M.C., Li W.; and Cheng, K.M.; "A compact variable power divider design in CMOS process," Asia-Pacific Microwave Conference, November2013 20. Simulation ResultskA = kB = 0 (inductor) kA = kB = 0.2(transformer)4 4.5 5 5.5 60-2-4-6-8-10Frequency (GHz)(dB)SijS21S41S23K = 0.5K = 1K = 24 4.5 5 5.5 60-10-20-30-40Frequency (GHz)(dB)SijS11S22K = 0.5K = 1K = 24 4.5 5 5.5 60-2-4-6-8-10Frequency (GHz)(dB)SijS21S41S23K = 0.5K = 1K = 24 4.5 5 5.5 60-10-20-30-40Frequency (GHz)(dB)SijS11S22K = 0.5K = 1K = 2 21. Circuit layout and Fabricatedchip Center frequency: 5 GHz Die size: 1.2mm 0.8mm Tuning ratio of varactor diode : 2 - 3Vbias VCC 22. Measurement Results (K = 0.5)| (Simulated)| (Simulated)| (Measured)| (Measured)4 4.5 5 5.5 60-2-4-6-8-10Frequency (GHz)(dB)Sij|S21|S31|S21|S314 4.5 5 5.5 6200180160Frequency (GHz)Phase Difference ()S41- S21(Simulated)S41- S21(Measured)| (Simulated) |S| (Simulated) |S| (Simulated)| (Measured) |S| (Measured) |S| (Measured)4 4.5 5 5.5 60-10-20-30-40(dB)SijFrequency (GHz)|S112233|S112233| (Simulated)| (Measured)4 4.5 5 5.5 60-10-20-30-40Frequency (GHz)(dB)Sij|S23|S23 23. Measurement results50-5-10-1 -0.5 0 0.5 1Control Voltage (V)Power Dividing Ratio (dB)SimulatedMeasured1007550250-1 -0.5 0 0.5 1|2 (%)31|2 - |S21|2 - |S111 - |SControl Voltage (V) 24. Short Summary24 Realization of TRRC in CMOS technology Chip area reduction by using different transformer Good performance over 10% fractional bandwidth Tuning range: 9 dB Port isolation: > 25 dB Return loss: > 13 dB Output phase difference deviation: < 5 Tuning capability of power dividing ratio Limited by small tuning capacitance ratio (< 3 typically)of standard CMOS diodes 25. Part 2 Variable Attenuator Control of output power level (e.g. AGC) Conventionally, PIN diodes are used as thetuning elements Biasing current required (DC power consumption) Multiple diodes Multiple control voltages Limited tuning range (attenuation level) Limited dynamic range (power-handling capability) 26. Literature Review: variableattenuatorsPIN diode based Varactorbased 27. Proposed variable attenuator (New) Variable power divider with 180 outputs Power combiner Varactor-tunedChik, M.C., and Cheng, K.M.; "A varactor-tuned variable attenuator design with wide tuning range and flat insertion loss response," InternationalMicrowave Symposium, June 2014 28. ComparisonAttenuator with PIN diodes Proposed attenuatorDC PowerconsumptionIncreases with number ofdiodesZeroBandwidth Wide ModerateControl method Multiple control voltages Single control voltageHybrid design withvaractorsProposed attenuatorVariation withfrequencyLarge SmallTuning range(Attenuation)Increases with capacitanceratio (tuning diode)Independent ofcapacitance ratio (tuningdiode) 29. Theory of operation: proposeddesign1 PortWilkinsonpowercombinerBroadbandTunableRat -race coupler2 PortAB AB2A2 B2 11 1 12 2 2 (1 )21 BA CA2kS S Sk 30. Simulated performance 31. Circuit diagram and Prototype Center frequency: 1 GHz Substrate: Duroid RO4003C Tuning diode: Infineon BB857Port 1Port 20 2ZCC Vbias Rblock CD C, A Z0 Z0 2Zg 41 PortPort 2block C block CD C 32. Simulation and MeasurementResults 4 dB to 30 dB with a control voltage (reverse-bias)ranging from 0 to 8.2V Limited by non-ideal cancellation of signals0 2 4 6 8 10 12 14 16 18 20403020100Attenuation Level (dB)Control Voltage (V)EMMeasured 33. Simulation and MeasurementResults0-5-10-15-20-25-30VC = 0.66VVC = 7.12V0.8 0.85 0.9 0.95 1 1.05 1.1| (dB)21|SFrequency (GHz)0-10-20-30-40|S11|, VC = 7.12V|S22|, VC = 7.12V|S11|, VC = 0.66V|S22|, VC = 0.66V0.8 0.85 0.9 0.95 1 1.05 1.1Reflection Coefficient (dB)Frequency (GHz) 34. Short Summary Novel Varactor-based Variable Attenuator Wide tuning (attenuation) Simple structure Single control voltage Zero DC power consumption Issues need to be addressed Narrow-band (at large attenuation) Attenuation is very sensitive to bias (control)voltage Limited power handling capability 35. Issues: Narrowband operation Insertion loss flatness degrades withincreasing attenuation Smaller bandwidth 36. Issues: Narrowband operationS21 of TRRCS21 of Wilkinsonpower combinerS41 of TRRCS31 of Wilkinsonpower combiner 37. Proposed solution (Frequencycompensation) WPC is replaced by rat-race coupler with k = 1S21 of TRRC S23 of RRCS41 of TRRC S43 of RRC 38. Circuit diagram and Prototype Broadband rat-race coupler (TRRC) Fixed rat-race couplerPort 1VCCblockRbiasCblockCZA, ZB, Z0Z0CPort 2CCCenter frequency: 1 GHzSubstrate: Duroid RO4003CTuning diode: Infineon BB857 39. Measured results0-10-20-30-40|S22|, VC = 7.2V0.8 0.85 0.9 0.95 1 1.05 1.1Reflection Coefficient (dB)Frequency (GHz)0-5-10-15-20-25-30| (dB)210 2 4 6 8 10 12 14 16 18 20403020100Attenuation Level (dB)Control Voltage (V)MeasurementSimulation|S11|, VC = 4.5V|S11|, VC = 7.2V|S22|, VC = 4.5VVC = 4.5V0.8 0.85 0.9 0.95 1 1.05 1.1|SFrequency (GHz)VC = 7.2V 40. Power performance (attenuator) Attenuation level = 10 dB) Attenuation level = 25 dB)0 5 10 15 20 25200-20-40-60-80-100Output Power (dB)Input Power (dB)FundamentalIMD30 5 10 15 20 25200-20-40-60-80-100Output Power (dB)Input Power (dB)FundamentalIMD3f1 f2FundamentalIMD3Attenuator 41. Nonlinearity Study Tuning varactor is the major contributor of IMDCjV( ) 0 nC V 120 1 2 C(v) C C v C v ....CjV nCC 100n C0 1 1 1 nCjVC 0n n C 22 212 1 nCjVC 42. Nonlinearity Study Output power (nonlinear current method)P2 21 1 1 2 1 inOUT inP A C C P3 2 1 2 2 IMD in P C C P Reduction in C1, C2 2A22 3 reduction of IMD and power expansion 43. Proposed linearization methodOriginal Design Proposed linearizationcircuit C(VB)CPC(VA) Additional capacitor with fixed value Requires minimal modification of the originaldesign including both layout and choice ofcomponents 44. Proposed linearization methodCP = 0 pFCP = 1 pFCP = 2 pFCP = 2.7 pFCP = 3 pFCP = 0 pFCP = 2.5 pFVA VBCDCheng, K.M.; and Chik, M.C., "A Novel Varactor-tuned Variable Attenuator Design With Enhanced Linearity Performance,"IEEE Transactions on Microwave Theory and Techniques, submitted. 45. Simulation Results200-20-40-60-80-100-1200 5 10 15 20 25Output Power (dB)Input Power (dB)FundamentalIMD3CP = 0 pFCP = 1 pFCP = 2 pFCP = 2.7 pFCP = 3 pF 46. Circuit Diagram and PrototypeCenter frequency: 1 GHzSubstrate: DuroidRO4003CTuning diode: InfineonBB8570 2ZCCVbias Rblock CCpDC, A Z0 Z0 2Zg 41 P ortPort 2block C block CD CCpPort 1Port 2 47. Measured results CP = 0 and CP = 2.2pF4020 Reduce attenuation sensitivity IMD suppression0-20-40 Power expansion improvement Significant for large CP0 5 10 15 20 250-10-20-30-40(dB)S21Bias Voltage (V)CP= 0 pFCP= 2.2 pFFunndamentalIMD0 5 10 15 20 25 30-60-80Output Power (dB)Input Power (dB)3CP= 0 pFCP= 2.2 pF0 5 10 15 20 25 3040200-20-40-60-80Output Power (dB)Input Power (dB)FunndamentalIMD3CP= 0 pFCP= 2.2 pF 48. Short Summary Novel linearization method Simple to apply Attenuation level is much less sensitive to controlvoltage Substantial reduction in IMD 49. Conclusion Several new microwave control devices havebeen introduced: Broadband rat-race with tunable power dividingratio CMOS implementation of variable power divider Varactor-tuned variable attenuator with highlinearity They offer enhanced performance: Wide tuning capability Wide bandwidth 50. Authors Publication List Journal Paper K. K. M. Cheng, and M. C. J. Chik, A frequency-compensated rat-race coupler withwide bandwidth and tunable power dividing ratio, IEEE Trans. Microw. Theory &Techn., vol. 61, no. 8, pp. 2841-2847, Aug. 2013. M. C. J. Chik, and K. K. M. Cheng, Group delay investigation of rat-race couplerdesign with tunable power dividing ratio, IEEE Microw. Compon. Lett., vol. 24, no. 5,pp 324-326., May 2014. K. K. M. Cheng, and M. C. J. Chik, A varactor-based variable attenuator design withenhanced linearity performance, IEEE Trans. Microw. Theory & Techn. (Submitted) M. C. J. Chik, and K. K. M. Cheng, "A varactor-based variable attenuator withextended bandwidth by frequency compensation" (In preparation) Conference Paper M. C. J. Chik, and K. K. M. Cheng, A low-profile, compact, mode-decompositionbased antenna array for use in beam-forming application, 2012 Asia-Pacific Microw.Conf. Proc., Kaosiung, 2012, pp. 58-60, Dec. 2012. M. C. J. Chik, W. Li, and K. K. M. Cheng, A 5 GHz, integrated transformer based,variable power divider design in CMOS process, in 2013 Asia-Pacific Microw. Conf.Proc., Seoul, 2013, pp. 366 368., Nov. 2013. M. C. J. Chik, and K. K. M. Cheng, A novel, varactor-based microwave attenuator withwide tuning ratio and flat insertion loss response, presented in Proc. Int. Microw.Symp. 2014., Tampa Bay, USA., Jun. 2014. L. P. Cai, M. C. J. Chik, and K. K. M. Cheng, A compact, linearly-polarized antennadesign with electronically steerable angle of orientation, 2014 Asia-Pacific Mrcow.Conf. (Submitted)