November 2016 DocID018499 Rev 6 1/68 1 UM1057 User manual STM3220G-EVAL evaluation board Introduction The STM3220G-EVAL evaluation board is a complete demonstration and development platform for the STM32F2 Series and includes an embedded STM32F207IGH6 high- performance ARM ® Cortex ® -M3 32-bit microcontroller. The full range of hardware features on the board is described to evaluate all peripherals (such as USB OTG HS, USB OTG FS, Ethernet, motor control, CAN, microSD™ card, smartcard, USART, Audio DAC, RS-232, IrDA up to version C07 of the board, SRAM, ST MEMS, EEPROM) before developing applications. Extension headers are used to easily connect a daughterboard or a wrapping board for any specific application. The in-circuit ST-LINK tool provides easy JTAG and SWD interface debugging and programming. Figure 1. STM3220G-EVAL evaluation board 1. Picture is not contractual. www.st.com
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November 2016 DocID018499 Rev 6 1/68
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UM1057User manual
STM3220G-EVAL evaluation board
Introduction
The STM3220G-EVAL evaluation board is a complete demonstration and development platform for the STM32F2 Series and includes an embedded STM32F207IGH6 high-performance ARM®Cortex®-M3 32-bit microcontroller.
The full range of hardware features on the board is described to evaluate all peripherals (such as USB OTG HS, USB OTG FS, Ethernet, motor control, CAN, microSD™ card, smartcard, USART, Audio DAC, RS-232, IrDA up to version C07 of the board, SRAM, ST MEMS, EEPROM) before developing applications. Extension headers are used to easily connect a daughterboard or a wrapping board for any specific application.
The in-circuit ST-LINK tool provides easy JTAG and SWD interface debugging and programming.
• Both ISO/IEC 14443 type A and B smartcard support
• I2C compatible serial interface 8 Kbyte EEPROM, ST MEMS and I/O expander
• IEEE 802.3-2002 compliant Ethernet connector
• Two CAN 2.0 A/B channels on the same DB connector
• RS-232 communication
• IrDA transceiver (only supported up to C07 version of the board, no more supported from C08 version)
• USB OTG (HS and FS) with Micro-AB connector
• Inductor motor control connector
• I2S Audio DAC, stereo audio jack for headset
• 3.2" 240x320 TFT color LCD with touchscreen
• 4 color LEDs
• Camera module and extension connector for ST camera plug-in
• Joystick with 4-direction control and selector
• Reset, wakeup, tamper and user button
• RTC with backup battery
• Extension connector for daughterboard or wrapping board
• JTAG, SW and trace debug support
• Embedded ST-LINK/V2
• Five 5V power supply options: Power jack, USB FS connector, USB HS connector, ST-LINK/V2 or daughterboard
• MCU consumption measurement circuit
1.2 Demonstration software
Demonstration software is preloaded in the board-mounted Flash memory for easy demonstration of the device peripherals in standalone mode. For more information and to download the latest version, please refer to STM3220G-EVAL demonstration software at the www.st.com/mcu website.
1.3 Ordering information
To order the STM3220G-EVAL 0evaluation board, refer to Table 1:
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1.4 Delivery recommendations
Several verifications are needed before using the board for the first time to make sure that nothing has been damaged during shipment and no components are unplugged and lost.
When the board is extracted from its plastic bag, please check that no component remains in the bag. Main components to verify are:
1. The 25 MHz crystal (X1 and X4) may have been removed by a shock.
2. The camera connected on socket CN15 located on the right side of the board under the JTAG connector may be unplugged. If this is the case, please refer to the note in Section 2.18: Camera module to make sure to replug it in the correct position.
3. The microSD card may have been ejected from its connector CN6 (top left corner of the board).
The plastic protection on the camera should be removed carefully as the connection is very fragile.
Table 1. Ordering information
Order code Target STM32
STM3220G-EVAL STM32F207IGH6
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2 Hardware layout and configuration
The STM3220G-EVAL evaluation board is designed around the STM32F207IGH6 microcontroller in the UFBGA176 package. The hardware block diagram Figure 2 illustrates the connection between STM32F207IGH6 and peripherals (Camera module, LCD, SRAM, EEPROM, ST MEMS, USART, IrDA up to version C07 of the board, USB OTG HS, USB OTG FS, Ethernet, Audio, CAN bus, smartcard, microSD card and motor control) and Figure 3 locates these features on the evaluation board.
Note that for every figure (layouts and schematics) of this user manual, whenever IrDA is indicated it is only significant for board version up to C07, since IrDA has not been populated on latest versions of the board (so IrDA is not present from the C08 board onwards).
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Figure 2. Hardware layout and configuration
1. IrDA is not populated on the board from version C08 of the board.
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Figure 3. STM3220G-EVAL evaluation board layout
1. IrDA is not populated on the board from version C08 of the board.
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2.1 Power supply
The STM3220G-EVAL evaluation board is designed to be powered by 5 V DC power supply and to be protected by PolyZen from a wrong power plug-in event. It is possible to configure the evaluation board to use any of following five sources for the power supply:
• 5 V DC power adapter connected to JP18, the power jack on the board
• 5 V DC power with 500 mA limitation from CN8, the USB OTG FS Micro-AB connector
• 5 V DC power with 500 mA limitation from CN9, the USB OTG HS Micro-AB connector
• 5 V DC power with 500 mA limitation from CN21, the ST-LINK/V2 USB connector
• 5 V DC power from both CN1 and CN3, the extension connector for daughterboard (DTB for daughterboard on silkscreen)
The power supply is configured by setting the related jumpers JP4, JP32, JP18 and JP19 as described in Table 2.
Table 2. Power related jumpers and solder bridges
Jumper Description
JP4Jumper reserved for future use (RFU). Default setting: Fitted
JP32MCU_VDD is connected to 3.3 V power when JP32 is closed and MCU current consumption measurement can be done manually by multi-meter when JP32 is open. Default setting: Fitted
JP18
JP18 selects one of the five possible power supply sources.
Selects the ST-LINK/V2 USB connector (CN21) power supply, set JP18 as shown: (Default setting)
To select power supply jack (CN18) power supply, set JP18 as shown:
To select daughterboard connector (CN1 and CN3) power supply, set JP18 as shown:
HSFSDTBPSUSTlk
HSFSDTBPSUSTlk
HSFSDTBPSUSTlk
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Note: LED LD9 is lit when the STM3220G-EVAL evaluation board is powered by 5 V correctly.
2.2 Boot option
The STM3220G-EVAL evaluation board is able to boot from:
• Embedded User Flash
• System memory with boot loader for ISP
• Embedded SRAM for debugging
The boot option is configured by setting switch SW1 (BOOT1) and SW2 (BOOT0). The BOOT0 can be configured also via RS-232 connector CN16.
JP18(cont.)
To select USB OTG FS (CN8) power supply, set JP18 as shown:
To select USB OTG HS (CN9) power supply, set JP18 as shown:
To select power supply jack (CN18) power supply to both STM3220G-EVAL and daughterboard connected on CN1 and CN3, set JP18 as shown (daughterboard must not have its own power supply connected)
JP19
To connect Vbat to the battery, set JP19 as shown:
To connect Vbat to 3.3 V power, set JP19 as shown: (Default setting)
Table 2. Power related jumpers and solder bridges (continued)
Jumper Description
HSFSDTBPSUSTlk
HSFSDTBPSUSTlk
HSFSDTBPSUSTlk
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Table 3. Boot related jumpers
BOOT 0 BOOT 1 Boot source
0 1 or 0 STM3220G-EVAL boots from User Flash (Default setting)
1 1 STM3220G-EVAL boots from Embedded SRAM
1 0 STM3220G-EVAL boots from System Memory
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2.3 Clock source
Four clock sources are available on STM3220G-EVAL evaluation board for STM32F207IGH6 and RTC embedded:
• X1, 25 MHz crystal for Ethernet PHY with socket. It can be removed when clock is provided by MCO pin of the MCU
• X2, 26 MHz crystal for USB OTG HS PHY
• X3, 32 kHz crystal for embedded RTC
• X4, 25 MHz crystal with socket for STM32F207IGH6 microcontroller (it can be removed from socket when internal RC clock is used)
2.4 Reset source
The reset signal of STM3220G-EVAL evaluation board is low active and the reset sources include:
• Reset button B1
• Debugging tools from JTAG connector CN14 and trace connector CN13
• Daughterboard from CN3
• RS-232 connector CN16 for ISP
• ST-LINK/V2
2.5 Audio
The STM3220G-EVAL evaluation board enables stereo audio play and microphone recording by an external headset connected on audio jack CN11. An audio DAC CS43L22 is connected to the I2S2 port and the DAC channel and a microphone amplifier is connected to ADC of the STM32F207IGH6. The CS43L22 can be configured via I2C1 and the external PLL (U36) can provide an external clock which is connected to the I2S_CKIN pin (PC9).
Note: To avoid speaker damage it is mandatory to connect the headphone to the board on CN11 during debug of audio code. When the program is stopped on a breakpoint, a DC voltage may be applied to the speaker which induces power consumption incompatible with the speaker.
Warning: Signal I2S_SD (PI3) is close to signal TCK/SWCLK of the JTAG/SWD interface, so to avoid possible communication issues on JTAG/SWD when the I2S interface is used the recommendations are to: 1) Prefer usage of embedded ST-LINK/V2 to external tool connected on CN14. 2) Configure PI3 GPIO in low speed (2 MHz or 10 MHz).
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2.6 EEPROM
A 64 Kbit EEPROM is connected to the I2C1 bus of STM32F207IGH6.
2.7 CAN
The STM3220G-EVAL evaluation board enables two channels of CAN2.0A/B compliant CAN bus communication based on a 3.3 V CAN transceiver on one DB9 connector (CN10). The two CAN buses can be disconnected by jumpers from the relevant STM32F207IGH6 I/Os which are shared with FSMC and USB OTG HS. JP3 and JP10 must be refitted to enable CAN1 or CAN2 as listed in Table 6. High-speed, Standby and Slope Control modes can be selected by setting jumper JP7.
Table 4. Audio related jumpers
Jumper Description
JP16 Description of JP16 is in Table 11 on page 18.
JP33 The microphone amplifier can be disabled when JP33 is fitted. Default setting: Not fitted.
Table 5. EEPROM related jumper and solder bridge
Jumper Description
JP24EEPROM is in Write Protection mode when JP24 is not fitted.
Default setting: Not fitted.
Table 6. CAN-related jumpers
Jumper Description
JP3
To connect CAN1_TX to CAN transceiver, set JP3 as shown:
To connect CAN2_TX to CAN transceiver, set JP3 as shown:
JP10
To connect CAN1_RX to CAN transceiver, set JP10 as shown:
To connect CAN2_RX to CAN transceiver, set JP10 as shown:
PD0 and PB5 are disconnected from the CAN transceiver and used for FSMC and USB_OTG_HS when jumper JP10 is not fitted (default setting).
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JP7
To enable the selected CAN transceiver to work in Standby mode, set JP7 as shown:
To enable the selected CAN transceiver to work in High-speed mode, set JP7 as shown (Default setting):
To enable the selected CAN transceiver to work in Slope Control mode, do not fit JP7.
JP9To enable the terminal resistor for the selected CAN, fit a jumper on JP9.
(Default setting: Not fitted).
Table 6. CAN-related jumpers (continued)
Jumper Description
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2.8 RS-232 and IrDA
Both RS-232 and IrDA communication is enabled by D-type 9-pin RS-232 connector (CN16) and IrDA transceiver U11 which are connected to USART3 of STM32F207IGH6 on the STM3220G-EVAL evaluation board.
The IrDA transceiver (TFDU6300) is not populated on the STM3220G-EVAL evaluation board from version C08. The version of the board is written on sticker placed on bottom side of the board (ex: MB786-C08). For boards version C08 or newer it is possible to solder manually the TDFU6300 on U11 footprint to support IRDA feature.
For ISP support, two signals are added on the RS-232 connector CN16:
• Bootloader_RESET (shared with CTS signal)
• Bootloader_BOOT0 (shared with DSR signal)
RS-232 or IrDA can be selected by setting JP22 (note that jumper JP22 position 2-3 is unused from version C08), and ISP can be enabled by setting JP29 and JP34 as shown in Table 7.
Table 7. RS-232 and IrDA related jumpers
Jumper Description
JP22
To connect USART3_RX to IrDA transceiver and enable IrDA communication, set JP22 as shown (this configuration is useless on the board from version C08):
To connect USART3_RX to RS-232 transceiver and enable RS-232 communication, set JP22 as shown (Default setting):
To enable microSD card, which shares same I/Os with RS-232, JP22 is not fitted.
JP29Bootloader_BOOT0 is managed by pin 6 of CN16 (RS-232 DSR signal) when JP29 is closed. This configuration is used for boot loader application only.
Default setting: Not fitted.
JP34Bootloader_RESET is managed by pin 8 of CN16 (RS-232 CTS signal) when JP34 is fitted. This configuration is used for boot loader application only.
Default setting: Not fitted.
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2.9 Motor control
The STM3220G-EVAL evaluation board enables a three-phase brushless motor control via a 34-pin connector (CN5), which provides all required control and feedback signals to and from the motor power-driving board. Available signals on this connector include emergency stop, motor speed, 3-phase motor current, bus voltage, heatsink temperature (coming from the motor driving board) and 6 channels of PWM control signal going to the motor driving circuit.
The solder bridge (SB18) allows to choose two kinds of synchronization methods for PFCs (Power Factor Correction) while the SB17 can be set for different signals on pin 31 of CN5.
The I/O pins used on motor control connector CN5 are multiplexed with some peripherals on the board; either motor control connector or multiplexed peripherals can be enabled by the setting of solder bridges SB10, SB11, SB12, SB14, SB15 and SB16.
Note: 1 Some 0 ohm resistors have to be removed or soldered to enable motor control application except the solder bridges configurations mentioned above:
– R34, R58 & R51 to be removed
– R66, R204 & R205 to be soldered
2 microSD card must be removed from CN6 for motor control application.
Table 8. Motor control solder bridges
Solder bridge
DescriptionMultiplexed peripherals
SB18When closed, SB18 redirects the PFC synchronized signal to timer 3 input capture pin 2 in addition to the timer 3 external trigger input.
Default setting: Open-
SB17
For CN5 encoder signal input (pin 31), SB17 must be open.
For CN5 special motor analog signal input (pin 31), SB17 must be closed.
Default setting: Open
-
SB16To connect MC_EmergencySTOP to PI4, close SB16.
Default setting: Open
Camera module connected to
CN15
SB10To connect MC_EnIndex to PB8, close SB10.
Default setting: Open
EthernetSB11To connect MC_CurrentA to PC1, close SB11.
Default setting: Open
SB12To connect MC_CurrentB to PC2, close SB12.
Default setting: Open
SB14To connect MC_EnB to PD13, close SB14.
Default setting: OpenFSMC
SB15To connect MC_EnA to PD12 close SB15.
Default setting: Open
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2.10 Smartcard
STMicroelectronics smartcard interface chip ST8024 is used on STM3220G-EVAL board for asynchronous 3 V and 5 V smartcards. It performs all supply protection and control functions based on the connections with STM32F207IGH6 listed in Table 9:
Smartcard shares some I/Os with I2S bus for Audio. Some jumper settings need to be reconfigured to enable smartcard as indicated below:
2.11 microSD card
The 1 GByte or more microSD card connected to SDIO of STM32F207IGH6 is available on the board. microSD card detection is managed by the standard I/O port PH13. microSD card shares I/Os with motor control, RS-232 and audio. The jumpers JP22 and JP16 must be refit and motor control connector (CN5) must be disconnected for microSD card function.
Table 9. Connection between ST8024 and STM32F207IGH6
ST8024 signals DescriptionConnect to
STM32F207IGH6
5V/3V Smartcard power supply selection pin PH15
I/OUC MCU data I/O line PC6
XTAL1 Crystal or external clock input PG7
OFFDetect presence of a card, MCU interrupt, share same pin with motor controller
PF6
RSTIN Card reset input from MCU PF7
CMDVCCStart activation sequence input (Active Low), share same pin with I2S DAC and Motor control
PG12
Table 10. Smartcard related jumper
Jumper Description
JP21
To connect Smartcard_IO to PC6, JP21must be fitted.
JP21 must not be fitted for Audio DAC connection to I2S.
Default setting: Not fitted.
Table 11. microSD card related jumpers
Jumper Description
JP22 Description of JP22 is in Section 2.8: RS-232 and IrDA
JP16
PC9 is connected to microSD card_D1 when JP16 is set as shown to the right: (Default setting):
PC9 is connected to I2S_CKIN when JP16 is set as show to the right:
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2.12 ST MEMS
The ST MEMS device LIS302DL is connected to I2C1 bus of STM32F207IGH6 on the board.
2.13 Potentiometer
There is one 10 kΩ potentiometer RV1 connected to PF9 of STM32F207IGH6 on the board.
2.14 ADC
Two test points (TP3 AIN-) and (TP4 AIN+) are placed close to port PC1 of the MCU allowing precise measurements on ADC1, ADC2 or ADC3 channel 11. As PC1 is also used as current A input on the motor control connector it is recommended to remove R219 to optimize noise immunity on this input.
A potentiometer RV1 is connected to PF9 of STM32F207IGH6. If needed, a low pass filter (R74 and C59) can be placed on this input to reduce the bandwidth of the analog input PF9.
It is also possible to place the Ethernet PHY (U5) in low power mode in order to reduce the noise induced by this high frequency peripheral. Power down pin (MII_INT in the schematic) is connected to PB14 of the MCU, so this I/O can be to be configured as output low during analog precision measurement.
2.15 USB OTG FS
The STM3220G-EVAL evaluation board enables USB OTG full speed communication via a USB micro-AB connector (CN8) and USB power switch (U1) connected to VBUS. The evaluation board can be powered by this USB connection at 5 V DC with a 500 mA current limitation.
LED LD6 indicates that either:
• Power switch (U1) is ON and the STM3220G-EVAL functions as a USB host or
• VBUS is powered by another USB host while the STM3220G-EVAL functions as a USB device.
LED LD5 indicates an over-current.
2.16 Ethernet
The STM3220G-EVAL evaluation board enables 10/100M Ethernet communication by a PHY DP83848CVV (U5) and integrated RJ45 connector (CN7). Both MII and RMII interface modes can be selected by setting jumpers JP5, JP6 and JP8 as listed below:
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Note: 1 A test point (TP2) is available on the board for the PTP_PPS feature test.
2 The Ethernet PHY, U5, can be powered down by regulating PB14.
3 In RMII mode it is not possible to use MCO to output the 50 MHz clock to PHY due to the PLL limitation explained in chapter 2.6.5 of STM32F20x & STM32F21x Errata sheet (ES0005). In such a case it is possible to provide the 50 MHz clock by soldering a 50 MHz oscillator (ref SM7745HEV-50.0M or equivalent) on the U3 footprint located under CN3 and also removing jumper on JP5. This oscillator is not provided with the board.
Table 12. Ethernet related jumpers and solder bridges
Jumper Description
JP8
JP8 selects MII or RMII interface mode.
To enable MII, JP8 is not fitted.
To enable RMII interface mode, JP8 is fitted.
Default setting: Not fitted.
JP6
To enable MII interface mode, set JP6 as shown (Default setting):
To enable RMII interface mode, set JP6 as shown:
JP5
To provide 25 MHz clock for MII or 50 MHz clock for RMII by MCO at PA8, set JP5 as shown (Default setting):
To provide 25 MHz clock by external crystal X1 (for MII interface mode only) set JP5 as shown:
When clock is provided by external oscillator U3, JP5 must not be fitted (Default setting).
SB1
SB1 selects clock source only for RMII mode.
To connect the clock from MCO to RMII_REF_CLK, close SB1.
The resistor R212 has to be removed in this case.
Default setting: Open.
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2.17 USB OTG HS
The STM3220G-EVAL evaluation board enables USB OTG high speed communication via a USB micro-AB connector (CN9), USB high speed PHY (U8) and USB power switch (U4) connected to VBUS. The evaluation board can be powered by this USB connector (CN9) at 5 V DC with a 500 mA current limitation.
LED LD7 indicates that power switch (U4) is ON and the STM3220G-EVAL is working as a USB host or that VBUS is powered by another USB host when the STM3220G-EVAL is working as a USB device. LD8 indicates an over-current.
The USB ULPI bus is shared with CAN2 bus, JP10 and JP3 must be kept open for USB OTG HS.
Note: On boards MB786 prior to version B03 it is possible that after a board RESET the MCU is no longer able to control communication with the OTG PHY (U8). When this issue occurs the only way to recover OTG PHY control is to power the board OFF and ON. This issue is fixed on MB786 version B03 or newer.
2.18 Camera module
A camera module is connected to DCMI bus of STM32F207IGH6 and shares the same I/Os with the motor control connector. SB16 must be kept open (default setting) for camera module application.
There are two possible modules and omnivision cameras populated on the CN15 connector of the board:
• 1.3 Megapixel: Module CN01302H1045-C: Camera OV9655
• 2 Megapixel: Module CN020VAH2554-C: Camera OV2640
Note: 1 When the camera demo loaded in Flash is executed, some green pixels may appear in high contrast zones, depending on the image captured.
2 The camera is not firmly restricted on its connector (CN15). It is possible that during shipment the camera could be unplugged. In such case plug it into the right position as shown on the picture below (pin 1 dot on top left corner of the socket).
It is not recommended to remove it in order to avoid false contact later.
Table 13. microSD card related jumper
Jumper Description
JP31To disable USB OTG PHY U8, JP31 is not fitted.
Default setting: Fitted.
Table 14. Camera module related jumpers
Jumper Description
JP26To set power down mode for the camera module, JP26 is fitted.
Default setting: Not fitted.
SB16 Description of SB16 is in Section 2.9: Motor control.
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Figure 4. Pin 1 camera plug
1. Picture is not contractual
The camera extension connector CN23 is available on the boards to connect the ST camera plug-in board.
2.19 SRAM
The 16 Mbit SRAM is connected to FSMC bus of the STM32F207IGH6 which shares the same I/Os with CAN1 bus. JP3 and JP10 must not be fitted for SRAM and LCD application.
Table 15. SRAM related jumpers
Jumper Description
JP1
Connect PE4 to SRAM as A20 by setting JP1 as shown (Default setting):
Connect PE4 to trace connector CN13 as TRACE_D1 by setting JP1 as shown:
JP2
Connect PE3 to SRAM as A19 by settiing JP2 as shown (Default setting):
Connect PE3 to trace connector CN13 as TRACE_D0 by setting JP2 as shown:
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2.20 Development and debug support
Version 2 of the ST-LINK, called ST-LINK/V2, is embedded on the board. This tool allows onboard program loading and debugging of the STM32F using the JTAG or SWD interface. Third-party debug tools are also supported by the JTAG (CN14) or Trace (CN13) connectors.
To communicate with the embedded ST-LINK/V2, a specific driver needs to be installed on the PC. To download and install this driver, refer to the software and development tools page for the STM32F family available on www.st.com (the install shield is called ST-LINK_V2_USBdriver.exe).
Third-party toolchains, Atollic TrueSTUDIO, KEIL ARM-MDK, IAR EWARM and Tasking VX-Toolset support ST-LINK/V2 according to the following table:
The embedded ST-LINK/V2 connects to the PC via a standard USB cable from connector CN21. The bicolor LED LD10 (COM) indicates the status of the communication as follows:
• Slow blinking Red/Off: At power-on before USB initialization
• Fast blinking Red/Off: After the first correct communication between PC and ST-LINK/V2 (enumeration)
• Red LED On: When initialization between PC and ST-LINK/V2 is successfully finished
• Green LED On: After successful target communication initialization
• Blinking Red/Green: During communication with target
• Green On: Communication finished and OK
• Orange On: Communication failure
Note: 1 It is possible to power the board via CN21 (embedded ST-LINK/V2 USB connector) even if an external tool is connected to CN13 (trace) or CN14 (external JTAG and SWD).
2 If the I2S interface is used, refer to the warning in Chapter 2.5.
Table 16. Third-party toolchain support
Manufacturer Toolchain Version
Atollic TrueSTUDIO 2.1
IAR EWARM 6.20.4
Keil MDK-ARM 4.20
Tasking VX-Toolset ARM Cortex-M 4.0.1
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2.21 Display and input devices
The 3.2” TFT color LCD connected to FSMC bus and 4 general purpose color LEDs (LD 1, 2, 3, 4) are available as display devices. A touchscreen connected to an I/O expander (U24), 4-direction joystick with selection key, general purpose button (B4), wakeup button (B2) and tamper detection button (B3) are available as input devices.
Table 17. LCD modules
Pin on CN19
Pin name Pin connectionPin on CN19
Pin name Pin connection
1 CS FSMC_NE3 (PG10) 18 PD14 FSMC_D12
2 RS FSMC_A0 19 PD15 FSMC_D13
3 WR/SCL FSMC_NWE 20 PD16 FSMC_D14
4 RD FSMC_NOE 21 PD17 FSMC_D15
5 RESET RESET# 22 BL_GND GND
6 PD1 FSMC_D0 23 BL_Control +5V
7 PD2 FSMC_D1 24 VDD +3V3
8 PD3 FSMC_D2 25 VCI +3V3
9 PD4 FSMC_D3 26 GND GND
10 PD5 FSMC_D4 27 GND GND
11 PD6 FSMC_D5 28 BL_VDD +5V
12 PD7 FSMC_D6 29 SDO NC
13 PD8 FSMC_D7 30 SDI NC
14 PD10 FSMC_D8 31 XL I/O expander U24
15 PD11 FSMC_D9 32 XR I/O expander U24
16 PD12 FSMC_D10 33 YD I/O expander U24
17 PD13 FSMC_D11 34 YU I/O expander U24
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3 Connectors
3.1 Daughterboard extension connectors CN1, 2, 3 and 4
Four male headers, CN1, 2, 3 and 4, can be used to connect with a daughterboard or standard wrapping board to STM3220G-EVAL evaluation board. A total number of 140 GPIOs are available on the board.
Each pin on CN1, 2, 3 and 4 can be used by a daughterboard after disconnecting it from the corresponding function block on the STM3220G-EVAL evaluation board. Please refer to tables from Table 18 to Table 21 for details.
Table 18. Daughterboard extension connector CN1
Pin Description Alternative functionHow to disconnect with function block on
STM3220G-EVAL board
1 GND - -
3 PE3 Trace_D0 and FSMC_A19 Keep JP2 on 2<->3
5 PE5 Trace_D2 -
7 PI8 LCD_HSYNC -
9 PC14 OSC32_IN Remove R84, SB4 closed
11 PC15 OSC32_OUT Remove R85, SB5 closed
13 PI10 MII_RX_ER Remove RS3
15 PF0 FSMC_A0 -
17 PF2 FSMC_A2 -
19 GND - -
21 PF5 FSMC_A5 -
23 PF7 Smartcard_RST -
25 PF9 Potentiometer Remove R151
27 PH0 OSC_IN SB6 closed
29 PC0 ULPI_STP -
31 PC1 MII_MDC SB11 open
33 PC3 MII_TX_CLK Remove R51
35 PA0 WakeUP Remove R139
37 PA2 MII_MDIO -
39 GND - -
41 PH4 ULPI_NXT Remove R61
43 NC - -
45 NC - -
47 EMU_3V3 - -
49 EMU_5V - -
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2 PE2 Trace_CLK -
4 PE4 Trace_D1 & FSMC_A20 Keep JP1 on 2<->3
6 PE6 Trace_D3 -
8 PC13 Anti-Tamper Remove R143
10 GND - -
12 PI9 LED3 Remove R141
14 PI11 ULPI_DIR Remove R62
16 PF1 FSMC_A1 -
18 PF3 FSMC_A3 -
20 PF4 FSMC_A4 -
22 PF6 Smartcard_OFF Remove R126
24 PF8 LCD_CS -
26 PF10 Audio_IN Remove R196
28 PH1 OSC_OUT Remove R86, SB7 closed
30 GND - -
32 PC2 MII_TXD2 & MC SB12 open
34 VREF+ - -
36 PA1 MII_RX_CLK JP6 open
38 PH2 MII_CRS Remove RS3
40 PH3 MII_COL Remove RS3
42 PH5 OTG_FS_PowerSwitchOn Remove R18
44 NC - -
46 NC - -
48 APP_3V3 - -
50 GND - -
Table 19. Daughterboard extension connector CN2
Pin Description Alternative FunctionHow to disconnect with function block on
Pin Description Alternative FunctionHow to disconnect with function block on
STM3220G-EVAL board
Table 22. Motor Control connector CN5
DescriptionSTM32F207IGH6
pinCN5 pin CN5 pin
STM32F207IGH6 pin
Description
Emergency stop PI4 1 2 - GND
PWM-UH PI5 3 4 - GND
PWM-UL PH13 5 6 - GND
PWM-VH PI6 7 8 - GND
PWM-VL PH14 9 10 - GND
PWM-WH PI7 11 12 - GND
PWM-WL PH15 13 14 PC4 BUS voltage
Connectors UM1057
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3.3 microSD connector CN6
Figure 6. microSD connector CN6
Phase A current PC1 15 16 - GND
Phase B current PC2 17 18 - GND
Phase C current PC3 19 20 - GND
NTC bypass relay PH8 21 22 - GND
Dissipative brake PWM
PC8 23 24 - GND
+5V power +5V 25 26 PC5Heatsink
temperature
PFC SYNC PH10 and PH11 27 28 - VDD_Micro
PFC PWM PH12 29 30 - GND
Encoder A PD12 31 32 - GND
Encoder B PD13 33 34 PB8 Encoder Index
Table 22. Motor Control connector CN5 (continued)
DescriptionSTM32F207IGH6
pinCN5 pin CN5 pin
STM32F207IGH6 pin
Description
Table 23. microSD connector CN6
Pin number Description Pin number Description
1 SDIO_D2 (PC10) 5 SDIO_CLK (PC12)
2 SDIO_D3 (PC11) 6 Vss/GND
3 SDIO_CMD (PD2) 7 SDIO_D0 (PC8)
4 +3V3 8 SDIO_D1 (PC9)
- - 10 microSDCard_detect (PH13)
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3.4 Ethernet RJ45 connector CN7
Figure 7. Ethernet RJ45 connector CN7
3.5 USB OTG FS Micro-AB connector CN8
Figure 8. USB OTG FS Micro-AB connector CN8
Table 24. RJ45 connector CN7
Pin number
DescriptionPin
numberDescription
1 TxData+ 2 TxData-
3 RxData+ 4 Shield
5 Shield 6 RxData-
7 Shield 8 Shield
Table 25. USB OTG FS Micro-AB connector CN8
Pin number Description Pin number Description
1 VBUS (PA9) 4 ID (PA10)
2 D- (PA11) 5 GND
3 D+ (PA12) - -
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3.6 USB OTG HS Micro-AB connector CN9
Figure 9. USB OTG HS Micro-AB connector CN9
3.7 CAN D-type 9-pin male connectors CN10 (CAN1 or CAN2)
Figure 10. CAN D-type 9-pin male connector CN10 (CAN1 or CAN2)
3.8 Audio connector CN11
A 3.5 mm stereo audio jack CN11 is available on the STM3220G-EVAL board to support a headset (headphone & microphone integrated).
Table 26. USB OTG HS Micro-AB connector CN9
Pin number Description Pin number Description
1 VBUS 4 ID
2 D- 5 GND
3 D+ - -
Table 27. CAN D-type 9-pin male connector CN10 (CAN1 or CAN2)
Pin number Description Pin number Description
1,4,8,9 NC 7 CANH
3,5,6 GND 2 CANL
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3.9 Trace debug connector CN13
Figure 11. Trace debug connector CN13
3.10 JTAG debug connector CN14
Figure 12. JTAG debug connector CN14
Table 28. Trace debugging connector CN13
Pin number Description Pin number Description
1 3.3 V power 2 TMS/PA13
3 GND 4 TCK/PA14
5 GND 6 TDO/PB3
7 KEY 8 TDI/PA15
9 GND 10 RESET#
11 GND 12 TraceCLK/PE2
13 GND 14 TraceD0/PE3 or SWO/PB3
15 GND 16 TraceD1/PE4 or nTRST/PB4
17 GND 18 TraceD2/PE5
19 GND 20 TraceD3/PE6
Table 29. JTAG debug connector CN14
Pin number Description Pin number Description
1 3.3 V power 2 3.3 V power
3 PB4 4 GND
5 PA15 6 GND
7 PA13 8 GND
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3.11 Camera module connector CN15
Figure 13. Camera module connector CN15
9 PA14 10 GND
11 RTCK 12 GND
13 PB3 14 GND
15 RESET# 16 GND
17 DBGRQ 18 GND
19 DBGACK 20 GND
Table 29. JTAG debug connector CN14 (continued)
Pin number Description Pin number Description
Table 30. Camera module connector CN15
Pin number Description Pin number Description
1 DGND 13 XCLK1
2 DGND 14 Y6(PI6)
3 SIO_D (PB9) 15 DGND
4 AVDD (2.8V) 16 Y5(PI4)
5 SIO_C (PB6) 17 PCLK (PA6)
6 RESET 18 Y4(PH14)
7 VSYNC (PI5) 19 Y0 (PH9)
8 PWDN 20 Y3(PH12)
9 HREF (PH8) 21 Y1(PH10)
10 DVDD (1.8V) 22 Y2(PH11)
11 DOVDD (2.8V) 23 AGND
12 Y7(PI7) 24 AGND
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3.12 RS-232 connector CN16
Figure 14. RS-232 connector CN16 with ISP support
3.13 Power connector CN18
The STM3220G-EVAL evaluation board can be powered from a 5 V DC power supply via the external power supply jack (CN18) shown in Figure 15. The central pin of CN18 must be positive.
Figure 15. Power supply connector CN18
3.14 TFT LCD connector CN19
One 34-pin male header CN19 is available on the board for connecting LCD module board MB785. Please refer to Section 2.21: Display and input devices for details.
Table 31. RS-232 connector CN16 with ISP support
Pin number Description Pin number Description
1 NC 6 Bootloader_BOOT0
2 RS232_RX (PC11) 7 NC
3 RS232_TX (PC10) 8 Bootloader_RESET
4 NC 9 NC
5 GND - -
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3.15 Smartcard connector CN20
Figure 16. Smartcard connector CN20
3.16 ST-LINK/V2 connector CN21
The USB type B connector CN21 is for ST-LINK/V2 connected between the STM3220G-EVAL evaluation board and the PC for board debugging.
- RFU means Reserved for Future Use.- As an option, RFU could be tied to VDD or VSS for forward compatibility with future STM32F products. However, user may leave RFU pin connected to VDD, or VSS, or NC for STM32F2xx exclusive use.- JP4 should be fitted for future backward compatibility with sTM32F2xx.
Updated Section 2.16: Ethernet, Section 2.17: USB OTG HS and Section Appendix A: Schematics.
07-Oct-2011 4Updated Table 2 JP4 description, Table 5 JP24 description and Section Appendix A: Schematics. Added warning in Chapter 2.5 and note in Chapter 2.20.
09-Jan-2012 5Added note in Chapter 2.5 and updated Section Appendix A: Schematics.
02-Nov-2016 6Added comment IrDA is only supported up to C07 version of the board.
Figure 17 to Figure 37 updated.
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