Spartan™-3E FPGAs for Lowest Total Cost: Configuration Options
Spartan-3E Configuration Options Webcast
Agenda
• Introduction to the low-cost Spartan-3E FPGA family
• Low-cost configuration options with Spartan-3E FPGAs
• Choosing the optimal configuration solution for your system
• Configuration solutions using SPI and parallel flash memory
Spartan-3E Configuration Options Webcast
Spartan Series:
The World’s Lowest Cost FPGAs
$14.45 Price per 1000 Logic Cells $0.46
Low-Cost Networking
Set Top Boxes
Digital Video Recorders (DVR)
Flat Panel Displays
Home Entertainment
DVD Writer/Players
Mass Market Consumer Electronics
1998 1999 2000 2001 2002 2003 2004 2005
30x cost-per-
logic reduction
Spartan Spartan-XL Spartan-II Spartan-IIE Spartan-3 Spartan-3L,
Spartan-3
EasyPath
Spartan-3E
Spartan-3E Configuration Options Webcast
The Spartan-3 Generation Easy, Inexpensive, Complete FPGA Solutions
• The leader in low-cost programmable logic
– For implementing custom circuitry
– For integrating system functions into a single device
• Three families in the 90nm Spartan-3 Generation
– Spartan-3 (introduced in 2003)
– Spartan-3L (introduced in 2004)
– Spartan-3E (introduced in 2005)
• All built on Xilinx mainstream 90nm technology
• Supported by a broad portfolio of IP, reference designs, hardware
evaluation kits, design tools, training and support
Spartan-3E Configuration Options Webcast
The Newest Family: Spartan-3E
• 7th Family in the Spartan Series of low-cost FPGAs
– Five devices from 100K gates to 1.6M gates
– Up to 47% cost reduction from Spartan-3
• World’s Lowest Cost FPGAs
– 100K system gate FPGA for under $2*
– 1.2M system gate FPGA for under $9*
• Ready for Production
– Utilizes 90nm process technology and 300mm wafers
– Full design tool support in ISE and WebPack
– Broad portfolio of Spartan-3 IP
*Pricing is for 500K units, 2H06
Spartan-3E Configuration Options Webcast
Spartan-3E Family Members
36 28 20 12 4 18x18 Multipliers
8 8 4 4 2 DCMs
136K
504K
304
19512
1.2M
15K
72K
108
2160
100K
33192 10476 5508 Logic Cells
648K 360K 216K Block RAM bits
231K 73K 38K Distributed RAM bits
376 232 172 Maximum I/O
1.6M 500K 250K System Gates
Device
3S1200E 3S100E 3S1600E 3S500E 3S250E
Spartan-3E Configuration Options Webcast
Spartan-3E Family:
Key New Features
• Support for configuration by SPI/Parallel commodity flash memory
– Low/zero cost configuration for systems with existing flash memory
• Enhancements for Digital Consumer Electronics markets
– Consumer I/O standards: Mini-LVDS, PCI-64/66, DDR 333
– Expanded DCM input frequency down to 5MHz
• Enhancements for Embedded Designers
– SPI/Parallel Flash useable post-configuration for code & data storage
– 32-bit MicroBlaze soft processor in XC3S1200E: $0.48 (~5% of FPGA)
• Enhancements for Low-Cost Digital Signal Processing
– Multiplier performance increased to 325MHz
– 9.1 GMAC/s in XC3S1200E ( less than $1/GMAC/s)
*Pricing is for 500K units, 2H06
Spartan-3E Configuration Options Webcast
Spartan-3E FPGAs for Lowest
Total Cost
• Lowest Device Cost
– 100K system gate FPGA for under $2*
– 1.2M system gate FPGA for under $9*
• Lowest System Cost
– Platform architecture enables complex functions within FPGA
• Digital signal processing
• Embedded processing
– Complex interfaces built into Spartan-3E I/O
• Support for 18 common I/O standards
• Support for numerous low-cost configuration options
*Pricing is for 500K units, 2H06
Spartan-3E Configuration Options Webcast
Agenda
• Introduction to the low-cost Spartan-3E FPGA family
• Low-cost configuration options with Spartan-3E FPGAs
• Choosing the optimal configuration solution for your system
• Configuration solutions using SPI and parallel flash memory
Spartan-3E Configuration Options Webcast
Spartan-3E Configuration Options
• Configuration memory with direct FPGA-to-memory interface
– Xilinx Platform Flash
• Complete family of feature-rich configuration memory
• Low-power, small-form-factor packaging
– Commodity flash memory
• Serial Peripheral Interface (SPI)
• Parallel interface
• Configuration storage with separate controller
– Configuration data may be stored in local storage and directed to the Spartan FPGA by an intelligent host
– A CoolRunner-II CPLD can manage the configuration interface between the Spartan FPGA and nearly any form of external semiconductor memory
• In-System Programming (ISP)
– JTAG serial and parallel-IV programming
– Parallel and USB configuration cables
– Third party tools available for ISP of commodity Flash memory
Spartan-3E Configuration Options Webcast
Configuration with Commodity Serial
(SPI) & Parallel Flash Memory
• Feature Details – Embedded control logic enables configuration from low-cost commodity
memory: Serial Peripheral Interface (SPI) & Parallel Flash
– Complete SPI support: Spartan-3E can address the memory after configuration through the configuration port (competing low-cost FPGAs cannot)
• Application Examples – Many systems already have SPI or parallel flash memory – simply use an
incrementally larger memory for the FPGA configuration data
– Implement a MicroBlaze soft processor in the FPGA and store embedded processing code & data externally in the SPI or Flash memory device
– Multiboot configuration enables two independent applications to be loaded from parallel flash memory
Spartan-3E Configuration Options Webcast
Agenda
• Introduction to the low-cost Spartan-3E FPGA family
• Low-cost configuration options with Spartan-3E FPGAs
• Choosing the optimal configuration solution for your system
• Configuration solutions using SPI and parallel flash memory
Spartan-3E Configuration Options Webcast
Choosing the Optimal Configuration
Solution for Spartan-3E
• Factors to consider to choose your optimal configuration solution
– Using existing on-board memory or controller
• “Extra bits” on memory chips
• Microcontroller
– Calculating the lowest total cost
• Component cost
• PCB and system costs
• Development cost
• Programming and other costs
– Technical and sales support
• Single vs. multiple source
• Supply guarantee
Spartan-3E Configuration Options Webcast
Choosing the Optimal Configuration
Solution for Spartan-3E
• More factors to consider… – Exclusive Xilinx Platform Flash features
• JTAG programming
• Revisioning
• Compression
• High speed parallel configuration
• Integrated software and programming hardware support from Xilinx
– Parallel NOR flash features
• Multiboot configuration with parallel NOR flash
• Embedded processing applications
– Packaging
• Footprint
• Upgradeability without PCB changes
Spartan-3E Configuration Options Webcast
Xilinx Platform Flash:
Pros and Cons
• Single supplier for FPGA and PROM
• One contact for sales and support
• In system programmability with Xilinx tools
• JTAG programming
• Revisioning
• Compression
• High speed parallel configuration
• Power-on, brown-out protection
• Up to 85% lower price than previous
XC18V Family and under $1/Mbit in
volume
• Using “extra memory bits” (that are not required for configuration) as a general purpose data store requires additional logic in FPGA
• Single supplier (but Xilinx is the supplier!)
Advantages Limitations
Spartan-3E Configuration Options Webcast
SPI Flash:
Pros and Cons
• Lowest unit cost
• High density
• Multiple suppliers, most pin compatible
• Random accessible, byte addressable
• Readable/writeable by FPGA user application
• Low power
• High write endurance (100K+ cycles)
• Long data retention
• No JTAG interface
• Slower data transfer
• Not sold by Xilinx
– May require separate vendor
qualification
• Not supported by Xilinx
– No low cost Xilinx
programming hardware
support for ISP
• No power-on, brown-out
protection
Advantages Limitations
Spartan-3E Configuration Options Webcast
Parallel NOR Flash:
Pros and Cons
• Uses existing onboard memory (commonly used for embedded processing apps)
• Multiboot capability
• Lowest unit cost
• High density
• Multiple suppliers, most pin compatible
• Random accessible, byte addressable
• Readable/writeable by FPGA user application
• Low power
• High write endurance (100K+ cycles)
• Long data retention
• Requires numerous I/O connections
• No JTAG interface
• Slower data transfer
• Not sold by Xilinx
– May require separate vendor qualification
• Not supported by Xilinx
– No low cost Xilinx programming hardware support for ISP
• No power-on, brown-out protection
Advantages Limitations
Spartan-3E Configuration Options Webcast
Choosing the Optimal Configuration
Solution for Spartan-3E
• Decide which factors are most important to you
• Review the advantages and limitations of each option
• Develop a comparison chart…
Spartan-3E Configuration Options Webcast
Example: Comparing
Platform Flash & SPI Flash
SPI Flash PROM
Absolute lowest unit cost COMPETITIVE!
Multi-sourced
Smallest form factor
Xilinx sold and supported Xilinx In-System Programming
Read/Write, random-access
Built-in power monitoring
Long-term supply security * Using JTAG and additional control logic in a CPLD, FPGA, or microcontroller
*
Spartan-3E Configuration Options Webcast
Agenda
• Introduction to the low-cost Spartan-3E FPGA family
• Low-cost configuration options with Spartan-3E FPGAs
• Choosing the optimal configuration solution for your system
• Configuration solutions using SPI and parallel flash memory
Spartan-3E Configuration Options Webcast
Spartan-3E & Platform Flash
Interface
• Simple interface
• Most configuration pins can
be re-used as general I/O
• Single memory can
configure multiple FPGAs
(daisy-chain)
Spartan-3E Configuration Options Webcast
Spartan-3E Configuration with
Commodity SPI Flash Memory
• SPI flash memory with direct FPGA-to-memory interface
– Uses standard, commodity SPI memory types
– Standard, easy-to-design 4-pin interface
– Only three dedicated configuration pins, all other configuration pins can be
re-used as general I/O
– Single memory can configure multiple FPGAs (daisy-chain)
Spartan-3E Configuration Options Webcast
How Many Bits are Required?
• SPI Flash PROMs are specified in bits
• Assumes no bitstream compression used (BitGen –g compress)
• Larger SPI Flash devices provide additional storage to user applications (MicroBlaze
code, ID codes, etc.)
Device Configuration
Bits (per) Smallest SPI Flash
Required Remaining
Space
XC3S100E 581,344 1,024Kb (1Mb) 456Kb
XC3S250E 1,353,728 2,048Kb (2Mb) 726Kb
XC3S500E 2,270,208 4,096Kb (4Mb) 1.83Mb
XC3S1200E 3,837,184 4,096Kb (4Mb) 348Kb
XC3S1600E 5,964,672 8,192Kb (8Mb) 2.31Mb
Spartan-3E Configuration Options Webcast
* pull-up resistor on CSO_B only required if HSWAP=1
(*)
Spartan-3E SPI Flash Interface
MOSI DIN
CSO_B
CCLK
D Q
S
C
M2
M1
M0
‘0’ ‘0’
‘1’
Spartan-3E FPGA
25-series SPI Flash PROM
SPI Flash Configuration Mode
VS2
VS1
VS0
?
?
?
SPI Flash Vendor Select
TDI
TDO
TMS TCK
Optional JTAG Programming
Interface
+3.3V
(MOSI)
(MISO)
(SS#)
(SCLK) HOLD
‘1’
HOLD must be ‘1’
HSWAP ‘0’
Spartan-3E Configuration Options Webcast
(*)
Spartan-3E SPI Daisy-Chain
MOSI DIN
CSO_B
CCLK
D Q
S
C
M2
M1
M0
‘0’ ‘0’
‘1’
VS2
VS1
VS0
Spartan-3E FPGA
SPI Flash PROM
?
?
?
SPI Flash Mode
Vendor Select
+3.3V
* pull-up resistor on CSO_B only required if HSWAP=1
M2
M1
M0
‘1’ ‘1’
‘1’
Spartan-3E FPGA
DOUT
CCLK
DIN
Slave Serial Mode
DOUT
INIT_B
PROG_B
DONE
INIT_B
PROG_B
DONE
2.5V 2.5V 3.3V
4.7K
Ω
330Ω
4.7K
Ω
HSWAP ‘0’
Spartan-3E Configuration Options Webcast
Spartan-3E Configuration with
Commodity Parallel Flash
• Parallel flash memory with direct FPGA-to-memory interface
– Uses standard, commodity parallel NOR flash memory types
– Standard, easy-to-design interface
– Few dedicated configuration pins, most configuration pins can be re-used
as general I/O
– Single memory can configure multiple FPGAs (daisy-chain)
Spartan-3E Configuration Options Webcast
How Many Bits are Required?
• Assumes no bitstream compression used (bitgen –g compress)
• Parallel Flash size is specified in bits, addressed as bytes
• FPGA drives 24 address lines but Flash PROM may have fewer
• Larger parallel Flash devices provide additional storage to user applications (MicroBlaze code, ID
codes, etc.)
Device Configuration
Bits (per) Smallest Flash
Required Minimum Address
Lines
XC3S100E 581,344 1,024Kb (1Mb) 17
XC3S250E 1,353,728 2,048Kb (2Mb) 18
XC3S500E 2,270,208 4,096Kb (4Mb) 19
XC3S1200E 3,837,184 4,096Kb (4Mb) 19
XC3S1600E 5,964,672 8,192Kb (8Mb) 20
Spartan-3E Configuration Options Webcast
Spartan-3E Byte-Wide
Peripheral (BPI) Interface
LDC0 LDC1
HDC
A[23:0]
CE# OE#
WE#
A[x:0]
M2
M1
M0
‘0’ ‘1’
‘?’
Spartan-3E FPGA
Parallel Flash PROM
Parallel Flash Configuration Mode
TDI
TDO
TMS TCK
Optional JTAG Programming
Interface
D[7:0] DQ[7:0]
LDC2
M0 Value 0 = Increment Addresses 1 = Decrement Addresses
User-I/O DQ[15:8]
BYTE#
Optional connections for
x16 Flash devices that
support x8 data RDWR_B ‘0’
CCLK
Active but not used in stand-alone applications
• Not supported in VQ100 package
HSWAP ‘0’
CSI_B ‘0’
CSO_B BUSY
Spartan-3E Configuration Options Webcast
Daisy-Chain Flash Interface
‘0’ ‘1’
‘?’
CE# OE#
WE#
A[x:0]
Flash Memory
DQ[7:0]
DQ[15:8]
BYTE#
LDC0 LDC1
HDC
A[23:0]
M2
M1
M0
BPI
INIT_B DONE
D[7:0]
User-I/O
LDC2
CCLK
CSO_B
M2
M1
M0
Slave Parallel
INIT_B DONE
D[7:0]
CCLK
CSI_B ‘0’
‘1’ ‘1’
‘0’
CSI_B CSO_B
CSI_B ‘0’ RDWR_B ‘0’
CSI_B ‘0’ RDWR_B ‘0’
Spartan-3E Configuration Options Webcast
Embedded MicroBlaze Processor
LDC0 LDC1
HDC
A[23:0]
CE# OE#
WE#
A[n:0]
M2
M1
M0
‘0’ ‘1’
‘1’
Spartan-3E FPGA
Parallel Flash Memory
TDI
TDO
TMS TCK
D[7:0] DQ[7:0]
BYTE# LDC2
CCLK
CSI_B ‘0’
FPGA
Configuration
Unused
DQ[15:8] User-I/O
MicroBlaze
Code
Flash Memory Map
User Data
0xFF_FFFF
FPGA configures from top of Flash, loads MicroBlaze processor design
1
D[15:8]
‘1’
2
Switch to x16 mode.
0x00_0000
MicroBlaze processor starts executing directly from Flash location 0.
3
RDWR_B ‘0’
Spartan-3E Configuration Options Webcast
Multi-Boot Mode Applications
• New mode based on customer requests
– Diagnostics then Operation configurations
– “Golden” vs “Enhanced” configurations
– Spartan-3E provides both solutions
• Any two mutually-exclusive FPGA designs
• Only supported with BPI Up or Down modes
• See alternative Platform Flash/CPLD solution
XAPP693: A CPLD-Based Configuration and Revision Manager for Xilinx
Platform Flash PROMs and FPGAs
Spartan-3E Configuration Options Webcast
Using MultiBoot with Embedded
MicroBlaze Processor (Boot)
LDC0 LDC1
HDC
A[20:0]
CE# OE#
WE#
A[20:0]
M2
M1
M0
‘0’ ‘1’
‘1’
XC3S1600E FPGA
32Mbit Flash Memory
TDI
TDO
TMS TCK
D[7:0] DQ[7:0]
User-I/O A[21]
BYTE# LDC2 HSWAP ‘0’
CCLK
CSI_B ‘0’
0x1F_FFFF
DQ[15:8] User-I/O
HSWAP=0 enables pull-up on A[21] address line during configuration. M0=1 boots from top of memory.
FPGA Config. #1
Unused
MicroBlaze
Code
Flash Memory Map
FPGA Config. #2
1 MB
1 MB
4 MB
‘1’
Spartan-3E Configuration Options Webcast
Using MultiBoot with Embedded
MicroBlaze Processor (MultiBoot)
LDC0 LDC1
HDC
A[20:0]
CE# OE#
WE#
A[20:0]
M2
M1
M0
‘0’ ‘1’
‘1’
XC3S1600E FPGA
32Mbit Flash Memory
TDI
TDO
TMS TCK
D[7:0] DQ[7:0]
User-I/O A[21]
BYTE# LDC2 HSWAP ‘0’
CCLK
CSI_B ‘0’
0x10_0000
0x1F_FFFF
DQ[15:8] User-I/O
FPGA Config. #1
Unused
MicroBlaze
Code
Flash Memory Map
FPGA Config. #2
1 MB
1 MB
4 MB
‘1’
HSWAP=0 enables pull-up on A[21] address line during configuration. MultiBoot jumps to opposite end of memory.
Spartan-3E Configuration Options Webcast
Using MultiBoot with Embedded
MicroBlaze Processor (User)
LDC0 LDC1
HDC
A[20:0]
CE# OE#
WE#
A[20:0]
M2
M1
M0
‘0’ ‘1’
‘1’
XC3S1600E FPGA
32Mbit Flash Memory
TDI
TDO
TMS TCK
D[7:0] DQ[7:0]
A21 A[21]
BYTE# LDC2 HSWAP ‘0’
CCLK
CSI_B ‘0’
0x00_0000
0x10_0000
0x1F_FFFF
DQ[15:8] D[15:8]
FPGA Config. #1
Unused
MicroBlaze
Code
Flash Memory Map
FPGA Config. #2
1 MB
1 MB
4 MB
‘0’ ‘1’
FPGA application drives A[21]=0, selecting bottom of memory. LDC2=0, selecting x16 mode. MicroBlaze codes starts executing at location 0.
Spartan-3E Configuration Options Webcast
Resources for the Next Step…
• Download Spartan-3E information at www.xilinx.com/spartan3e
– For Spartan-3E data sheet, click “Data Sheets” link under “Documentation”
– For Spartan-3E application notes, click “Application Notes and Reference
Designs” link under “Documentation”
• Download Platform Flash information at
www.xilinx.com/platformflash
• Purchase Prototype Devices – www.xilinx.com/store
• Purchase Hardware Kits - www.xilinx.com/xob
• Download & Purchase Design Tools - www.xilinx.com/ise
Spartan-3E Configuration Options Webcast
Spartan Low-Cost Starter Kits
Spartan-3E Starter Kit Features • Spartan-3E 500Kgate XC3S500E FPGA
• Multiple Memory Types – 32 Mbit Parallel Flash
– 8 Mbit SPI Flash
– 32MByte DDR SDRAM
• Expansion & I/O Interfaces – Ethernet 10/100 PHY
– USB 2.0 PHY+Controller
– 3-bit, 8-color VGA display port
– 9-pin RS-232 Serial Port, PS/2 port
• Design & Support Tools – Power Supply
– JTAG Programming Cable
– Evaluation software
– Reference Designs
$149 Spartan-3E Kit available Q4CY05
$99 Spartan-3 Kit available now