Serial Communication and the USART 8251 - HameroHa · 2020. 11. 26. · The Programmable 8251 USART The 8251A is a Universal Synchronous/ Asynchronous Receiver/Transmitter designed

Chapter : 5

Serial Communication and the

USART 8251

1

11-2

Introduction

Two ways of interfacing I/O devices(Mode of data

transfer )

Serial

Cheaper

Slower

Parallel

Faster

Limited to small distances

contd.

The primary difference between parallel I/O and serial I/O is the number of lines used for data transfer;

The parallel I/O uses the entire data bus i.e. In parallel mode – the entire word (e.g. 4-bit, 8-bit, 16-bit, etc.) is transferred at one time over the specified number of data lines(e.g. 4, 8, 16 lines etc.)

Example: printer, scanner etc…

Serial I/O uses one data line. i.e. In serial mode – data are transferred one bit at a time over a single line between the MP and a peripheral.

- commonly used serial devices are:

- CRT terminals

- cassette tapes

- modems for telephone lines, etc.

3

contd.

- In serial transmission, e.g. from 8085 MP to a

peripheral an 8-bit parallel word is converted

into a stream of eight serial bits, this is known as

parallel-to-serial conversion.

- After the conversion, one bit at a time is

transferred over single line at a given rate called

the baud (bits per second).

- In serial reception, the MP receives a stream of

8-bits after serial-to-parallel conversion.

4

contd.

5

contd.

Serial data transmissions classified as

1. Simplex

2. Half Duplex

3. Full Duplex

Simplex

The data are transmitted in only one direction.

There is no possibility of data transfer in the other direction.

Example: Transmission from a computer to the printer.

6

contd.

Half Duplex

The data are transmitted in both directions but not simultaneously.

This is used when two interconnected devices which ti interchange information alternately.

Example: The press to talk radio phones used in police cars employ the half-duplex standard; only one person can talk at a time.

7

Contd.

Full Duplex

The data are transmitted in both directions simultaneously.

This is used when data is to be exchanged between two

connected devices in both directions simultaneously.

Example: telephone

8

Contd.

The data in the serial communication may be sent in two formats:

1. Asynchronous

2. Synchronous

Synchronous Transmission :

In synchronous transmission a receiver and transmitter work in same speed and could be synchronized

Both will use a common clock and start at the same time as shown below.

used for high speed and bulk data transmition

9

contd.

Asynchronous transmission

The Asynchronous transmission is character-oriented.

Each character carries the information of the Start and Stop bits as shown below.

No need for sender and receiver synchronization

In asynchronous serial data transmission, each serial data stream(format) includes four parts:

a start bit (1 bit), several data bits (5, 6, 7, or 8 bits), a parity bit(1 bit), and stop bits(1, 1.5 or 2 bits).

Framing: The process of adding the start, parity, and stop bits with character bits is referred to as framing.

10

contd.

11

contd.

12

contd.

13

- When no data is sent the data line is at logic high. This is called the

waiting stage.

- The beginning of a data transmission is indicated by pulling the line

to the logic low state for 1 bit time. This is called start bit.

- The data bits are then sent out one bit after the other with the least

significant bit(LSB) sent first.

- Following the data bits comes the parity bit (0 for odd or 1 for

even) which is used to check transmission errors occurred during the

data transmission.

- The last bits are the stop bits, which pull the data line to the high

state for at least 1 bit time to indicate the end of the data

transmission (this can be 1, 1.5, or 2 bits).

- Mark and Space:

In serial communication, logic high is referred as „mark‟ and logic low

is referred as „space‟.

14

Data Transfer Rate

Both devices shall know the data transfer rate of the communication to synchronize the

internal clocks correctly.

Baud: is the speed of data transfer in serial communication, and represents the rate

at which the bits are transmitted, and is given as the number of bits transferred

per second, including start bit, data bits, parity bit and stop bit(s).

Communication channels are rated by baud rate. Commonly used baud rates are:

110, 300, 600, 1200, 2400, 4800, 9600, and 19,200 Bd.

Baud rate = 1

Bit time

Example: if bit time =3.33ms, determine the Bd.

Ans. Baud rate = 1 /(3.33ms) = 300Bd (300bits per second).

15

Serial I/O Standard: RS232

The Electronic Industry Association (EIA) developed a standard for serial

communication: RS232 ( or simply serial port).

In this standard two data lines were used:

- one to transmit data serially, and

- one to receive data serially.

A serial port must be capable of several important operations:

- it must convert parallel data from the PC system bus into a sequence of serial

bits, and add the appropriate framing bits, then provide each of these bits to the

data line at the proper rate.

- the serial port must also work in reverse - accepting serial data at a known

rate, stripping off the framing bits, converting the serial data bits back into bus

form, and

- checking blocks of data for accuracy.

16

The original serial port used is a 25-pin male sub-miniature D-type connector.

Newer ports have abandoned the extra handshaking signals to accommodate a 9-

pin male sub-miniature D-type connector.

Signals in serial communication can be grouped in to three types:

- data lines

- control (or handshaking) lines, and

- ground lines

+ + + + +

+ + + +

1 2 3 4 5

6 7 8 9

Fig. Standard RS232 interface housed in a 9-pin D-type male

17

RS232 port connector and connections

Pin Pin Name Direction (for PCs) Description

1 DCD (CD) i/p Data Carrier Detect

2 RD i/p Receive Data

3 TD o/p Transmit Data

4 DTR o/p Data Trminal Ready

5 GND

6 DSR i/p Data Set Ready

7 RTS o/p Request To Send

8 CTS i/p Clear To Send

9 RI i/p Ring Indicator

18

Several ways to send serial data:

- to use current to represent a 1 in the signal line and no current to

represent 0.

- for sending serial data over long distances, the standard

telephone system is a convenient path. But bandwidth of these lines

is from 300 to 3000Hz.

Thus, digital signals cannot be directly transferred over

standard phone lines .

Solution: to convert the digital signal to audio-frequency tones –

which are in the frequency range that the phone lines can transmit.

This is done by modem.

Modems and other equipment used to send serial data over long

distances are known as Data Communication Equipment(DCE).

The terminals and computers that are sending or receiving the serial

data are referred to as Data Terminal Equipment(DTE).

19

.

CD

IBM

P

C

TxD

RxD

CTS RTS

DSR DTR

Mo

dem

CD

Mo

dem

TxD

RxD

CTS RTS

DSR DTR

Larg

e T

ime-s

hare

Com

pu

ter

Telephone Line

DTE DCE DCE DTE

Fig. Digital data transmission using modems and standard phone lines

Fig. RS232 connection and serial data transmission with NULL modem.

a. Using most signals, b. using three lines

IBM

PC

TD

RD

CTS

RTS

DSR

DTR

GND

Exte

rna

l D

evic

e TD

RD

CTS

RTS

DSR

DTR

GND

a. DTE DTE

IBM

PC

TD

RD

CTS

RTS

DSR

DTR

GND

Exte

rna

l D

evic

e TD

RD

CTS

RTS

DSR

DTR

GND

b. DTE DTE

20

contd.

21

The Programmable 8251 USART

The 8251A is a Universal Synchronous/

Asynchronous Receiver/Transmitter designed for a wide range of Intel microcomputers such as 8080, 8085, 8086 and 8088.

The 8251A is a programmable chip designed for synchronous and asynchronous serial data communication.

It converts parallel data from the MP to serial format for transmission and converts incoming serial data to parallel for i/p to the MP.

22

Features of 8251A - USART

1. It is an universal synchronous and a

synchronous communication controller.

2. It supports standard asynchronous protocol

with

a. 5 to 8 bit character format

b. Odd ,even or no parity generation and

detection.

23

contd. Features of 8251A - USART

3. It has built-in Baud rate generator

4. It allows full duplex transmission

5. It provides error detection logic, which detects

parity, over run and framing errors.

6. It has 28 pins; DIP package is available.

24

Functional Block Diagram and pin Diagram of 8251A

Fig. Pin Diagram

Fig. Block Diagram Receiver section

Transmitter section

25

contd.

26

contd.

The block diagram of 8251A has five sections:

1. Read/Write control section

2. Transmitter section

3. Receiver section

4. Data bus buffer

5. Modem control

27

The Read/Write control logic

The Read/Write control logic determines the

functions of the chip according to the control

word in its register and monitors the data flow.

Interfaces the chip with the CPU, determines the

functions of the chip according to the control

word in its register, and monitors the data flow.

28

The Read/Write control logic:

Fig. Expanded block diagram of control logic and registers

Data Bus

buffer

Control

Register

16-bits

Status

Register

8-bits

Read/Write

Control Logic

RESET CLK

CS

C/ D

WR

RD

A0

D7-D0

C/ D =1

WR=0

C/ D =1

RD=0

C/ D =0 WR or RD

Transmitter

Receiver

Inte

rnal da

ta b

us

Control register: It is 16-bit register for a control word and consists of two independent bytes:

- the first byte is for mode word, and - the second byte is for command word.

Status register: Holds the operating status of 8251A. It is 8-bit size.

29

contd.

30

Data Bus Buffer.

This is a tri-state bi-directional, 8- bit buffer used to

interface 8251A to the system data bus,

Data is either transmitted or received by the buffer using IN or OUT instructions of the CPU.

Control words, Command words and status information are also transferred through the Data bus buffer.

31

Modem control

The 8251A has a set of control inputs and

outputs that can be used to simplify the interface

to any modem.

used to establish data communication through

modems over telephone lines

The Modem control signals are general purpose

in nature and can be used for functions other

than Modem control if necessary

32

contd. Modem control

DTR and DSR : handshake signals – established

only once when the DTE and DCE devices are first established.

- DTR (Data Terminal Ready) –it is asserted when the DTE is turned on or initialized and ready to begin serial operation. - This tells the DCE (i.e., modem) that the DTE (i.e., computer) is ready to establish a connection.

- Then, the DCE asserts the DSR (Data Set Ready) line back to the DTE.

- Then, when the DTE recognizes the DSR signal, a connection is established.

33

contd. Modem control

RTS and CTS : handshake signals – forms the basis for data flow control.

- RTS (Request To Send) signal is generated by the DTE, when asserted,

it tells the DCE (i.e., the modem) to expect to receive data.

- the DCE asserts CTS(Clear To Send), and

- after the DTE receives a valid CTS signal, it can begin transferring

data through TxD line.

DCD (Data Carrier Detect) signal – useful with modems. It is produced by

the DCE when a carrier is detected from a remote target, and the DCE is

ready to establish a communication path way. The DCD signal is then sent

back to the DTE.

RI (Ring Indicator) signal is asserted by the DCE – useful with modems. It is

asserted when a telephone ring is detected.

34

The Transmitter and Receiver sections:

Fig. Expanded block diagram of Transmitter and Receiver Sections

Data Bus

buffer D7-D0

Inte

rnal da

ta b

us

Transmitter

Buffer

Register

Output Register

Transmitter

Control Logic

Receiver Buffer

Register

Input register

Receiver Control

Logic

RxD

TxD

RxC

RxRDY

TxC

TxRDY

TxE

SYNDET/BD

35

Transmitter section

The transmitter accepts parallel data from the MPU

and converts them into serial data.

It has two registers:

- a buffer register to hold eight bits, and

- an output register to convert eight bits into a stream of serial bits.

The MPU writes a byte in the buffer in the buffer register; whenever the output register is empty, the contents of the buffer register are transferred to the output register.

This section transmits data on the TxD pin with the appropriate framing bits (start and stop).

36

contd.Transmitter section

TxD - Transmit Data: serial bits are transmitted on this line.

TxC - Transmitter Clock: input signal that controls the rate at which bits are

transmitted by the USART.

- the clock frequency can be 1, 16, or 64 times the baud. i.e., TxC=BFxBd.

TxRDY - Transmitter Ready: an o/p signal, when it is high it indicates that the

buffer register is empty and the USART is ready to accept a byte from the CPU.

- it can be used either to interrupt the MPU or to indicate the status.

- this signal is reset when a data byte is loaded into the buffer.

TxE - Transmitter Empty: an o/p signal- logic 1 on this line indicates that the o/p

register is empty.

- this signal is reset when a byte is transferred from the buffer to the output

register.

This pin is used in half-duplex mode.

37

Receiver section:

The receiver accepts serial data on the RxD line from a

peripheral and converts them into parallel data. - This section has two registers:

- the receiver input register, and - the buffer register to hold the received byte.

RxD - Receive Data: when the RxD line goes low, the control logic assumes it is a start bit, waits for half a bit time, and samples the line again.

- if the line is still low, the input register accepts the following bits, forms a character, and loads it into the buffer register.

subsequently, the parallel byte is transferred to the MPU when requested.

38

Contd.Receiver section:

RxC - Receiver Clock: this is a clock signal that controls the rate at which

bits are received by the USART. - in the asynchronous mode,

the clock can be set to 1, 16, 64 times the baud. i.e., RxC=BFxBd.

RxRDY - Receiver Ready – O/p signal that goes high when the USART

has a character in the buffer register and is ready to transfer it to the

MPU.

- This line can be used either to indicate the status or to interrupt the

MPU.

SYNDET/BD :- Sync Detect/ Break Detect – has two functions.

- In a sync mode (input output).

- In Async mode (output)- this line will go high whenever the receiver

remains low through two consecutive stop bit sequences(including the

start bits, data bits, and parity bits).

39

contd.

40

Programming (Initialization) the

8251:

To communicate with 8251A, the CPU has to inform the details

about mode ,baud rate, stop bits, parity bit etc., to USART.

This is done by a set of control words.

The CPU must check the status( ready) of the peripheral by reading the status register.

The control words in the control register are divided into two formats:

- mode word – specifies the general characteristics of operation (such as

baud, parity, number of stop bits, character length, etc.).

- command word – enables data transmission and/or reception

41

contd.

- To implement serial communication, the MPU must inform the 8251A of all

details, such as mode, baud, stop bit, parity, etc.

Thus, prior to data transfer, a set of control words must be loaded into the 16-

bit control register of the 8251A.

- The 8251A should be reset prior to writing a new mode word - and it

can be reset by system RESET using Internal Reset bit (D6) in the command

word.

- then, a mode word must be written in the control register, followed by

- a command word written in the control register. Any control word written

into the control register immediately after a mode word will be interpreted

as a command word; that means a command word can be changed

anytime during the operation.

- In addition, the MP must check the readiness of a peripheral by reading the

status register, if it is configured in a polled mode.

The status word provides the information concerning register status and

transmission errors.

42

Mode word format:

Mode instruction is used for setting the function of the 8251.

Mode instruction will be in "wait for write" at either internal reset or external reset. That is, the writing of a control word after resetting will be recognized as a "mode instruction.“

Items set by mode instruction are as follows:

Synchronous/asynchronous mode

Stop bit length (asynchronous mode)

Character length

Parity bit

Baud rate factor (asynchronous mode)

Internal/external synchronization (synchronous mode)

Number of synchronous characters (Synchronous mode)

43

Mode word format:

In the case of synchronous mode, it is necessary to write one-or two byte sync characters. If sync characters were written, a function will be set because the writing of sync characters constitutes part of mode instruction.

44

contd.

45

contd.

46

Command Word

Command is used for setting the operation of the 8251.

To initialize the 8251A in the Asynchronous mode, the Command Word is written immediately after the mode word.

47

Status Word

It is possible to see the internal status of the 8251

by reading a status word.

During the Data Communication ,8251A issues the

status of Transmitter, Receiver and Error

Occurrence. The 8251A allows the programmer to

read the information from the status register at

any time during the functional operation.

48

contd.

49

Example

Write an assembly language program to initialize

8251A at address F F H for the following specifications.

i. Character length- 6 bits

ii. Parity even

iii. Baud rate 64 x

iv. Stop bit 1

v. DTR and RTS asserted

vi. Error flag reset

vii. Transmitter enable

50

Solution

This example has the details about stop bit and baud rate.

Therefore it is necessary to initialize 8251A in the

Asynchronous mode.

51

Solution

.

52

Solution

.

53

Exercise

Specify the initialization instructions and status word to

transmit 7-bit ASCII characters with following

parameters.

TXC=153.6 KHZ

Asynchronous mode with 9600 baund

No parity check

2 stop bits

Write instructions to initialize 8251, read status and

set up a loop until TXC is ready.

54

Connect a RS 232 port onto a CRT terminal

Address the 8251A USART at FF to control transmission

Specify initialization instructions and status word to transmit characters

Async mode with 9600 buad

Character length= 7 bit + 2 stop bit

No parity check

Write instruction to initialize USART and read status word and Setup a loop until the transmitter is ready

55

2

3

7

2

3

7

Transmit

Receive

8251A

TxD

RxD

RxCb

TxCb

CLK CTSb

GND

8085

MPU

D7

D0

CSb

C/Db

A7

A1

A0 Voltage

Converter IORb

IOWb

Reset Out

CLK Out

RDb

WRb

RESET

CLK

D7

D0

Control & Status

Register Address=FFH

C/Db line should be

high, == > A0 =1

56

contd.

.

57

D7 D6 D5 D4 D3 D2 D1 D0

1 1 0 0 1 0 1 0

Two Stop bits No parity 7 bit characters Baud=TxC/16

=153.6k/16

=9600

D7 D6 D5 D4 D3 D2 D1 D0

X 0 X 1 X 0 X 1

ERR

Reset

Receive

Disable

Transmit

Enable

Mode

Word

COMMAND

WORD

STATUS

CAH

11H

D7 D6 D5 D4 D3 D2 D1 D0

X X X X X X X 1

Transmit

Ready

01H

58

SETUP: MVI A,CAH ; load mode word

OUT FFH ;Write mode word in control register

MVI A,11H ; load command word to enable TX

OUT FFH ;Enable the transmitter

STATUS: IN FFH ; Read the status register

ANI 01H ; Mask all bit except D0

JZ STATUS ; if D0=0 the TX buffer if full

59

Message is “HELLO CS421” 2070 0B ; 11 characters to follow

2071 48; Letter H

2072 45; Letter E

2073 4C; Letter L

2074 4C ; Letter L

2075 4F ; Letter O

2076 20; space

2077 43; Letter C

2078 53; Letter S

2079 34; Digit 4

2080 32;Digit 2

2081 31; Digit 1

60

LXI H 2070H ; Memory ptr for Message

MOV C, M ; Set up Ctr register

MVI A,40; Reset 8251

OUT FFH

MVI A,CA; Initialize 82512

OUT FFH

MVI A,11 ; initialize for transmit

OUT FFH

STATUS: IN FFH

ANI 01H ;Ckeck TxRDY

JZ STATUS ; is txRDY 1 ? If not wait

INX H ; Pont to Next Char

MOV A,M ; place the Char in ACC

OUT FEH ; Send the Char to Transmitter

DCR C ; DCr cnt

JNZ STATUS ;Again Send the rest of Char

HLT

61

contd.

.

62