May 24, 2015
Satisfiability:Applications and Algorithms
Outline
• Boolean functions and expressions
• Applications and related formalisms
• Satisfiability Algorithms– Expression-Based– Assignment-Based
Boolean Functions
• Bit vector• Corners of n-
dimensional cube• Base-2 coded integer
• True/false• In/out of set• Pass/fail
1,01,0 n
Truth Table
• Read-only memory is like this: – Addr_in -> data_out– 16 address bits enough to
store a book– No way, in general, to
squeeze n bit values into any smaller space
0111
1011
0101
0001
0110
1010
1100
1000
a b c
Composing Functions
a
b
b
c
cbba
Logic Optimization
• Very difficult to find optimal expression for a given Boolean function– Gate count– Longest path from input to output
• Any function has infinite expressions
• Most functions require exponential space– Counting argument: Boolean functions
with n variables
n22
2-Level Expressions
• DNF: Disjunctive Normal Form
• CNF: Conjunctive Normal Form
01
00
cbbacbba
cb
bacbba
Decision Tree
a
b b
c c c c
1 1 1 0 0 0 1 0
0
0
0 0
0
0 0
1
1 1
1 1 1 1
Pruning Unnecessary Nodes
a
b b
c c1
1 0
0
1 0
0
0
0
0
0
1
1 1
1 1
Reusing Duplicate Nodes
a
b b
c1
1 0
0
0
0
0
0
1
1 1
1
Tree becomes Diagram, or BDD
Binary Decision Diagrams
• Breakthrough paper
Randy Bryant,Graph-Based Algorithms for Boolean Function Manipulation. IEEE Transaction on Computers, 1986
http://vlsi.colorado.edu/~fabio/CUDD/
• High quality public package
BDD Manipulation
• BDDs are canonical, given variable order– Trivial to check function equality, satisfiability
• Often compact– Optimizing variable order is difficult
• Interleave bits of an adder!
• BDD for (f&g) can be computed efficiently, from BDD for f and BDD for g
Formalized Decisions
• Boolean Functions– Set of fixed length strings
• State Machines– Regular languages
• Turing Machines– Universal computability
Computational Problems• Optimizing expressions
– Language in which machine expressed– Optimality criteria
• Language Emptiness– Boolean Functions
• NP-Complete
– Finite State Machines• P-Space Complete
– Turing Machines• Undecidable
Applications for Satisfiability
• Given a Boolean function, find an input bit vector for which the function evaluates to 1– Artificial Intelligence
• E.g. medical diagnosis
– Operations Research• Optimizing over discrete domains
– Electronics Engineering• Detecting faults
– Computer Science• Check resource contention
Bounded Emptiness
• Convert infinite set to finite set– Bound length of string– Discretize space
• Use SAT to attack harder problems– E.g. Bounded Model Checking
Satisfiability Community
• International Conference onTheory and Applications of Satisfiability Testing– http://ie.technion.ac.il/SAT10/ (Edinburgh)
• Journal on Satisfiability, Boolean Modeling and Computation – http://www.isa.ewi.tudelft.nl/Jsat/
• Up-to-date links concerning research – http://www.satlive.org/
Dimacs Formatp cnf 59056 3237001 2 01 3 01 4 01 -5 01 6 01 -7 01 -8 01 -9 01 -10 0-2 -3 -4 5 -6 7 8 9 10 -1 0-11 -12 -13 14 0-14 11 0-14 12 0-14 13 0
Random CNF
P(Sat)
1
0
# Clauses / # Variables
10 2 3 4 5 6 7
Limit for large #V
Small #V
Algorithms
• CNF Resolution
• BDD variable elimination
• Local Search
• Circuit-based value assignment
• Conflict-based Learning
Resolution
• Exhaustive application will yield empty clause if problem is unsatisfiable– 3n potential clauses!
aa
cbcbacba
ecbdcba
edbaecbdcba
BDD Variable Elimination
• Construction of BDD from circuit often infeasible– Intermediate blow-up even if ultimate answer is trivial
• Interleave existential quantification– Eliminating variables often reduces BDD sizes– Finding an order of variables to eliminate is difficult
• Keep the support sizes small of intermediate results• Equivalent to elimination with sparse matrices
cbgcbafabcbgbafcba ,.,..,,.
10 |,|,,. aa bafbafbafa
Local Search
• Generally implemented with CNF• Start by assigning arbitrary value to each
variable• Flip values of variables one by one
– Any variable that appears in a false clause is a candidate
• Gradually reduce number of false clauses• Need mechanism to escape local minima• No proof of unsatisfiability
Stuck-at Fault Model
1
Circuit as designed
Circuit as manufactured
Test generation: find a input bit vector thatwill produce different outputs in correct versus faulty circuits
Circuit-Based SAT
1
Can we findinput assignments todrive the circuit outputto 1?
Circuit-Based SAT
1
1
1
Inputs to AND mustbe 1 for output to be 1
Circuit-Based SAT
1
1
1
0
At least one input of NANDmust be 0 for output to be 1,so we make a choice.
Circuit-Based SAT
1
1
1
1
0
1
Inputs to NAND must be 1for output to be 0
Circuit-Based SAT
1
1
1
1
0
1
1
1
Inputs to AND must be 1 for output to be 1
Circuit-Based SAT
1
1
1
1
0
1
1
1
Conflict! need to backtrack andmake different choices
Loosely Coupled Subproblems
• Subproblems revisited many times• Need to save and reuse learning• CNF is simple & incremental
…
ABCDE
UVW
Landmark Papers in CNF SAT
• Joao Marques-Silva and Karem Sakallah, “GRASP: A Search Algorithm for Propositional Satisfiability,” ICCAD 1996
• Matthew W. Moskewicz, Conor F. Madigan, Ying Zhao, Lintao Zhang, Sharad Malik, “Chaff: Engineering an Efficient SAT Solver,” DAC 2001
CNF Decision & Implication
1aDecide: iga
hgb
fe
eba
dca
ba
CNF Decision & Implication
1
1
b
aDecide:
Imply:
iga
hgb
fe
eba
dca
ba
CNF Decision & Implication
0
1
1
e
b
aDecide:
Imply:
Imply:
iga
hgb
fe
eba
dca
ba
CNF Decision & Implication
1
0
1
1
f
e
b
aDecide:
Imply:
Imply:
Imply:
iga
hgb
fe
eba
dca
ba
CNF Decision & Implication
0
1
0
1
1
g
f
e
b
aDecide:
Imply:
Imply:
Imply:
Decide:
iga
hgb
fe
eba
dca
ba
CNF Decision & Implication
1
0
1
0
1
1
h
g
f
e
b
aDecide:
Imply:
Imply:
Imply:
Decide:
Imply:
iga
hgb
fe
eba
dca
ba
Implication Graph
iga
hgb
fe
eba
dca
ba
Chains of implication linked by pairs of clauses with common variable but opposite signs:opportunities for resolution
Learned Clauses
Cut in implication graphcorresponds to learned clausederivable by resolution
Look for small cuts – short clauses are tighter constraints
Leveraging Structure
• SAT is very hard in the worst case
• But practical instances often manageable– Test Generation, Equivalence Checking
• similarity of two halves of problem
– Bounded Model Checking• Repetitive structure
– Arithmetic • Bit order