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AFT18S290−13SR3
1RF Device DataFreescale Semiconductor, Inc.
RF Power LDMOS TransistorN−Channel Enhancement−Mode Lateral MOSFET
This 63 watt RF power LDMOS transistor is designed for cellular base stationapplications covering the frequency range of 1805 to 1995 MHz.
• Typical Single−Carrier W−CDMA Performance: VDD = 28 Volts, IDQ = 2000 mA, Pout = 63 Watts Avg., Input Signal PAR = 9.9 dB @ 0.01%Probability on CCDF.
IDQ = 2000 mA, Pout = 63 Watts Avg., Input Signal PAR = 9.9 dB @ 0.01%Probability on CCDF.
FrequencyGps(dB)
�D(%)
Output PAR(dB)
ACPR(dBc)
IRL(dB)
1805 MHz 18.0 33.3 7.1 −35.0 −13
1840 MHz 18.2 32.7 7.1 −35.0 −16
1880 MHz 18.3 32.6 7.1 −34.0 −13
Features
• Greater Negative Gate−Source Voltage Range for Improved Class COperation
• Designed for Digital Predistortion Error Correction Systems• Optimized for Doherty Applications• In Tape and Reel. R3 Suffix = 250 Units, 44 mm Tape Width, 13−inch Reel.
Document Number: AFT18S290−13SRev. 0, 5/2013
Freescale SemiconductorTechnical Data
1805−1995 MHz, 63 W AVG., 28 V
AFT18S290−13SR3
Figure 1. Pin Connections
NI−880XS−2L4S
(Top View)
RFin/VGS
VBW�(1)N.C.
VBW�(1)
1 6
3 4
2 5
N.C.
RFout/VDS
1. Device cannot operate with the VDD currentsupplied through pin 4 and pin 6.
Gate Threshold Voltage(VDS = 10 Vdc, ID = 389 μAdc)
VGS(th) 1.5 2.0 2.5 Vdc
Gate Quiescent Voltage(VDD = 28 Vdc, ID = 2000 mAdc, Measured in Functional Test)
VGS(Q) 2.3 2.8 3.3 Vdc
Drain−Source On−Voltage(VGS = 10 Vdc, ID = 5.0 Adc)
VDS(on) 0.1 0.2 0.3 Vdc
1. Continuous use at maximum temperature will affect MTTF. 2. MTTF calculator available at http://www.freescale.com/rf. Select Software & Tools/Development Tools/Calculators to access MTTF
calculators by product. 3. Refer to AN1955, Thermal Measurement Methodology of RF Power Amplifiers. Go to http://www.freescale.com/rf. Select
Functional Tests (1) (In Freescale Test Fixture, 50 ohm system) VDD = 28 Vdc, IDQ = 2000 mA, Pout = 63 W Avg., f = 1960 MHz,Single−Carrier W−CDMA, IQ Magnitude Clipping, Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF. ACPR measured in 3.84 MHzChannel Bandwidth @ ±5 MHz Offset.
Power Gain Gps 17.2 18.2 20.2 dB
Drain Efficiency ηD 29.5 31.2 — %
Output Peak−to−Average Ratio @ 0.01% Probability on CCDF PAR 6.6 7.1 — dB
Adjacent Channel Power Ratio ACPR — −35.0 −34.0 dBc
Input Return Loss IRL — −19 −6 dB
Load Mismatch (In Freescale Test Fixture, 50 ohm system) IDQ = 2000 mA, f = 1960 MHz
VSWR 10:1 at 32 Vdc, 363 W CW (2) Output Power(3 dB Input Overdrive from 263 W CW (2) Rated Power)
No Device Degradation
Typical Performance (In Freescale Test Fixture, 50 ohm system) VDD = 28 Vdc, IDQ = 2000 mA, 1930−1995 MHz Bandwidth
Pout @ 1 dB Compression Point, CW P1dB — 263 (2) — W
AM/PM(Maximum value measured at the P3dB compression point acrossthe 1930−1995 MHz bandwidth)
Φ — 15 — °
VBW Resonance Point(IMD Third Order Intermodulation Inflection Point)
VBWres — 85 — MHz
Gain Flatness in 65 MHz Bandwidth @ Pout = 63 W Avg. GF — 0.2 — dB
Gain Variation over Temperature(−30°C to +85°C)
ΔG — 0.01 — dB/°C
Output Power Variation over Temperature(−30°C to +85°C) (2)
ΔP1dB — 0.003 — dB/°C
1. Part internally matched both on input and output. 2. Exceeds recommended operating conditions. See CW operation data in Maximum Ratings table.
4RF Device Data
Freescale Semiconductor, Inc.
AFT18S290−13SR3
Figure 2. AFT18S290−13SR3 Test Circuit Component Layout — 1930−1995 MHz
C1*
C2*
C4* C5*
C6*
C7
C8
C9*C10*
C11* C12* C13*
C14
C15
C16
C17
C18
C21
C19C20
C22C23
C24
C25
AFT18S290-13SRev. 0
CU
T O
UT
AREA
R1
R2
C3*
*C1, C2, C3, C4, C5, C6, C9, C10, C11, C12 and C13 are mounted vertically.
VGG
VGG
VDD
VDD
Table 5. AFT18S290−13SR3 Test Circuit Component Designations and Values — 1930−1995 MHz
(1) Load impedance for optimum P1dB power.(2) Load impedance for optimum P3dB power.Zsource = Measured impedance presented to the input of the device at the package reference plane.Zin = Impedance as measured from gate contact to ground.Zload = Measured impedance presented to the output of the device at the package reference plane.
Figure 8. Load Pull Performance — Maximum Power Tuning
(1) Load impedance for optimum P1dB efficiency.(2) Load impedance for optimum P3dB efficiency.Zsource = Measured impedance presented to the input of the device at the package reference plane.Zin = Impedance as measured from gate contact to ground.Zload = Measured impedance presented to the output of the device at the package reference plane.
Figure 9. Load Pull Performance — Maximum Drain Efficiency Tuning
Input Load PullTuner and TestCircuit
DeviceUnderTest
Zsource Zin Zload
Output Load PullTuner and TestCircuit
8RF Device Data
Freescale Semiconductor, Inc.
AFT18S290−13SR3
P1dB − TYPICAL LOAD PULL CONTOURS — 1960 MHz
-4
-1.5
-2.5
-3
-3.5
-2
1 1.5 2 2.5 30.5 3.5
-1
-0.5
-4
-1.5
-2.5
-3
-3.5
-2
1 1.5 2 2.5 30.5 3.5
-1
-0.5
Figure 10. P1dB Load Pull Output Power Contours (dBm)
-4
-1.5
REAL (Ω)
-2.5
-3
-3.5
IMAG
INAR
Y (Ω
)
-2
1 1.5 2 2.5 30.5 3.5
Figure 11. P1dB Load Pull Efficiency Contours (%)
REAL (Ω)
IMAG
INAR
Y (Ω
)
Figure 12. P1dB Load Pull Gain Contours (dB)
REAL (Ω)
IMAG
INAR
Y (Ω
)
Figure 13. P1dB Load Pull AM/PM Contours (�)
REAL (Ω)
IMAG
INAR
Y (Ω
)
NOTE: = Maximum Output Power
= Maximum Drain Efficiency
P
E
Power Gain
Drain Efficiency
Linearity
Output Power
-1
-0.551.5
51 52
53
54
55
52.5
53.5
54.5
P
E
54
-4
-1.5
-2.5
-3
-3.5
-2
1 1.5 2 2.5 30.5 3.5
-1
-0.5
545250
48
5658
60
62
64
P
E
19.5
18
18.5
20.5
17.5
16.5
17
19
20
P
E
-18
-20
-22
-24 -16
-14
-12
-10P
E
-8
AFT18S290−13SR3
9RF Device DataFreescale Semiconductor, Inc.
P3dB − TYPICAL LOAD PULL CONTOURS — 1960 MHz
IMAG
INAR
Y (Ω
)
IMAG
INAR
Y (Ω
)
NOTE: = Maximum Output Power
= Maximum Drain Efficiency
P
E
Power Gain
Drain Efficiency
Linearity
Output Power
-4
-1.5
-2.5
-3
-3.5
-2
1 1.5 2 2.5 30.5 3.5
-1
-0.5
-4
-1.5
-2.5
-3
-3.5
-2
15.5
1 1.5 2 2.5 30.5 3.5
18
18.5
14.5
17.5
-1
-0.5
16.5
17
16
15
P
E
P
E
-18-20-22-24
-16
-14
-12
-26-28
P
E
Figure 14. P3dB Load Pull Output Power Contours (dBm)
REAL (Ω)
IMAG
INAR
Y (Ω
)
-4
-1.5
-2.5
-3
-3.5
-2
1 1.5 2 2.5 30.5 3.5
-1
-0.5 52.5
5253
54
56
53.5
54.5
55.555
55P
E
-4
-1.5
-2.5
-3
-3.5
-2
1 1.5 2 2.5 30.5 3.5
-1
-0.5
Figure 15. P3dB Load Pull Efficiency Contours (%)
REAL (Ω)
IMAG
INAR
Y (Ω
)
545250
66
56
5860
62
64
Figure 16. P3dB Load Pull Gain Contours (dB)
REAL (Ω)
Figure 17. P3dB Load Pull AM/PM Contours (�)
REAL (Ω)
10RF Device Data
Freescale Semiconductor, Inc.
AFT18S290−13SR3
ALTERNATIVE CHARACTERIZATION — 1805−1880 MHz
Figure 18. AFT18S290−13SR3 Test Circuit Component Layout — 1805−1880 MHz
C1
C2
C4* C5*
C6
C7
C8
C9 R2
R1
C3*
C10*
C11*
C12*C13*
C14*
C15*
C16
C17
C18
C19
C20
C21
C23
C22
AFT18S290-13SRev. 0
CU
T O
UT
AREA
*C3, C4, C5, C10, C11, C12, C13, C14 and C15 are mounted vertically.
VGG
VGG
VDD
VDD
1805-1880 MHz
Table 6. AFT18S290−13SR3 Test Circuit Component Designations and Values — 1805−1880 MHz
(1) Load impedance for optimum P1dB power.(2) Load impedance for optimum P3dB power.Zsource = Measured impedance presented to the input of the device at the package reference plane.Zin = Impedance as measured from gate contact to ground.Zload = Measured impedance presented to the output of the device at the package reference plane.
Figure 22. Load Pull Performance — Maximum Power Tuning
(1) Load impedance for optimum P1dB efficiency.(2) Load impedance for optimum P3dB efficiency.Zsource = Measured impedance presented to the input of the device at the package reference plane.Zin = Impedance as measured from gate contact to ground.Zload = Measured impedance presented to the output of the device at the package reference plane.
Figure 23. Load Pull Performance — Maximum Drain Efficiency Tuning
Input Load PullTuner and TestCircuit
DeviceUnderTest
Zsource Zin Zload
Output Load PullTuner and TestCircuit
AFT18S290−13SR3
13RF Device DataFreescale Semiconductor, Inc.
P1dB − TYPICAL LOAD PULL CONTOURS — 1840 MHz
-4
-1.5
-2.5
-3
-3.5
-2
1 1.5 2 2.5 30.5 3.5
-1
-0.5
-4
-1.5
-2.5
-3
-3.5
-2
1 1.5 2 2.5 30.5 3.5
-1
-0.5
IMAG
INAR
Y (Ω
)
IMAG
INAR
Y (Ω
)
NOTE: = Maximum Output Power
= Maximum Drain Efficiency
P
E
Power Gain
Drain Efficiency
Linearity
Output Power
P
E
19.5
1818.5
20.5
17.516.5 17
19
20
P
E -16
-14
-12
-10
P
E
-18
-20
Figure 24. P1dB Load Pull Output Power Contours (dBm)
-4
-1.5
REAL (Ω)
-2.5
-3
-3.5
IMAG
INAR
Y (Ω
)
-2
1 1.5 2 2.5 30.5 3.5
-1
-0.5
P
E
51.5
5253
54
55
52.553.5
54.5
52
51 51.5
-4
-1.5
-2.5
-3
-3.5
-2
1 1.5 2 2.5 30.5 3.5
-1
-0.5
Figure 25. P1dB Load Pull Efficiency Contours (%)
REAL (Ω)
IMAG
INAR
Y (Ω
)
5452504856
58
60
62
64
Figure 26. P1dB Load Pull Gain Contours (dB)
REAL (Ω)
Figure 27. P1dB Load Pull AM/PM Contours (�)
REAL (Ω)
14RF Device Data
Freescale Semiconductor, Inc.
AFT18S290−13SR3
P3dB − TYPICAL LOAD PULL CONTOURS — 1840 MHzIM
AGIN
ARY
(Ω)
IMAG
INAR
Y (Ω
)
NOTE: = Maximum Output Power
= Maximum Drain Efficiency
P
E
Power Gain
Drain Efficiency
Linearity
Output Power
-4
-1.5
-2.5
-3
-3.5
-2
1 1.5 2 2.5 30.5 3.5
-1
-0.5
-4
-1.5
-2.5
-3
-3.5
-2
1 1.5 2 2.5 30.5 3.5
-1
-0.5
15.5
18
18.5
14.5
17.5
16.5
17
16
15
-18
-20
-22-24
-16
-14-12
-26-28
P
E
P
E
Figure 28. P3dB Load Pull Output Power Contours (dBm)
REAL (Ω)
IMAG
INAR
Y (Ω
)
-4
-1.5
-2.5
-3
-3.5
-2
1 1.5 2 2.5 30.5 3.5
-1
-0.5
P
E
54.5
55
54
53.5
52.553
56
55.5
52.552
-4
-1.5
-2.5
-3
-3.5
-2
1 1.5 2 2.5 30.5 3.5
-1
-0.5
Figure 29. P3dB Load Pull Efficiency Contours (%)
REAL (Ω)
IMAG
INAR
Y (Ω
)
545250
66
5658
60
62
64P
E
Figure 30. P3dB Load Pull Gain Contours (dB)
REAL (Ω)
Figure 31. P3dB Load Pull AM/PM Contours (�)
REAL (Ω)
AFT18S290−13SR3
15RF Device DataFreescale Semiconductor, Inc.
PACKAGE DIMENSIONS
16RF Device Data
Freescale Semiconductor, Inc.
AFT18S290−13SR3
AFT18S290−13SR3
17RF Device DataFreescale Semiconductor, Inc.
PRODUCT DOCUMENTATION, SOFTWARE AND TOOLS
Refer to the following documents, software and tools to aid your design process.
Application Notes• AN1955: Thermal Measurement Methodology of RF Power Amplifiers
Engineering Bulletins• EB212: Using Data Sheet Impedances for RF LDMOS Devices
Software• Electromigration MTTF Calculator
• RF High Power Model
• .s2p File
Development Tools• Printed Circuit Boards
For Software and Tools, do a Part Number search at http://www.freescale.com, and select the “Part Number” link. Go to theSoftware & Tools tab on the part’s Product Summary page to download the respective tool.
REVISION HISTORY
The following table summarizes revisions to this document.
Revision Date Description
0 May 2013 • Initial Release of Data Sheet
18RF Device Data
Freescale Semiconductor, Inc.
AFT18S290−13SR3
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