DANIEL E. FAGUE Manager, High Speed DAC Applications RF Converters Enable Multiple Wideband Applications 1 02/15/2017
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DANIEL E. FAGUE
Manager, High Speed DAC Applications
RF Converters Enable Multiple
Wideband Applications
102/15/2017
Agenda
2
►Review of Radio Architectures
►Applications for RF DACs
►An Example RF Converter
►Usage scenarios for RF DACs
Transmitter Architectures with IF and RF DACs
3
Complex IF Transmitter Signal Processing
► A complex IF architecture uses DACs to synthesize an IF signal and its complex conjugate (Hilbert transform) as the inputs to a quadrature modulator
► The DACs and modulator form single sideband (SSB) upconverter that rejects one of the mixing sidebands, easing the BPF filtering requirements
4
DAC
DAC
PA BPFS BPF
RF RFIF
IF
RF
RF 0LO 90
LOFs
Fs
Complex IF DAC Imperfections
► Complex IF systems create several images: FDAC – FOUT : the main desired signal’s image
Harmonics (2nd, 3rd, etc.), real or folded
► These must be low pass filtered prior to the quadrature modulator
5
IF DAC
IF DAC
S
IF
RF 0LO 90
Fs
IF Fs
RFLO
imageharmonic
Complex IF DAC Imperfections (cont.)
► Careful frequency planning must be done to avoid folded products falling too close to the desired
signal that are then upconverted
► Post-modulator, a band pass filter is used to filter the undesired products
6
IF DAC
IF DAC
S
IF
RF 0LO 90
Fs
IF Fs
RFLO
imageharmonic
IF DAC
IF DAC
S
IF
RF 0LO 90
Fs
IF Fs
Complex IF Transmitter
► DAC Images Fall much closer to the DPD BW edge. Analog LPF is significant challenge.
► Analog LPF Fcutoff now needs to be >= DPD BW.
Example: for 500MHz of DPD BW, LPF fcutoff is 500MHz minimum.
LPF needs to be flat over +/-250MHz centered around IF AND, IF needs to be >= DPD BW/2.
7
DAC output spectrum
Closest Image:
ΔFdac-2IF
Fcutoff = DPD BW
IF DAC
IF DAC
S
IF
RF 0LO 90
Fs
IF Fs
Complex IF Transmitter (cont.)
► DAC & QMOD BaseBand input linearity performance over Freq is now a key spec.
► OIP2 is out of band
► QEC is much less critical. Image is located 2xIF away
► Sinc Rolloff needs to be compensated for passband flatness
8
DAC output spectrum
Closest Image:
ΔFdac-2IF
Fcutoff = DPD BW
Zero-IF Transmitter Signal Processing
► A zero-IF architecture uses DACs to synthesize baseband signals as the inputs to a quadrature
modulator
► The quadrature LO in the modulator upconverts the baseband signals directly to RF frequencies
9
DAC
DAC
PA BPFS BPF
RF RFRF
RF 0LO 90
LOFs
Fs
Zero-IF or Direct Conversion Transmitter
► DAC Images Fall in nulls of Sinc response -> Eases Analog LPF
► Analog LPF 3db BW needs to be ½ that of Complex IF LPF.
Example for 500MHz of DPD BW, LPF needs to be flat over +/-250MHz
10
DAC output spectrum
Closest Image:
ΔFdac
Fcutoff = DPD/2 BW
DAC
DAC
PA BPFS BPF
RF RFRF
RF 0LO 90
LOFs
Fs
Zero-IF or Direct Conversion Transmitter (cont.)
► DAC performance only needs to be optimized for Low IFs -> Can trade off power vs. High frequency performance
► OIP2 & 1/f noise are now critical specs.
► QEC is also now a critical concern.
11
DAC output spectrum
Closest Image:
ΔFdac
Fcutoff = DPD/2 BW
DAC
DAC
PA BPFS BPF
RF RFRF
RF 0LO 90
LOFs
Fs
Direct to RF Transmitter Signal Processing
► Direct RF eliminates all analog up conversion stages
RF signal is directly synthesized at the desired output frequency
Imperfections of analog components (LO leakage, I/Q imbalance, SSB rejection, etc.) are eliminated
► The output of the RF DAC is low pass filtered, leaving the desired RF signal
12
RF DAC PA BPFLPF
RF RFRFFs
Direct to RF DAC Imperfections
► RF DACs generate images and harmonics, just as BB and IF DACs, and clock spurious signals
also appear on the output
► These are filtered with the low pass filter.
► The cutoff region of the LPF can be steep if the RF output is close to Fs/2.
► If an image or a folded harmonic comes in-band, the LPF cannot filter it—a BPF must be used, or
the DAC performance must be “good enough” for the system
13
RF DAC LPF
RF FsFs/2
image
harmonic
Direct RF Transmitter
Closest Image:
ΔFdac-2IF
Closest Image:
Δ(2IF)
Closest Image:
Δ(Fdac-2IF)
Fcutoff = DPD BW
RF Bandpass Filter,
BW >=DPD BW
RF DAC LPF
RF FsFs/2
image
harmonic
► Normal/Mix/RZ Mode & Ultra High DAC rates eliminate the need for a Mixer
Direct RF Transmitter – High Fs
► Ultra high DAC rates push DAC Images far enough away that filtering requirements are simplified
when compared to Real IF.
RF DAC LPF
RFFs/2
imageFs
harmonic
Direct RF Transmitter – High Fs Using Quad Switch
► Ultra high DAC rates push DAC Images far enough away that filtering requirements are simplified
when compared to Real IF.
► Quad switch DAC core enables rising/falling edge interpolator to “double” the input clock rate
RF DAC X2 (FIR85)
RFFs/4
harmonicFs/2 3Fs/4
ImageFs
LPF
Applications for RF Converters
17
Where to Use RF Converters?
► Narrowband systems
RF Converters can be used in many places where traditional converters+modulators have been used
Simplification of the signal chain is achieved, with fewer components being used
Simplification can also be achieved by higher integration, i.e., integrating the converters with the RF
components like modulators/demodulators, LNAs, driver amps, etc.
► Wideband systems
Signal bandwidths, 1 GHz, 2 GHz, or more
Multi-band radios (e.g., wireless infrastructure, 1.8 GHz + 2.6 GHz)
Traditional converters+modulators can not address those systems because the components are narrowband
► Multi-use or software-configurable systems
Some products require a capability to address both narrowband AND wideband signals with the same radio
Other products require a capability to address two different types of radios, e.g. a tone generator and a
wideband radio
18 ©2016 Analog Devices, Inc. All rights reserved.
Common Wireless and Cable Infrastructure Bands
RF DAC
RF DAC
156 6-MHz Channels
One 4G band
AND
One 3G band
3GPP Base Station
Cable Full Band
Head End
Applications for RF Converters
►Traditional communications applications
Wireless Infrastructure
Cable Infrastructure
►Instrumentation and MIL/Aero
Traditional signal synthesis
Local oscillator replacement
Fast Frequency Hopping
Types of FFH: Phase coherent, Phase continuous, phase discontinuous
Importance of phase coherent FFH
Phase noise
Reconfigurable Radios (e.g., a Radar and a secure communication link)
20 ©2016 Analog Devices, Inc. All rights reserved.
Phase Coherent Fast Frequency Hopping
► Why phase coherent frequency hopping? Phase coherent means there is a defined relationship between the fOUT of any FTW and the reference (in this
case, the DACCLK)
The defined relationship between the transmitted frequency and the receiver enables a radar receiver to detect Doppler frequency shifts caused by movement of the target object relative to background clutter and objects
Phase coherence enables More accurate detection of smaller Doppler shifts
Frequency agile radars
Pulse compression and modulated radar
21
Phase Coherent Fast Frequency Hopping (cont.)
► Phase coherent fast frequency hopping
The AD9164 achieves phase coherency by implementing thirty-two phase accumulators, one for each of the
thirty-two 32-bit FTWs
When phase coherent mode is enabled (0x800[7:6] = 0b10), all enabled NCO phase accumulators are reset
and begin counting together.
Now, any FTW can be chosen, and when returning to the previous FTW, it is as though no switch occurred
— “phase memory”
► Fast frequency hopping is important for Test and Measurement
Faster switching speeds reduces test time on ATE
Phase coherence can be important for testing MIMO systems, active antenna arrays, etc., for wireless
infrastructure
► TX_ENABLE pin can be programmed to reset NCO phase accumulator
22
Example RF DAC
23
Example of an RF DAC: The AD9162 and AD9164
► The DAC can be run as a traditional, real domain RF DAC
All signal processing can be bypassed
24
HB
2×
HB
3×
JESD
HB
2×,
4×,
8×
NCOINV
SINC
HB
2×
DA
TA
LA
TC
H
SDOSDIO
SCLKCSB SPI
DAC
CORE
SERDIN0+/- . .
SERDIN7+/-
SYSREF+/-SYNC+/-
CLOCK
DISTRIBUTION
DACCLK+/-
TO JESD
TO DATAPATH
TX_ENABLE
OUTPUT+/-
RESETB IRQB
VREF
ISET VREF
NRZ RZ MIX
Example of an RF DAC: The AD9162 and AD9164 (cont.)
► The DAC can be run as a traditional, real domain RF DAC
All signal processing can be bypassed
Or, the final blocks that run at DACCLK can be selected individually
25
HB
2×
HB
3×
JESD
HB
2×,
4×,
8×
NCOINV
SINC
HB
2×
DA
TA
LA
TC
H
SDOSDIO
SCLKCSB SPI
DAC
CORE
SERDIN0+/- . .
SERDIN7+/-
SYSREF+/-SYNC+/-
CLOCK
DISTRIBUTION
DACCLK+/-
TO JESD
TO DATAPATH
TX_ENABLE
OUTPUT+/-
RESETB IRQB
VREF
ISET VREF
NRZ RZ MIX
Example of an RF DAC: The AD9162 and AD9164 (cont.)
► The DAC can be run as a traditional, real domain RF DAC
All signal processing can be bypassed
Or, the final blocks that run at DACCLK can be selected individually
► The signal path would be a real-domain signal path
With full access to the Nyquist zone in NRZ mode, 45% of it in 2xNRZ mode
26
HB
2×
HB
3×
JESD
HB
2×,
4×,
8×
NCOINV
SINC
HB
2×
DA
TA
LA
TC
H
SDOSDIO
SCLKCSB SPI
DAC
CORE
SERDIN0+/- . .
SERDIN7+/-
SYSREF+/-SYNC+/-
CLOCK
DISTRIBUTION
DACCLK+/-
TO JESD
TO DATAPATH
TX_ENABLE
OUTPUT+/-
RESETB IRQB
VREF
ISET VREF
NRZ RZ MIX
HB
2×
HB
3×
JESD
HB
2×,
4×,
8×
NCOINV
SINC
HB
2×
DA
TA
LA
TC
H
SDOSDIO
SCLKCSB SPI
DAC
CORE
SERDIN0+/- . .
SERDIN7+/-
SYSREF+/-SYNC+/-
CLOCK
DISTRIBUTION
DACCLK+/-
TO JESD
TO DATAPATH
TX_ENABLE
OUTPUT+/-
RESETB IRQB
VREF
ISET VREF
NRZ RZ MIX
Example of an RF DAC: The AD9162 and AD9164 (cont.)
► Complex data interface – Interpolating DAC mode
Use for all interpolation modes, including FIR85 (2xNRZ mode)
Treat data like any conventional IF DAC with I and Q DACs
Typically, use the NCO with this to shift signal to correct fout
27
Data Interface – JESD204B
► The data interface is JESD204B protocol, 8 lanes, 12.5 GBPS
This is an upgraded receiver core compared to the IF DACs presented at this training
Configuration of the JESD interface is simplified compared to previous core
► The JESD core has full features such as crossbar, subclass 0 and 1 support, selectable number of lanes, etc.
28
HB
2×
HB
3×
JESD
HB
2×,
4×,
8×
NCOINV
SINC
HB
2×
DA
TA
LA
TC
H
SDOSDIO
SCLKCSB SPI
DAC
CORE
SERDIN0+/- . .
SERDIN7+/-
SYSREF+/-SYNC+/-
CLOCK
DISTRIBUTION
DACCLK+/-
TO JESD
TO DATAPATH
TX_ENABLE
OUTPUT+/-
RESETB IRQB
VREF
ISET VREF
NRZ RZ MIX
Fast Frequency Hopping NCO (AD9164)
► The Fast Frequency Hopping (FFH) NCO enables several key hopping functions
Pre-loading of up to 32 frequency tuning words (FTWs)
Selection of FTW by single SPI write
Phase coherent frequency hopping
► FFH NCO is available only on the AD9164 DAC + DDS
29
Usage Scenarios
Defining Nyquist Zones and Operating Modes
► Quad switch modes include Mix-mode – Rising edge samples data, falling edge samples negative data (DACCLK is an LO)
2xNRZ mode – Rising edge samples data, falling edge samples filtered data (from FIR85)
RZ mode – Rising edge samples data, falling edge samples zero data
31
Example 1: Create a 400 MHz tone
► Several ways to do it
► NCO mode
Lowest power
Image at Fs – Fout
32
HB
2×
HB
3×
JESD
HB
2×,
4×,
8×
NCOINV
SINC
HB
2×
DA
TA
LA
TC
H
SDOSDIO
SCLKCSB SPI
DAC
CORE
SERDIN0+/- . .
SERDIN7+/-
SYSREF+/-SYNC+/-
CLOCK
DISTRIBUTION
DACCLK+/-
TO JESD
TO DATAPATH
TX_ENABLE
OUTPUT+/-
RESETB IRQB
VREF
ISET VREF
NRZ RZ MIX
X
XDC
FSIGNAL FS 2FS
Example 1: Create a 400 MHz tone (cont.)
► Several ways to do it
► NCO mode
Lowest power
Image at Fs – Fout
33
HB
2×
HB
3×
JESD
HB
2×,
4×,
8×
NCOINV
SINC
HB
2×
DA
TA
LA
TC
H
SDOSDIO
SCLKCSB SPI
DAC
CORE
SERDIN0+/- . .
SERDIN7+/-
SYSREF+/-SYNC+/-
CLOCK
DISTRIBUTION
DACCLK+/-
TO JESD
TO DATAPATH
TX_ENABLE
OUTPUT+/-
RESETB IRQB
VREF
ISET VREF
NRZ RZ MIX
X
XDC
Example 1: Create a 400 MHz tone (cont.)
► NCO mode + 2xNRZ (FIR85)
Added power of FIR85
Image at 2*Fs – Fout
2nd and 3rd Nyquist images suppressed by FIR85
filter
34
HB
2×
HB
3×
JESD
HB
2×,
4×,
8×
NCOINV
SINC
HB
2×
DA
TA
LA
TC
H
SDOSDIO
SCLKCSB SPI
DAC
CORE
SERDIN0+/- . .
SERDIN7+/-
SYSREF+/-SYNC+/-
CLOCK
DISTRIBUTION
DACCLK+/-
TO JESD
TO DATAPATH
TX_ENABLE
OUTPUT+/-
RESETB IRQB
VREF
ISET VREF
NRZ RZ MIX
X
XDC
FSIGNAL FS 2FS
Example 1: Create a 400 MHz tone (cont.)
► NCO mode + 2xNRZ (FIR85)
Added power of FIR85
Image at 2*Fs – Fout
2nd and 3rd Nyquist images suppressed by FIR85
filter
35
HB
2×
HB
3×
JESD
HB
2×,
4×,
8×
NCOINV
SINC
HB
2×
DA
TA
LA
TC
H
SDOSDIO
SCLKCSB SPI
DAC
CORE
SERDIN0+/- . .
SERDIN7+/-
SYSREF+/-SYNC+/-
CLOCK
DISTRIBUTION
DACCLK+/-
TO JESD
TO DATAPATH
TX_ENABLE
OUTPUT+/-
RESETB IRQB
VREF
ISET VREF
NRZ RZ MIX
X
XDC
Example 2: Create a 3.5 GHz tone
► NCO mode
3.5 GHz is above 1st Nyquist
Image at Fs/2 – Fout is higher than desired
=> Wrong mode
36
HB
2×
HB
3×
JESD
HB
2×,
4×,
8×
NCOINV
SINC
HB
2×
DA
TA
LA
TC
H
SDOSDIO
SCLKCSB SPI
DAC
CORE
SERDIN0+/- . .
SERDIN7+/-
SYSREF+/-SYNC+/-
CLOCK
DISTRIBUTION
DACCLK+/-
TO JESD
TO DATAPATH
TX_ENABLE
OUTPUT+/-
RESETB IRQB
VREF
ISET VREF
NRZ RZ MIX
X
XDC
Example 2: Create a 3.5 GHz tone (cont.)
► NCO mode + 2xNRZ (FIR85)
3.5 GHz is now within 1st Nyquist (of 5 GHz)
Analog image at FDAC/2 – Fout is higher than
desired (balance of output stage or DACCLK)
Image of 2*FDAC – Fout is visible
37
HB
2×
HB
3×
JESD
HB
2×,
4×,
8×
NCOINV
SINC
HB
2×
DA
TA
LA
TC
H
SDOSDIO
SCLKCSB SPI
DAC
CORE
SERDIN0+/- . .
SERDIN7+/-
SYSREF+/-SYNC+/-
CLOCK
DISTRIBUTION
DACCLK+/-
TO JESD
TO DATAPATH
TX_ENABLE
OUTPUT+/-
RESETB IRQB
VREF
ISET VREF
NRZ RZ MIX
X
XDC
Example 3: Create a 2.1 GHz WCDMA signal
► Complex I/Q + Interpolator(s), NCO
► Synthesize at 50 MHz, interpolate and shift
with NCO
Signal is a wideband (5 MHz) signal, so no
discrete tones visible
Image in 2nd Nyquist zone visible and high
38
HB
2×
HB
3×
JESD
HB
2×,
4×,
8×
NCOINV
SINC
HB
2×
DA
TA
LA
TC
H
SDOSDIO
SCLKCSB SPI
DAC
CORE
SERDIN0+/- . .
SERDIN7+/-
SYSREF+/-SYNC+/-
CLOCK
DISTRIBUTION
DACCLK+/-
TO JESD
TO DATAPATH
TX_ENABLE
OUTPUT+/-
RESETB IRQB
VREF
ISET VREF
NRZ RZ MIX
Example 3: Create a 2.1 GHz WCDMA signal (cont.)
► Complex I/Q + Interpolator(s), NCO + 2xNRZ (FIR85)
► Synthesize at 50 MHz, interpolate and shift with NCO, use FIR85
2nd, 3rd Nyquist images are reduced
FIR85 changes sinx/x rolloff to 2xDACCLK, so fundamental is 3 dB higher output power
39
HB
2×
HB
3×
JESD
HB
2×,
4×,
8×
NCOINV
SINC
HB
2×
DA
TA
LA
TC
H
SDOSDIO
SCLKCSB SPI
DAC
CORE
SERDIN0+/- . .
SERDIN7+/-
SYSREF+/-SYNC+/-
CLOCK
DISTRIBUTION
DACCLK+/-
TO JESD
TO DATAPATH
TX_ENABLE
OUTPUT+/-
RESETB IRQB
VREF
ISET VREF
NRZ RZ MIX
Example 4: Create 192 6-MHz 256-QAM Cable Signals
► Complex I/Q + Interpolator(s), NCO
► Synthesize at baseband, interpolate and shift
with NCO
Signal is bleeding through the 80% BW filter,
images clearly visible
40
HB
2×
HB
3×
JESD
HB
2×,
4×,
8×
NCOINV
SINC
HB
2×
DA
TA
LA
TC
H
SDOSDIO
SCLKCSB SPI
DAC
CORE
SERDIN0+/- . .
SERDIN7+/-
SYSREF+/-SYNC+/-
CLOCK
DISTRIBUTION
DACCLK+/-
TO JESD
TO DATAPATH
TX_ENABLE
OUTPUT+/-
RESETB IRQB
VREF
ISET VREF
NRZ RZ MIX
Example 4: Create 192 6-MHz 256-QAM Cable Signals
► Complex I/Q + Interpolator(s), NCO
► Synthesize at baseband, interpolate and shift
with NCO
90% filter helps
Images clearly visible
41
HB
2×
HB
3×
JESD
HB
2×,
4×,
8×
NCOINV
SINC
HB
2×
DA
TA
LA
TC
H
SDOSDIO
SCLKCSB SPI
DAC
CORE
SERDIN0+/- . .
SERDIN7+/-
SYSREF+/-SYNC+/-
CLOCK
DISTRIBUTION
DACCLK+/-
TO JESD
TO DATAPATH
TX_ENABLE
OUTPUT+/-
RESETB IRQB
VREF
ISET VREF
NRZ RZ MIX
Example 4: Create 192 6-MHz 256-QAM Cable Signals
► Complex I/Q + Interpolator(s), NCO + 2xNRZ
mode
► Synthesize at BB, interpolate, shift with NCO,
use FIR85
Images filtered
42
HB
2×
HB
3×
JESD
HB
2×,
4×,
8×
NCOINV
SINC
HB
2×
DA
TA
LA
TC
H
SDOSDIO
SCLKCSB SPI
DAC
CORE
SERDIN0+/- . .
SERDIN7+/-
SYSREF+/-SYNC+/-
CLOCK
DISTRIBUTION
DACCLK+/-
TO JESD
TO DATAPATH
TX_ENABLE
OUTPUT+/-
RESETB IRQB
VREF
ISET VREF
NRZ RZ MIX
Example 5: Create a 1.8 GHz, 2.1 GHz Dual Band LTE Signal
► Complex I/Q + Interpolator(s), NCO
► Synthesize, interpolate and shift with NCO
Image (of dual band signal) visible
43
HB
2×
HB
3×
JESD
HB
2×,
4×,
8×
NCOINV
SINC
HB
2×
DA
TA
LA
TC
H
SDOSDIO
SCLKCSB SPI
DAC
CORE
SERDIN0+/- . .
SERDIN7+/-
SYSREF+/-SYNC+/-
CLOCK
DISTRIBUTION
DACCLK+/-
TO JESD
TO DATAPATH
TX_ENABLE
OUTPUT+/-
RESETB IRQB
VREF
ISET VREF
NRZ RZ MIX
Example 5: Create a 1.8 GHz, 2.1 GHz Dual Band LTE Signal
► Complex I/Q + Interpolator(s), NCO plus
2xNRZ mode
► Synthesize, interpolate and shift with NCO,
turn on FIR85
Image (of dual band signal) filtered
Some analog bleed-through visible
44
HB
2×
HB
3×
JESD
HB
2×,
4×,
8×
NCOINV
SINC
HB
2×
DA
TA
LA
TC
H
SDOSDIO
SCLKCSB SPI
DAC
CORE
SERDIN0+/- . .
SERDIN7+/-
SYSREF+/-SYNC+/-
CLOCK
DISTRIBUTION
DACCLK+/-
TO JESD
TO DATAPATH
TX_ENABLE
OUTPUT+/-
RESETB IRQB
VREF
ISET VREF
NRZ RZ MIX
Fast Frequency Hop with 100 MHz SPI Writes
► Three frequency hop
► Dwell time ~ 260 ns
45
Example Phase Noise – 3.6 GHz Tone
► Phase noise performance is critical for local oscillator replacement applications
Here the phase noise of the AD9164 is shown with two different regulators
The ADP1761 (board 15002D) shows superior performance to the previous generation regulator
46 ©2016 Analog Devices, Inc. All rights reserved.
-150
-140
-130
-120
-110
-100
-90
100.0E+0 1.0E+3 10.0E+3 100.0E+3 1.0E+6 10.0E+6 100.0E+6
Ph
ase
Nois
e [
dB
c]
Offset [Hz]
3.6 GHz Output
Wenzel 4 GHz source
15002C
15002D
Evaluation System
47
DPG
Downloader
ACE
ADS7-V2
AD9162-FMC-EBZ
J32
J31
J62
J61
DAC OUT
External CLK
ADF4355 REF CLK
+12V TP41
GND TP64
Board #
Crystal120MHz or 122.88MHz
JP1
XP2
USB
FMC
ADF4355 Output
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