DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING ECE291- Digital Logic and Design Laboratory (Laboratory with Projects) Academic Year (2017-2018) ODD Semester for DEPARTMENT OF COMPUTER SCIENCE AND ENGINEERING Student’s Name :………………………………………………… Register Number :………………………………………………… Year / Semester :………………………………………………… Section :………………………………………………… LABORATORY MANUAL
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DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING
ECE291- Digital Logic and Design Laboratory (Laboratory with Projects)
Academic Year (2017-2018) ODD Semester
for
DEPARTMENT OF COMPUTER SCIENCE AND ENGINEERING
Student’s Name :…………………………………………………
Register Number :…………………………………………………
Year / Semester :…………………………………………………
Section :…………………………………………………
LABORATORY MANUAL
ECE291 – Digital Logic and Design Laboratory
ECE / KALASALINGAM UNIVERSITY Page 1 of 101
ECE291 – Digital Logic and Design Laboratory
ECE / KALASALINGAM UNIVERSITY Page 2 of 101
TABLE OF CONTENTS
S. No Contents Page No.
1. Instructions 4
2. Do‟s and Don‟ts 5
3. Course Plan 6
4. Realization of logic gates 11
5. Implementation of combinational logic circuits 21
6. Multiplexer and De-multiplexer 30
7. Decoders and Encoders 37
8. Iterative circuits 44
9. Parity Checkers and Generators 49
10. Shift Registers 55
11. Ripple Counters and Synchronous counters 64
12. Seven Segment Decoder 71
13. Memory Devices 77
14. Analog to digital converters 83
15. Synchronous Finite State Machine 88
APPENDICES
A. Rubric for Pre Lab Work 95
B. Rubric for Model Lab 96
C. Rubric For Mini Project 97
D. Pin Diagrams for Gates and Flip-Flops 98
ECE291 – Digital Logic and Design Laboratory
ECE / KALASALINGAM UNIVERSITY Page 3 of 101
MARK SUMMARY
Exp.
No. Experiment Name Date Marks
Course
Teacher’s
Signature
1. Realization of logic gates
2. Implementation of combinational
logic circuits
3. Multiplexer and De-multiplexer
4. Decoders and Encoders
5. Iterative circuits
6. Parity Checkers and Generators
7. Shift Registers
8. Ripple Counters and Synchronous
counters
9. Seven Segment Decoder
10. Memory Devices
11. Analog to digital converters
12. Synchronous Finite State
Machine
LABORATORY REPORT (15%)
MODEL EXAMINATION (20%)
MINI PROJECT DEMONSTRATION (15%)
TOTAL INTERNAL MARKS (50%)
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ECE / KALASALINGAM UNIVERSITY Page 4 of 101
Instructions
Attendance
Students are expected to attend laboratory classes regularly, and to be on time
for every laboratory class period. Students can be dropped from a class due to excessive
absences. Excessive tardiness may be considered absences. Students are responsible for
assignments, and experiments covered during their absences.
Academic Honesty
Scholastic dishonesty is treated with the utmost seriousness by the instructor
and the department. Academic dishonesty includes, but it is not limited to the wilful
attempt to misrepresent one‟s work, cheat, plagiarize, or impede other students‟
scholastic progress.
Dress Code
Dress code must be appropriate for the laboratory. Students must dress in a way
that clothing and accessories do not compromise their safety, and the safety of others.
Proper foot wear is required in all laboratories. Absolutely no sandals or other footwear
that exposes the feet will be allowed.
Laboratory Conduct
Proper behaviour is expected in all laboratories. Foul language and horseplay
are not allowed.
Books, Tools and Supplies
Students are required to bring to class the required textbooks, tools (including
calculators), notebooks, supplies, and writing instruments as required by the instructor.
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ECE / KALASALINGAM UNIVERSITY Page 5 of 101
DO’S DON’T’S
Be regular to the lab. Do not exceed the voltage Rating
Follow proper Dress Code. Do not interchange the IC‟s while
doing the experiment
Maintain Silence. Avoid l o o s e co n n ec t i o n s and
short circuits
Know the theory behind the experiment before
coming to the lab
Do not throw the connecting wires
to floor
Identify the different leads or terminals or pins of
the IC before making connection. Do not come late to the lab
Know the biasing voltage required for different
families of IC‟s and connect power supply
voltage and ground terminals to the respective
pins of the IC‟s.
Do not operate the IC trainer kits
unnecessarily
Know the Current and Voltage rating of the IC‟s before using them in the experiment.
Do not panic if you don‟t get the
output.
Avoid unnecessary talking while doing the
experiment.
Handle the IC Trainer Kit properly
Mount the IC Properly on the IC Zif Socket.
Handle the other equipment‟s properly.
While doing t h e I n t e r f a c i n g , c o n n e c t
proper voltages to the interfacing kit.
Keep the table clean
Take a s i g n a t u r e o f t h e i n c h a r g e before taking the kit/components
After the completion of the experiments switch off t h e power supply and return the apparatus
Arrange the chairs/stools and equipment properly before leaving the lab.
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KALASALINGAMUNIVERSITY
(Kalasalingam Academy of Research and Education)
ANANDNAGAR, KRISHNANKOIL – 626126
DEPARTMENT OF COMPUTER SCIENCE AND ENGINEERING
ODD SEMESTER 2017-2018
COURSE PLAN
Subject with Code DIGITAL LOGIC AND DESIGN LAB / ECE291
Course B.Tech
Branch / Semester / Section CSE / III / A, B, C, D
Course Credit 2
Course Coordinator Mr. M. SAKTHIMOHAN
Module Coordinator Mr. C. BALA SUBRAMANIAN
Programme Coordinator Dr. R. RAMALAKSHMI
Pre – Requisite
Basic Electrical and Electronics Engineering (EEE101),
Digital Electronics (ECE202)
Course Description
This course will impart the concepts of digital electronics practically and train students
with all the equipment „s which will help in improving the basic knowledge. It will also
help to analyze and design combinational logic and sequential logic circuits
Career Opportunities
1. JTO-BSNL
2. Network Engineer-CISCO, MTNEL
3. System Engineer
COURSE OUTCOMES(COS):
CO1: An ability to operate laboratory equipment.
CO2: An ability to construct, analyzes, and troubleshoots simple combinational and
sequential circuits.
CO3: An ability to design and troubleshoot a simple state machine.
CO4: An ability to measure and record the experimental data, analyze the results, and
prepare a formal laboratory report.
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ECE / KALASALINGAM UNIVERSITY Page 7 of 101
PROGRAM EDUCATIONAL OBJECTIVES (PEOS)
PEO1: The Graduates will be technically competent to excel in IT industry and to
pursue higher studies.
PEO2: The Graduates will possess the skills to design and develop economically and
technically feasible computing systems using modern tools and techniques.
PEO3: The Graduates will have effective communication skills, team spirit, ethical
principles and the desire for lifelong learning to succeed in their professional career.
PROGRAMME OUTCOMES (POS)
PO1: Ability to apply knowledge of mathematics, science and computer engineering to
solve computational problems.
PO2: Ability to identify, formulate, analyze and derive to solve complex computing
problems.
PO3: Capability to design and develop computing systems to meet the requirement of
industry and society with due consideration for public health, safety and environment.
PO4: Ability to apply knowledge of design of experiment and data analysis to derive
solutions in complex computing problems.
PO5: Ability to develop and apply modeling, simulation and prediction tools and
techniques to engineering problems.
PO6: Ability to assess and understand the professional, legal, security and societal
responsibilities relevant to computer engineering practice.
PO7: Ability to understand the impact of computing solutions in economic,
environmental and societal context for sustainable development.
PO8: Applying ethical principles and commitment to ethics of IT and software
profession.
PO9: Ability to work effectively as an individual as well as in teams.
PO10: Ability to effectively communicating with technical community and with
society.
PO11: Demonstrating and applying the knowledge of computer engineering and
management principles in software project development and in multidisciplinary areas.
PO12: Understanding the need for technological changes and engage in life-long
learning
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ECE / KALASALINGAM UNIVERSITY Page 8 of 101
PROGRAMME SPECIFIC OUTCOMES:
PSO1: Problem-Solving Skills: The ability to apply mathematics, science and computer
engineering knowledge to analyze, design and develop cost effective computing
solutions for complex problems with environmental considerations.
PSO2: Professional Skills: The ability to apply modern tools and strategies in software
project development using modern programming environments to deliver a
quality product for business accomplishment.
PSO3: Communication and Team Skill: The ability to exhibit proficiency in oral and
written communication as individual or as part of a team to work effectively with
professional behaviors and ethics.
PSO4: Successful Career and Entrepreneurship: The ability to create a inventive
career path by applying innovative project management techniques to become a
successful software professional, an entrepreneur or zest for higher studies.
a) Write down the truth table with 4 inputs and 7 outputs.
b) For only the output “a”, obtain a minimum logic function. Realize this function
using NAND gates and inverters only. For example, if decimal 9 is to be displayed
a, b, c, d, f, g must be 0 and the others must be 1 (For common anode type display
units), if decimal 5 is to be displayed then a, f, g, c, d must be 0 and the others must
be 1.
c) Connect the output “a” of your circuit to appropriate input of 7-segment display
unit. By applying BCD codes verify the displayed decimal digits for that segment
for “a” of the display.
d) Replace your circuit by a decoder IC 7447 for all of the seven segments. Observe
the display and record the segments that will light up for invalid inputs sequence.
e) Comment on the design if you don‟t want to see any digit for invalid input
sequence.
Basic Workout Questions Related to Experiment:
1. What is seven segment decoder?
2. What are the applications of seven segment decoder?
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ECE / KALASALINGAM UNIVERSITY Page 75 of 101
3. Differentiate LCD with seven segment display.
4. What is BCD adder?
5. Can a decoder function as a Demultiplexer?
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Rubrics for Laboratory Work:
Criteria Obtained Marks Allotted marks
Knowledge 20
Design 30
Analysis 20
Ethics 10
Communication 10
Team Work 10
Total 100
Signature
Result:
ECE291 – Digital Logic and Design Laboratory
ECE / KALASALINGAM UNIVERSITY Page 77 of 101
Date:
EX.NO.:11 MEMORY DEVICES Aim:
To store a set of data in a RAM using IC 2114 starting from location ------- to
location----- --- and retrieve the same data.
Apparatus Required:
Sl.No Component Type Quantity
1 Prototyping Board (Bread Board) - 1
2 DC power supply 5v - 1
3 IC IC2114 1
4 Connecting wires - Required
Theory: Static random-access memory (SRAM) is a type of semiconductor memory
that uses bistable latching circuitry to store each bit. The term static differentiates it from dynamic RAM (DRAM) which must be periodically refreshed. SRAM exhibits data, but it is still volatile in the conventional sense that data is eventually lost when the memory is not powered.
1. Circuits connections are made to the appropriate pins of IC 2114
2. First you have to write the data and then read the data, for writing data make WE to
low and
CS input to low.
3. For a 4-bit data select any address input from A0 to A9. For ex, select A3 to
A0 and connect the data inputs/ outputs i.e., I/O4 – I/O1
4. Write a 4-bit data of your choice in each of the required address inputs or memory
locations
5. By doing the above steps 2, 3 and 4 the data will be stored in the memory location
6. For reading data
a. Make WE to high and CS input to low
b. Disconnect the data inputs I/O4 – I/O1 from input lines and
connect them to output lines to read the data
c. Give the address inputs of the data you have stored and observe the
outputs through
I/O4 – I/O1.
Basic Workout Questions Related to Experiment:
1. How the memories are classified?
2. Compare and contrast static RAM and dynamic RAM.
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ECE / KALASALINGAM UNIVERSITY Page 81 of 101
3. What is PLD? List their types.
4. Distinguish between PAL and PLA.
5. Which memory is called volatile? Why?
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ECE / KALASALINGAM UNIVERSITY Page 82 of 101
Rubrics for Laboratory Work:
Criteria Obtained Marks Allotted marks
Knowledge 20
Design 30
Analysis 20
Ethics 10
Communication 10
Team Work 10
Total 100
Signature
Result:
ECE291 – Digital Logic and Design Laboratory
ECE / KALASALINGAM UNIVERSITY Page 83 of 101
Date:
EX.NO:12 ANALOG TO DIGITAL CONVERTERS
Aim:
To rig up circuit to convert an analog voltage to its digital equivalent
Apparatus Required:
Sl.No Component Type Quantity
1 Prototyping Board (Bread Board)
- 1
2 DC power supply 5v - 1
3 IC IC LM 324, IC 7400 1,1
4 Resistors 10k,100k 4,1
5 Multimeter - 1
6 Connecting wires - Required
Theory:
A Flash ADC (also known as a Direct conversion ADC) is a type of
analog-to-digital converter that uses a linear voltage ladder with a comparator at each "rung" of the ladder to compare the input voltage to successive reference voltages. Often these reference ladders are constructed of many resistors; however modern implementations show that capacitive voltage division is also possible. The output of these comparators is generally fed into a digital encoder which converts the inputs into a binary value.
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Pre laboratory work for Analog to Digital Convertor:
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Circuit Diagram:
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PROCEDURE: 1. Connect the circuit as per the circuit diagram. 2. Verify the digital O/P for different analog voltages.
Note: (1). Connect V+ (pin 4) terminal of the OPAMP to +5V
(2). Connect V- (pin 11) terminal of the OPAMP to ground
Design: Number of comparators required = 2n-1 Where n = desired number of bits C1, C2 & C3 = Comparator o/p D0 & D1 = Encoder (Coding network) O/P.
Basic Workout Questions Related to Experiment:
1. Why ADC?
2. Explain the operation of basic sample and hold circuit.
3. What are the types of ADC?
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ECE / KALASALINGAM UNIVERSITY Page 87 of 101
4. What is the difference between direct ADC and integrating type ADC?
5. What are the applications of ADC?
Rubrics for Laboratory Work:
Criteria Obtained Marks Allotted marks
Knowledge 20
Design 30
Analysis 20
Ethics 10
Communication 10
Team Work 10
Total 100
Signature
Result:
ECE291 – Digital Logic and Design Laboratory
ECE / KALASALINGAM UNIVERSITY Page 88 of 101
Date:
EX.NO:13 SYNCHRONOUS FINITE STATE MACHINE
Aim:
To understanding Mealy and Moore machine analysis of a sequence detector
and compare the results.
Apparatus Required:
Sl.No Component Type Quantity
1 Prototyping Board (Bread Board)
- 1
2 DC power supply 5v - 1
3 IC IC 7476, IC7402 1,1
4 Connecting wires - Required
Theory:
A sequence detector accepts as input a string of bits: either 0 or 1. Its
output goes to 1 when a target sequence has been detected. There are two basic
types: overlap and non-overlap. In sequence detector that allows overlap, the final
bits of one sequence can be the start of another sequence. Our example will be a
11011 sequence detector. It raises an output of 1 when the last 5 binary bits received
are 11011. At this point, a detector with overlap will allow the last two 1 bits to
serve at the first of a next sequence. By example we show the difference
between the two detectors. Suppose an input string 11011011011.
11011 detector with overlap X 11011011011
Z
00001001001
11011 detector with no overlap
Z
00001000001
The sequence detector with no overlap allowed resets itself to the start state when the
sequence has been detected. Write the input sequence as 11011 011011. After the
initial sequence 11011 has been detected, the detector with no overlap resets and
starts searching for the initial 1 of the next sequence. The detector with overlap
allowed begins with the final 11 of the previous sequence as ready to be applied as
the first 11 of the next sequence; the next bit it is looking for is the 0.
ECE291 – Digital Logic and Design Laboratory
ECE / KALASALINGAM UNIVERSITY Page 89 of 101
Preliminary Lab. Work:
Design a circuit which detects (011) sequences in a string of bits coming
through an input line (i.e., the input is a serial bit stream). Once the (011) sequence
is detected, output becomes (1), otherwise it stays as (0). A sample input and output
bit streams (sequence) are given below. First bit coming to the input is the one
shown on the far left.
Example Input bit stream: 01101111011
Example Output bit stream: 00100100001
Before coming to LAB, find the state diagrams of this
sequence detector a) As a Mealy machine
b) As a Moore machine.
Two realizations (Mealy, Moore) of the above sequence detector are given below.
Moore and Mealy Realization of (011) sequence detector.
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Pre laboratory work for Moore and Mealy machine:
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ECE / KALASALINGAM UNIVERSITY Page 91 of 101
Procedure: 1. Set up the above given Mealy machine on your board. 2. Do not forget power and ground connections.
3. Use standard switches (TTL SWT) for the preset and the clear control inputs as
required.
4. Use a standard switch (TTL SWT) for the x input.
5. Use negative pulsar switch for the clock input.
6. Use LED s for states and z output observations.
7.Verify your Mealy machine realization on the breadboard with state diagram you
found in prelab work.
8.Apply the above given sample input bit stream (sequence) and observe output
stream.
9. Draw time diagrams for the (x) input, (y1, y2) state variables and z output
Attention: 1.For each input there should be a clock pulse (In this case 18 pulses required) 2. Initial state: 00 should be arranged by preset and clear inputs. You have to
rearrange above example input stream right after initial state has been applied.
Basic Workout Questions Related to Experiment:
1. Compare Asynchronous and Synchronous sequential logic.
2. What is latch? What is the difference between latch and flip flop?
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ECE / KALASALINGAM UNIVERSITY Page 92 of 101
3. Define the terms State table and State Assignment.
4. What are races and cycles?
5. What are hazards?
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Rubrics for Laboratory Work:
Criteria Obtained Marks Allotted marks
Knowledge 20
Design 30
Analysis 20
Ethics 10
Communication 10
Team Work 10
Total 100
Signature
Result:
ECE291 – Digital Logic and Design Laboratory
ECE / KALASALINGAM UNIVERSITY Page 94 of 101
APPENDICES
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Rubric for Pre-Lab Work
Criteria Beginning or
incomplete
Developing Accomplished Exemplary
Knowledge
No grasp of
required subject
matter. No
understanding
of major issues.
(0)
Only basic
concepts are
demonstrated
and interpreted.
(1-10)
Able to
elaborate and
explain to some
degree.
(10-15)
Demonstration of
full knowledge of
the subject with
explanations and
elaboration.
(15-20)
Design
Very
ineffective.
Would not
allow
experimenters
to achieve any
goals
(0-5)
Somewhat
ineffective.
Would allow
experimenter(s)
to achieve some
goals.
(5-10)
Somewhat
effective.
Would allow
experimenter(s)
to achieve most
goals.
(10-20)
Effective. Would
allow
experimenter(s) to
achieve all goals.
(20-30)
Analysis
Analysis
methods were
completely
misapplied or
absent.
(0)
Analysis
methods were
attempted.
Some methods
were applied
but with
significant
errors or
omissions.
(1-10)
Analysis
methods were
attempted.
Most methods
were correctly
applied but
more could
have been done
with the data.
(10-15)
Analysis methods
were fully and
correctly applied.
(15-20)
Ethics
Not handed in
more than one
week late. Does
not follow
instructions.
(0)
Up to one week
late. Rarely
follows
instructions
and/or requires
constant
assistance.
(1-5)
Up to two days
late. Reads and
follows
instructions but
requires
assistance.
(5-8)
Handed in on
time. Reads and
follows
instructions
competently and
accurately.
(8-10)
Communication
-Presentation
has limited
organization.
(1-3)
-Presentation is
fairly well
organized
(3-5)
-Presentation is
well organized
(5-8)
-Presentation is
exceptionally well
organized
(8-10)
Team work
Does not work
with group
members to
complete tasks
(0)
Rarely works
collaboratively
with group
members to
complete tasks
(1-5)
Sometimes
works
collaboratively
with group
members to
complete tasks
(5-8)
Works
collaboratively
with group
members to
complete tasks.
(8-10)
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ECE / KALASALINGAM UNIVERSITY Page 96 of 101
Rubric for Model Lab
Criteria
Exemplary
Proficient
Fair
poor
Analysis
and Design
(All circuit
diagrams
programs,
& truth
tables.)
(35pts)
The program,
diagrams and
truth tables are
95- 100%
accurate, and
are very neatly
designed &
drawn
(30 -35 pts)
The programs,
diagrams and
truth are 70 -
95% correct
and/or is sub-
exemplary in
designing &
drawing
quality.
(25 -30 pts)
The programs,
diagrams and
truth tables are
40 to 70%
correct and/or
is poor in
designing &
drawing
quality.
(15 -25 pts)
The programs,
diagrams and
truth tables are <
40 % correct and
are poor in
designing &
drawing quality.
Does not know
how to design
(0-15 pts)
Experimen
t
Conductio
n
(25 pts)
80-100% of the
required design
elements are
obtained
properly.
(20-25) pts)
80 -60 % of the
design
elements are
obtained
properly
(15 -20 pts).
60-40% design
elements are
obtained
properly.
(10 -20 pts)
Less than 40%
design elements
are obtained
properly
(0-10 pts)
Completed
all parts of
the
laboratory
(20 pts)
90-100%
Completed
(18-20 pts)
75%-
90%completed,
without any
help
(15- 20 pts)
40-75%
completed,
with help
(10-15 pts)
<40% completed
or not done
(0-10 pts)
Interpretat
ion
(10 pts)
The results are
interpreted
correctly and
with
demonstrated
understanding
of the design.
(9-10 pts)
The results are
interpreted
correctly not in
a complete
manner with a
little
bunderstanding
of the design.
(6-8 pts)
The results are
not interpreted
correctly.
(4-6 pts)
Does not know
about the
material.
(0-3pts)
Safety
(10 pts)
Safety
instructions
were carried
completely;
(10 pts)
Safety
instructions
were carried
after
instruction
from faculty;
(7-9pts)
Safety
instructions
were carried
after many
instructions
from faculty;
(4-7 pts)
Safety
instructions were
not carried;
(0-3 pts)
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ECE / KALASALINGAM UNIVERSITY Page 97 of 101
Rubric For Mini Project
Criteria Poor Fair Good Very
good
The project is written
The project is a little
The project is The project is neat
Attractiveness and
on notebook
paper,
messy or
disorganized.
somewhat neat
and and organized.
or is very sloppy.
organized.
Organization
Project does not Project is missing Project meets Project exceeds