Project Part 1 Report-MMD Final

MICRO CONTROLLER BASED MOVING MESSAGE DISPLAY

A Major Project - I Report

Submitted in Partial Fulfillment of the Requirements for the Degree

of

BACHELOR OF TECHNOLOGY

IN

ELECTRICAL ENGINEERING

(PART TIME)

By

Jainesh M. Patel (08BEEP23)

Jitesh B. Patel (08BEEP25)

Under the Guidance ofName of the Guide

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DEPARTMENT OF ELECTRICAL ENGINEERING

INSTITUTE OF TECHNOLOGYNIRMA UNIVERSITY

Ahmedabad- 382 481

November 2011

INSTITUTE OF TECHNOLOGY

NIRMA UNIVERSITY

DEPARTMENT OF ELECTRICAL

ENGINEERING

AHMEDABAD – 382481

CERTIFICATETHIS IS TO CERTIFY THAT THE MAJOR PROJECT - I REPORT ENTITLED

“MICROCONTROLLER BASED MOVING MESSAGE DISPLAY”

SUBMITTED BY

MR. JAINESH M. PATEL (08BEEP23)

MR. JITESH B. PATEL (08BEEP25)

TOWARDS THE PARTIAL FULFILLMENT OF THE REQUIREMENTS FOR THE AWARD OF THE

DEGREE IN BACHELOR OF TECHNOLOGY IN ELECTRICAL ENGINEERING (PART

TIME) OF NIRMA UNIVERSITY IS THE RECORD OF WORK CARRIED OUT BY HIM UNDER

MY/OUR SUPERVISION AND GUIDANCE. THE WORK SUBMITTED HAS IN OUR OPINION

REACHED A LEVEL REQUIRED FOR BEING ACCEPTED FOR EXAMINATION.

DATE:12/11/2011.

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PROF. D.B. DAVE

SIGNATURE OF GUIDE

DR. P. N. TEKWANI

SECTION HEAD (EE)

PRO. A.S.RANADE

HOD (EE)

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CONTENTS

ACKNOWLEDGEMENT PAGE - 5

ABSTRACT PAGE - 6

LIST OF FIGURES/TABLES PAGE - 7

CHAPTER : 1 INTRODUCTION PAGE - 8

1.1 BLOCK DIAGRAM OF MOVING MESSGE DISPLAY CKT.

1.2 INTRODUCTION OF MICROCONTROLLER

1.3 INTRODUCTION TO 8051 MICROCONTROLLER

CHAPTER : 2 THEORITICAL ASPECTS PAGE -11

2.1 8051 PIN DIAGRAM

2.2 THE 8051 OSCILIATOR AND CLOCK

2.3 PROGRAM COUNTER AND DATA POINTER

2.4 A AND B CPU REGISTERS

2.5 FLAGS AND THE PROGMM STATUS WORD (PSW)

2.6 THE STACK AND STACK POINTER

2.7 SPECIAL FUNCTION REGISTERS

2.8 INPUT/OUTPUT PORTS

2.9 COUTERS AND TIMERS

2.10 INTERRUPTS

CHAPTER : 3 CIRCUIT DIAGRAM OF MOVING MESSAGE DISPLAY PAGE -22

CHAPTER : 4 CIRCUIT DESCRIPTION PAGE -23

4.1 EXPLANATION OF CIRCUIT DIAGRAM

4.2 16 SEGMENTS COMMON ANODE ALPHANUMERIC

DISPLAY

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4.3 DECODER : 3-8 DECODER (IC74LS138)

4.4 FEATURES OF THE LM7805 VOLTAGE REGULATION

4.5 DESCRIPTION OF LM7805 VOLTAGE REGULATOR

4.6 POWER SUPPLY UNIT

CHAPTER : 5 SOFTWARE IMPLEMENTATION PAGE -30

5.1 SOFTWARE DEVELOPMENT

5.2 PROGRAM ALGORITHM

5.3 PROGRAM CODE

5.4 LIST OF MESSAGES WHICH CAN BE SELECTED

CHAPTER : 6 CONCLUSION, APPLICATION, FUTURE SCOPE AND PAGE -46

REFERENCES

6.1 CONCLUSION

6.2 APPLICATION

6.3 FUTURE SCOPE

6.4 REFERENCES

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ACKNOWLEDGEMENT

We are very much obliged to all who has directly or indirectly provided help and guidance to

us completing this Seminar. We are very much thankful to the college for the provision of the

seminar by helping us in every period.

We express our deepest gratitude to PROFESSOR D.B.DAVE Sir for giving us the

guidance and support whenever required.

We also express our heartiest gratitude to all the staff members of our department who are not

directly linked with the seminar but as when required helps us to solve the difficulties.

JAINESH M. PATEL (08BEEP23)

JITESH B. PATEL (08BEEP25)

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ABSTRACT

In our project- "Microcontroller based moving message display", we are going to prepare the

working model of the Moving message display. This project will include the microcontroller

AT89C51 as the heart of the circuit along with the IC 74LS138 which is three-to-eight

decoder, common anode alphanumeric displays, BC 558 pnp transistor, power supply unit

and a few discrete components.

The system consists of both hardware and software parts. The circuit presented here uses 16

common-anode, single-digit, alphanumeric displays to show 16 characters at a time.

We have programmed to move message on the panel from the rightmost display to the left

and message stayed stationary for a few seconds when the first character reaches the leftmost

display, then it continues to move.

A 4 pin dip switch connected to the microcontroller through a port is used to select the

desired message stored in the memory of the microcontroller. The microcontroller provides

the data signal to the 16 display units through other two ports. Another port is used to provide

the address of the displays to the 3 to 8 decoders which are actually controlling the turning on

and off the display.

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LIST OF FIGURE

Figure No.

Description Page No.

1.1 BLOCK DIAGRAM OF THE MOVING MESSAGE DISPLAY CKT 8

1.2 BLOCK DIAGRAM OF THE MICROCONTROLLER 9

2.1 8051 MICROCONTROLLER HARDWARE. 11

2.2 8051 DIP PIN ASSIGNMENTS 12

2.3 8051 OSCILATOR AND CLOCK 13

2.4 PROGRAM STATUS WORD (PSW) 15

2.5 PORT 0 PIN CONFIGURATION 17

2.6 THE TIMER CONTROL (TCON) SFR 18

2.7 THE TIMER MODE CONTROL (TMOD) SFR 19

2.8 THE INTERRUPT ENABLE (IE) SFR 20

2.9 THE INTERRUPT PRIORITY (IP) SFR 21

3.1 CIRUIT DIAGRAM OF MOVING MESSAGE DISPLAY 22

4.1 BLOCK DIAGRAM OF 16-SEGMENT DISPLAY 24

4.2 PIN DIAGRAM OF 16-SEGMENT DISPLAY 25

4.3 LOGIC DIAGRAM 3-8 DECODER- IC74LS138 26

4.4 TRUTH TABLE OF 3-8 DECODER 26

4.5 PIN DIAGRAM OF LM7805 27

5.1 SIMMULATIONL OF PROGRAM CODE 32

5.2 DATA FLOW OF I/O PERIPHERAL 33

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CHAPTER 1

INTRODUCTION

FIG. 1.1 BLOCK DIAGRAM OF MOVING MESSAGE DISPLAY CKT.

An At89c51 microcontroller is the heart of the circuit. It has two timers to control the display

timing and it also control the entire transfer in the circuit.

A 4 pin dip switch is connected to microcontroller which gives the input information to the

microcontroller. Each pin in the dip switch has two states 0 and 1, by using 4 pins we can

actually give 16 different input signals to the microcontroller.

The output data of displayed through a set of 16 signal alphanumeric LED display connected

to the microcontroller.

A decoder is connected to microcontroller which receives the address information to control

the turning on and off of the LED display.

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1.1…INTRODUCTION TO MICROCONTROLLER:

ALUTIMER

/COUNTER I/O PORT

ACUMULATOR

INTERNAL ROM

REGISTER(S) I/O PORT

INTERNAL RAM

INTERRUPT CIRCUITS

CLOCK CIRCUITSTACK

POINTER

PROGRAM COUNTER

FIG. 1.2 BLOCK DIAGRAM OF MICROCONTROLLER

Microcontroller is a general purpose device but one that is meant to read data, perform

limited calculations on that data & control it's environment based on that calculations. The

prime use of microcontroller is to control the operation of the machine using a fixed program

that is stored in ROM.

Figure shows the block diagram of a typical microcontroller, which is a computer on chip.

The design incorporates all features found in microprocessor of CPU: ALU, PC, SP &

registers. It also has added the other features needed to make a computer: ROM, RAM,

parallel I/O, serial I/O, counters, clocks.

The microcontroller design uses a much limited set of single & double byte instructions that

are used to move code & data from internal memory to the ALU. Many instructions are

coupled with pins on the IC packages; the pins are programmable, i.e. capable of having

several different functions depending on programmer.

The microcontroller is concerned with getting data from & to its own pins; the architecture &

instruction set are optimized to handle data in bit & byte size.

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1.2…INTRODUCTION TO 8051 MICROCONTROLLER:

The 8051 microcontroller generic part number actually includes a whole family of

microcontrollers that have numbers ranging from 8031 to 8751 & are available in N Channel

Metal Oxide Silicon (NMOS) & complementary metal oxide silicon (CMOS) construction in

variety of packages.

The 8051 microcontroller has some special features, like

8 bit CPU with registers A & B

16 bit program counter(PC) & data pointer(DPTR)

8 bit program status word(PSW)

8 bit stack pointer(SP)

Internal ROM or EPROM of 0(8031) to 4k(8051)

Internal RAM of 128 byte

1. 4 register banks, each containing 8 registers

2. 16 bytes, which may be addressed at bit level.

3. 8 bytes of general purpose memory.

32 input output pins arranged as four 8 bit ports:P0-P3

Two 16 bit timer/counters:T0 & T1

Full duplex serial data receiver/ transmitter :SBUF

Control registers :TCON,TMOD, SCON, PCON, IP & IE

Two external & three internal interrupt sources

Oscillator & clock circuits.

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CHAPTER 2

THEORITICAL ASPECTS

FIG. 2.1 8051 MICROCONTROLLER HARDWARE

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FIG. 2.2 8051 DIP PIN ASSIGNMENTS

2.1…8051 PIN DIAGRAM:

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   PORT 1 BIT O 1 P1.0 VCC +5V

PORT I BIT I 2 P1.1 (AD0)P0.0 39PORT O BIT O (ADDRESS/DATA0)

PORT I BIT 2 3 Pl.2 (ADI)P0.1 38PORT O BIT I(ADDRESS/DATA 1)

PORT I BIT 3 4 P1.3 (AD2)P0.2 37PORT O BIT 2(ADDRESS/DATA2)

PORT I BIT 4 5 Pl.4 (AD3)P0.3 36PORT O BIT 3(ADDRESS/DATA 3)

PORT I BIT 5 6 P1.5 (AD4)P0.4 35PORT O BIT4(ADDRESS/DATA4)

PORT I BIT 6 7 Pl.6(AD5)P0.5 34 PORT O BIT 5

(ADDRESS/DATA5)   

PORT I BIT 7 8 PI.7 (AD6)P0.6 33PORT O BIT 6(ADDRESSTDATA6)

RESET INPUT 9 RST (AD7)P0.7 32PORT O BIT 7(ADDRESS/DATA 7)

   PORT 3 BIT O

l0 P3.0(RXD) (VPP)/EA 3lEXTERNAL ENABLE

(RECETVE DATA) (EPROM PROGRAMMING)   

PORT 3 BIT 111 P3.1(TXD) (PROG)ALE 30

ADDRESS LATCH ENABLE (X'MIT DATA) (EPROM PROCRAM PULSE)

   PORT 3 BIT 2

12 P3.2(INT0) PSEN 29 PROGRAM STORE ENABLE(TNTERRUPT0)

   PORT 3 BIT 3

l3 P3.3(INT1) (A15)P2.7 28 PORT 2 BIT 7 (ADDRESS l5)(INTERRUPT l)

   PORT 3 BIT 4

l4 P3.4(T0) (A14)P2.6 27 PORT 2 BIT 6 (ADDRESS 14)(TIMER0 INPUT)

   PORT 3 BIT 5

l5 P3.5(T1) (A13)P2.3 26 PORT 2 BIT 5 (ADDRESS l3)(TTMER I INPUT)

   PORT 3 BIT 6

16 P3.6(WR) (A12)P2.4 25 PORT 2 BIT 4 (ADDRESS l2)(WRITE STROBE)

   PORT 3 BIT 7

l7 P3.7(RD) (A11)P2.3 24 PORT 2 BIT 3 (ADDRESS 11)(READ STROBE)

   CRYSTAL INPUT2 18 XTAL2 (A10)P2.2 23 PORT 2 BIT 2 (ADDRESS 10)

   CRYSTAL INPUT I l9 XTAL1 (A9)P2.1 22 PORT 2 BIT 1 (ADDRESS 9)

   GROUND 20 VSS (A8)P2.0 2l PORT 2 BIT O (ADDRESS 8)

A pin out of the 8051 in a 40 pin DIP is shown in Fig. 1.4 with the full and abbreviated

names of the signals for each pin. It is important to note that many of the pins are used for

more than one function (the alternate functions are shown in parentheses in Fig. 1.3). Not all

of the possible 8051 features may be used at the same time.

Programming instructions or physical pin connections determine the use of any multifunction

pins. For example, port 3 bit 0(abbreviated p3.0) may be used as a general purpose I/O pin, or

as an input(R*D) to SBUF, the serial data receiver register. The system designer decides

which of these two functions is to be used and designs the hardware and software affecting

that pin accordingly.

2.2…THE 8051 OSCILIATOR AND CLOCK:

FIG. 2.3 8051 OSCILATOR AND CLOCK

The heart of the 8051 is the circuitry that generates the clock pulses by which all internal

operations are synchronized. Pins XTAL1 and XTAL2 are provided for connecting a

resonant network to form an oscillator. Typically, a quartz crystal and capacitors are

employed, as shown in Fig. 1.4. The crystal frequency is the basic internal clock frequency of

the microcontroller. The manufacturers make available 8051 designs that can run at specified

maximum and minimum frequencies, typically 1 megahertz to 16 megahertz. Minimum

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frequencies imply that some internal memories are dynamic and must always operate above a

minimum frequency or data will be lost.

2.3…PROGRAM COUNTER AND DATA POINTER:

The 8051 contains two 16-bit registers: The programs counter (PC) and the data pointer (DPTR). Each is used to hold the address of a byte in memory.Program instruction bytes are fetched from locations I memory that are addressed by the PC.

Program ROM may be on the chip at addresses 0000h to 0FFFh, external for all addresses

from 0000h to FFFFh. The Pc is automatically incremented after every instruction byte is

fetched and may also be altered by certain instructions. The PC is the only register that does

not have an internal address.

The DPTR register is made up of two 8-bit registers, named DPH and DPL, which are used to

furnish memory addresses for internal and external code access and external data access. The

DPTR is under the control of program instruction and can be specified by its 16-bit name,

DPTR or by each individual byte name, DPH and DPL. DPTR does not have a single internal

address, DPH and DPL are each assigned an address.

2.4…A AND B CPU REGISTERS:

The 8051 contains 34 general purposes, or working, registers. Two of these, registers A and

B, hold results of many instructions, particularly many instructions, particularly math and

logical operations, of the 8051 central processing unit (CPU). The other 32 are arranged as

part of internal RAM in four banks, B0-83, of eight registers and comprise the mathematical

core.

The A (accumulator) register is the most versatile of the two CPU registers and is used for

many operations, including addition, subtraction, integer multiplication and division, and

Boolean bit manipulations. The A register is also used for all data transfers between the 8051

and any external memory. The B register is used with the A register for multiplication and

division operations and has no other function other than as a location where data may be

stored.

2.5…FLAGS AND THE PROGRAM STATUS WORD (PSW):

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Flags are l-bit registers provided to store the results of certain program instructions. Other

instructions can test the condition of the flags and make decisions base 1 on the flag states. In

order that the flags may be conveniently addressed they are grouped inside the program status

word(PSW) and the power control (PCON) registers. The 8051 has four math flags that

respond automatically to the outcomes of math operations and three general-purpose user

flags that can be set to 1 or cleared to 0 by the programmer as desired. The math flags include

Carry(C), Auxiliary carry (AC) overflow (OV), and Parity (P). User flags are named F0,

GF0, and GF1, they are general purpose flags that may be used by the programmer to record

some event in the program. Note that all of the flags can be set and cleared by the

programmer at will. The math flags, however, are also affected by math operations.

The program status word is shown in Fig, the PSW contains the math flags, user program flag

FO, and the register select bits that identify which of the four general purpose register banks

is currently in use by the program.

FIG. 2.4 PROGRAM STATUS WORD (PSW)

Bit Symbol Function

7 CY Carry flag; used in arithmetic, jump, rotate and Boolean instructions6 AC Auxiliary Carry flag; used for BCD arithmetic5 F0 User flag4 RS1 Register bank select bit 13 RS0 Register bank select bit 0

RS1 RS00 0 Select register bank 00 1 Select register bank I1 0 Select register bank21 1 Select register bank 3

2 OV Overflow flag, used in arithmetic instructions1 - Reserved for future use0 P Parity flag; shows parity of register A: l=Odd parity

Bit addressable as pSW.0 to pSW.7

2.6…THE STACK AND STACK POINTER

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7 6 5 4 3 2 1 0

CY AC F0 RS1 RS0 OV - P

The stack refers to an area of internal RAM that is used in conjunction with certain opcodes

to store and retrieve data quickly. The 8 bit Stack Pointer (SP) register is used by the 8051 to

hold an internal RAM address that is called the top of the stack.

The address held in the SP register is the location in internal RAM where the last byte of data

was stored by a stack operation. When data is to be placed on the stack, the SP increments

before storing data on the stack so that the stack grows up as data is stored. As data is

retrieved from the stack, the byte is read from the stack, and then the SP decrements to point

to the next available byte of stored data.

Operation of the stack and the SP is shown in Fig. 3.5 the Sp is set to 07h when the 8051 is

reset and can be changed to any internal RAM address by the programmer, using a data move

command.

The stack is limited in height to the size of the internal RAM. The stack has the potential (if

the programmer is not careful to limit its growth) to over-write valuable data in the register

banks, bit-addressable RAM, and scratchpad RAM areas. The programmer is responsible for

making sure the stack does not grow beyond predefined bounds!

2.7…SPECIAL FUNCTION REGISTERS

The 805l operations that do not use the internal 128-byte RAM addresses from 00h to FFh are

done by a group of specific internal registers, each called a Special Function Register (SFR),

which may be addressed much like internal RAM, using addresses from 00h to FFh. some

SFRs are also bit addressable, as in the case for the bit area of RAM.

Name Function Internal RAM address (HEX)

A Accumulator 0E0

B Arithmetic 0F0

DPH Addressing external memory 83

DPL Addressing external memory 82

IE Interrupt enable control 0A8

IP Interrupt Priority 0B8

PO Input/ output Port latch 80

P1 Input/ output Port latch 90

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P2 Input/ output Port latch 0A0

P3 Input/ output Port latch 080

PCON Power control 87

PSW Program status word 0D0

SCON Serial Port control 98

SBUF Serial port data buffer 99

SP Stack Pointer 81

TMOD Timer/ counter mode control 89

TCON Timer/ counter control 88

TLO Timer 0low byte 8A

THO Timer 0 high byte 8C

TLl Timer I low byte 8B

TH1 Timer I high byte 8d

2.8…INPUT/OUTPUT PORTS:

Port 0:

Port 0 pins may serve as inputs, outputs, or when used together, as a bidirectional low-order

address and data bus for external memory. For example, when a pin is to be used as an input,

a 1must be written to the corresponding port 0 latch by the program, thus turning both of the

output transistors off, which in turn causes the pin to "float" in a high-impedance state, and

the pin is essentially connected to the input buffer.

FIG. 2.5 PORT 0 PIN CONFIGURATION

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Port 1:

Port I pins have no dual functions. It is used for input / output function only.

Port 2:

Port 2 may be used as an input/output port similar in operation to port l. The alternate use of

port 2 is to supply a high-order address byte in conjunction with the port 0 lower-order byte

to address external memory.

Port 3:

Port 3 is an input/output port similar to port l. The input and output functions can be

programmed under the control of the P3 latches or under the control of various other special

function registers.

2.9…COUNTERS AND TIMERS:

Many microcontroller applications require the counting of external events, such as the

frequency of a pulse train, or the generation of precise internal time delays between computer

actions. Both of these tasks can be accomplished using software techniques, but software

loops for counting or timing keep the processor occupied so that other, perhaps more

important, functions are not done. To relieve the processor of this burden, two 16-bit

u counters, named T0 and T1, are provided for the general use of the programmer. Each

counter may be programmed to count internal clock pulses, acting as a timer, or programmed

to count external pulses as a counter.

The counters are divided into two 8-bit registers called the timer low (TL0, TL1) and high

(TH0, TH1) bytes. All counter action is controlled by bit states in the timer mode control

register (TMOD), the timer / counter control register (TCON), and certain program

instructions.

FIG. 2.6 THE TIMER CONTROL (TCON) SFR

Bit Symbol Function

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7 6 5 4 3 2 1 0

TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0

7 TF1 Timer 1 Overflow flag. Set when timer rolls from all 1s to 0.

6 TR1 Timer 1 run control bit.

5 TF0 Timer 0 Overflow flag. Set when timer rolls from all 1s to 0.

4 TR0 Timer 0 run control bit.

3 IE1 External interrupts 1 Edge flag.

2 IT1 External interrupt 1 signal type control bit.

1 IE0 External interrupt 0 Edge flag.

0 IT0 External interrupt 0 signal type control bit.

[ TI ME T 1 ] [ TIMER 2 ]

FIG. 2.7 THE TIMER MODE CONTROL (TMOD) SFR

Bit Symbol Function

7/3 Gate OR gate enable bit which controls RUN / STOP of timer 1/0.6/2 C/T Set to 1 by program to make timer 1/0 act as a counter.

Cleared to 0 by program to make timer act as a timer.5/1 M1 Timer/counter operating mode select bit 1.4/0 M0 Timer/counter operating mode select bit 0.

M1 M0 MODE0 0 00 1 11 0 21 1 3

2.10…INTERRUPTS:

A computer program has only two ways to determine the conditions that exist in internal and

external circuits. One method uses software instructions that jump to subroutines on the states

of flags and port pins. The second method responds to hardware signals, called interrupts that

force the program to call a subroutine. Software techniques use up processor time that could

be devoted to other tasks; interrupt stake processor time only when action by the program is

needed. Most applications of micro controller involve responding to events quickly enough to

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7 6 5 4 3 2 1 0

GATE C/T M1 M0 GATE C/T M1 M0

control the environment that generates the events. Interrupts are often the only way in which

real-time programming can be done successfully.

Interrupts may be generated by internal chip operations or provided by external Sources. Any

interrupt can cause the 8051to perform a hardware call to an interrupt. Handling subroutine

that is located at a predetermined absolute address in program memory.

Five interrupts are provided in the 805l. Three of these are generated automatically by

internal operation: Timer flag 0, Timer flag 1, and the serial port interrupt (R1orT1). Two

interrupts are triggered by external signals provided by circuitry that is connected to pins

INT0 and INT1 (port pins P3.2 and P3.3).

All interrupt functions are under the control of the program. The programmer is able to alter

control bits in the Interrupt Enable register (IE). The Interrupt Priority register (IP), and the

Timer Control register (TCON).

FIG. 2.8 THE INTERRUPT ENABLE (IE) SFR

Bit Symbol Function

7 EA Enable interrupt bit.

6 - Not implemented.

5 ET2 Reserved for future use.

4 ES Enable serial Port interrupt.

3 ET1 Enable timer overflow interrupt.

2 EX1 Enable external interrupt 1.

1 ET0 Enable timer overflow interrupt.

0 EX0 Enable external interrupt 0.

FIG. 2.9 THE INTRRUPT PRIORITY (IP) SFR

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7 6 5 4 3 2 1 0

EA - ET2 ES ET1 EX1 ET0 EX0

7 6 5 4 3 2 1 0

- - PT2 PS PT1 PX1 PT0 PX0

Bit Symbol Function

7 - Not implemented.

6 - Not implemented.

5 PT2 Reserved for future use.

4 PS Priorities of serial port interrupt. Set/cleared by program.

3 PT1 Priority of timer I overflow interrupt. Set/cleared by program.

2 PX1 Priorities of external interrupt 1. Set/cleared by program.

1 PT0 Priority of timer 0 overflow interrupts. Set/cleared by program.

0 PX0 Priorities of external interrupt 0. Set cleared by program.

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CHAPTER 3

CIRCUIT DIAGRAM OF MOVING MESSAGE DISPLAY

FIG. 3.1 CIRUIT DIAGRAM OF MOVING MESSAGE DISPLAY

PAGE | 23

CHAPTER 4

CIRCUIT DESCRIPTION

4.1…EXPLANATION OF CIRCUIT DIAGRAM

The diagram in shown in fig. 3.1 is the circuit of the Microcontroller Based Moving Message

Display. It comprise Microcontroller At89C51, 3-8 decoder IC 74LS138, 16-Segment

Common Anode Alphanumeric Display (KLA51), voltage regulator IC 7805, BC 558 pnp

transistor, various rating of resistor and capacitor, 4-pin Dip switch and a few discrete

components.

At the heart of the moving message display is At89c51 Microcontroller (IC1). It is low

power, high performance, 8-bit Microcontroller with 4kB of flash programmable and

Erasable Read-Only |Memory (EPEROM) used as on chip program memory, 128 bytes of

RAM used as data memory, 32 individual programmable input / output (I/O) lines divided

into four 8 bit port, two 16 bit programmable timers/ counters, a five –vector-level interrupt

architecture, on-chip oscillator and clock circuitry.

Port P0 and P2 of the microcontroller have been configured to act as a common data bus for

all the 16 alphanumeric display whose corresponding data pin have been tied together to

make a common 16 bit data bus, Port -2 provides the higher byte of data, while port-0

provides lower one to light ups a character on the display. Port pin P1.2 –P1.4 and P1.5 –P1.7

of the microcontroller have been used as address input for decoder IC3 and IC4 (74LS138) to

enable one of the fourteen alphanumeric display (DIS3 through DIS16) at a time,

respectively. However, display DIS1 and DIS2 are enabling or disable directly by port pins

P1.0 and P1.1. Pin 4 and 5 are ground and pin 6 is made to enable decoder 74LS138.

All the corresponding data pins DIS1 through DIS16 of alphanumeric display have been tied

together, while the common anode of each display is separately powered via a BC558

transistor which switches ‘on’ or ‘off’ as required, through output of 74LS138 ICs and pins

P1.0 and P1.1 of IC1. The higher nibble of port P3 (P3.4 through P3.7) is used as a selection

bus to select one of the 16 previously stored massage using the 4-bit binary value present on

these pins. This value can be changed through a 4-pin DIP switch (S0 through S3).

PAGE | 24

Selection pins P3.4 though P3.7 are pulled high via resistors R36 through R33, respectively.

When the switch connected to a given pin is open value is high (1), and when it is closed the

pin is held low and the value becomes ‘0’. In this way, by using a 4-bit number you can select

any of the 16 messages in ROM.

Capacitor C5 and resistor R37 from the power-‘on’ reset circuit, while a push-to-connect

switch has been used for manual reset. An 11.0592 MHz crystal generates the basic clock

frequency for the microcontroller. To change the massage being displayed while the circuit is

working, first change the number present at the selection bus, then press ‘rest’ key.

The 220V AC main is stepped down by transformer X1 to deliver the secondary output of

9V, 500mA. The output of the transformer is rectified by a full-wave bridge rectifier

comprising Diodes D1 through D4, filtered by capacitor C3 and then regulated by IC7805

(IC4), Capacitor C4 by passes any ripple present in the regulated power supply. Led1 Acts as

the ‘power on’ indicator.

4.2…16 -SEGMENTS COMMON ANODE ALPHANUMERIC DISPLAY:

FIG. 4.1 BLOCK DIAGRAM OF 16-SEGMENT DISPLAY

PAGE | 25

LED-based displays can be of two types: dot-matrix and segmental. According to input

supply it can be also divided into two types: Common Anode (CA) and Common Cathode

(CC). Anode is common terminal in case of common anode type display where in common

cathode type display cathode terminal is common. In this project, we are used 16 Segment

Common Anode Alpha Numeric Displays. It has 16 individual segments and which will be

individually glowing (enable) by given supply to the individual terminal.

4.3…DECODER: 3-8 DECORDER (IC 74LS138):

Decoder is a logic circuit that converts n bit binary code to m output line such that only one

output line is activated for each one of the possible combination of input.

Since each of the n input can be 0 or a 1, there are 2n possible input combinations or code.

For each of these input combinations, only one of the m outputs will be (high), all the other

outputs will be inactive (low).

Pin diagram of 3-8 decoder 74LS138 shown in fig. 4.3

FIG. 4.2 PIN DIAGRAM OF 16-SEGMENT DISPLAY

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FIG. 4.3 LOGIC DIAGRAM 3-8 DECODER- IC74LS138

Shown in fig. 4.3 the circuitry for a decoder with three inputs and eight outputs. It uses all

NAND gate, and there for the outputs are active –LOW. In fig. 4.3 is the 74LS138 decoder

A2A1A0 is the input code and E3, Ē2 and Ē1 are the separate enable input are combined in the

NAND gate. Then E3 Ē2 Ē1 is the ENABLE signal. Only when the ENABLE is high, the

decoder works. The truth table operation of 74LS138 is illustrated in Fig. 4.4

FIG. 4.4 TRUTH TABLE OF 3-8 DECODER 4.4…FEATURES OF THE LM78O5 VOLTAGE REGULATOR

Output Current up to 1A

PAGE | 27

74LS138INPUT

OUTPUTSENABLE SELECT

G1 G2(NOTE) A3 A2 A1 O0 O1 O2 O3 O4 O5 O6 O7

X H X X X H H H H H H H HL X X X X H H H H H H H HH L L L L L H H H H H H HH L L L H H L H H H H H HH L L H L H H L H H H H HH L L H H H H H L H H H HH L H L L H H H H L H H HH L H L H H H H H H L H HH L H H L H H H H H H L H

H L H H H H H H H H H H L

Output Voltages of 5, 6, 8, 9, 10, 12. 15, 18,24V

Thermal Overload Protection

Short Circuit Protection

Output Transistor Safe Operating Area Protection

4.5…PIN DIAGRAM OF LM78O5 VOLTAGE REGULATOR

1- INPUT2- GND3- OUTPUT

FIG. 4.5 PIN DIAGRAM OF LM7805

DESCRIPTION OF LM78O5 VOLTAGE REGULATOR

The MC78XX/LM79XXIMC78XXA series of three terminal positive regulators are available

in the TO-Z2AD-PAK package and with several fixed output voltages, making them useful in

a wide range of applications. Each type employs internal current limiting, thermal shut down

and safe operating area protection, making it essentially indestructible. If adequate heat

sinking is provided, they can deliver over 1A output current. Although designed primarily as

fixed voltage regulators, these devices can be used with external components to obtain

adjustable voltages and currents.

4.6…POWER SUPPLY UNIT

PAGE | 28

1

23`

From the fig. 3.1 5V Power supply circuit comprises of the various components such as

bridge rectifier, the regulators, the operational amplifiers, diodes, capacitors etc.

Each components having different function plays a unique role in the power circuit diagram.

The rectifier section comprises of the single phase centre tapped transformer, the transformer

is a 230V /9V.

It means the primary of the transformer is energized with a 230V AC and it secondary

provides the 9V as an output voltage.

Hence the transformer used here is a single phase step down transformer. The next section

comprises of the bridge rectifier which consists of the four diodes. The secondary output of

the transformer is fed to the bridge rectifier, this rectifier converts the input voltage which is

an alternating current into the direct current. Though the output available from the bridge

rectifier is not a pure DC but it consists of some alternating components which are called

ripples.

To eliminate the alternating component from the output the filters are used, here in our

project we have used the capacitor filters. The capacitor serves here as a filtering devices.

While in capacitor input filter, the capacitor charges to the peak value of the output voltage.

Also the ac components are bypassed to ground so there is less voltage drop. So the output

voltage available is more than in these type of filter.

The next section comprises of the voltage regulator section. It consists of the use of the

voltage regulator LM7805. The LM7805 is a 3 terminal 1 ampere positive voltage regulator.

Because the 78 series comprises of the positive voltage regulator. They provide the output

voltage which is of positive in nature.

The last two digit of the voltage regulator shows the level of the available voltage from the

regulator. It means for e.g. the LM7805 so it indicates that these regulator provides the output

voltage having magnitude of +5V in the output.

As these regulator consists of three terminals these terminals are marked as terminals 1, 2, 3.

The terminal 1 is the input terminal of the voltage regulator. The output dc voltage available

from the rectifier is given to these input terminal of the voltage regulator.

The terminal 2 is the ground terminal of these voltage regulator. The terminal 3 is called the

output terminal the voltage regulator. From these terminal the output voltage available having

a magnitude of +5V.

PAGE | 29

These output voltage is then feed to the input terminals of the Microcontroller. From fig. 3.1

it can be seen that the capacitor is connected across the output terminal of the voltage

regulator. This capacitor serves as an function of maintaining the output voltage of the

voltage regulator as an constant without any disturbance.

So, the two capacitors C1, C2 works for maintaining the voltage constant. The capacitor C2

held's the output of the voltage regulator as constant voltage whereas the capacitor C2

protects the input signal of the voltage regulator from any type of the disturbances from any

strange signal.

As we know that the voltage regulator LM7805 is very sensitive to the reversed bias in the

sense the reverse bias can cause the critical damage to the voltage regulator LM7805. So to

prevent the voltage regulator LM7805 from the reverse bias condition the two diodes are

used. As from the fig.3.1 it can be seen that the two diodes 1N4007 are connected back to

back in reverse direction.

So these diodes prevent the voltage regulator LM7805 from reverse biased. The output of the

voltage regulator is given to VCC terminal (pin no.40) of Microcontroller and Ground (GND)

is given to GND terminal (pin no. 20) of the microcontroller.

CHAPTER 5

SOFTWARE IMPLEMENTATION

5.1…SOFTWARE DESCRIPTION

PAGE | 30

The software is written in assembly language and its main concept is as follows. Timer 1 has

been used to generate a delay of around 1 ms for the switching gap between two consecutive

displays. Thus, each display is enable for 1mswhile displaying a message. The length of this

cycle depends upon the length of the message. The cycle repeats after a ‘0’ is encountered at

the end of each message stored in the look-up table at the end of the program. Each time, to

display a character at a given display, first two bytes (16 bits) of data are sent to Port-2 and

Port-0, then the desired display is enabled by sending its address to Port-1. Thereafter, a delay

of 1 ms (slightly more than that) is generated by timer 1. Upon timer overflow, the entire

display panel is refreshed by passing ‘FFFFH’ to the data bus. Then the next character at the

next display is passed in the similar manner. The cycle frequency is variable (depending upon

the length of the message) but always high enough so that the message appears continuous

to the human eye.

Timer 0, with its interrupt enabled, is used to change the starting address of the message in

cyclic manner so that the characters scroll from left to right with a proper gap between each

shift. Meanwhile, the interrupt service sub-routine also checks for the starting address of

DIS16 (right-most display). As soon as the first character reaches DIS16, the message stays

for a longer time so that the entire message (message length not longer than 16 characters)

can be easily read. Thereafter, characters again start scrolling rightwards, so the entire

message goes out and disappears after a while to reappear from left side. All the messages are

stored in the form of a look-up table in the program memory (ROM) itself. When the circuit

is switched ‘on’ (or reset), the monitoring program first checks for the binary number present

at the selection bus and according to that, the ROM address of the starting character of the

selected message is loaded into the data-pointer. Thereafter, on-chip ROM reading is used to

read the entire message over there.

Each character is represented in the look-up table of the source code by two bytes. For

example, ‘S’ is represented by ‘Sh’ and ‘Sl’ separated by a comma. In addition to the

alphabets, Arabic numerals and a few special characters have been defined in the program.

For instance, a blank space is represented by ‘bsh, bsl.’ Thus, it is very easy to modify the

program. Suppose you want to display “NIRMA INSTITUTE TECHNOLOGY” in place of

message‘0.’ First, open the source code in the editor. Delete the old string and write the new

string as below:

msg0:

PAGE | 31

db Nh,Nl,Ih,Il,Rh,Rl,Mh,Ml,Ah,Al,bsh,bsl,Ih,Il,Nh,Nl,Sh,Sl,Th,Tl,Ih,Il,Th,Tl,Uh,Ul,Th,Tl,

Eh,El,bsh,bsl,Oh,Ol,Fh,Fl,bsh,bsl,Th,Tl,Eh,El,Ch,Cl,Hh,Hl,Nh,Nl,Oh,Ol,Lh,Ll,Oh,Ol,Gh,Gl,

Yh,Yl,0

(Please note that the assembler is case-insensitive. Still, upper and lower cases have been

used for clarity.)

5.2…SOFTWARE DEVELOPMENT

We used software named Keil m3for building the target software and debugging it. We could

analyze each and every data bit in the ROM and RAM through the program execution along

with the states of all the 4 ports, timer 1, timer 2 interrupt.

PAGE | 32

FIG. 5.1 SIMMULATION OF PROGRAM CODE

PAGE | 33

FIG. 5.2 DATA FLOW OF I/O PERIPHERAL

PAGE | 34

5.3…PROGRAM ALGORITHM

Algorithm for moving massage display for at89c51 controller,

Port 1 is used as adders bus

Port 2 is used as higher byte data bus

Port 0 is used as lower byte data bus

Port 3(higher nibble) is used as selection of input.

// Program execution starts from here.

Main

Set global interrupt bit

Enable time 0 interrupt

Timer 0 is configured in mode 1

Set initial count of 0 to 00h

Initialize the RAM address location starting from 30h to 60h as FFh

Set the address for display form 1st to 16th in memory location starting from 41 h

to 50 h (data given to decoder to enable each display)

Read the data from Port 3 to accumulator (select input)

Mask lower nibble to accumulator

According to the data in accumulator, load the data pointer with the base address

of the corresponding massage stored in the look up table in the ROM address.

Store the higher and lower bit of data pointer in register R3 and R2

Initialized the register R1 with first display address (41 h)

Start the timer 0.

Step A

Copy value R1 to R0

Move the data pointed by data pointer to Port 2 and Port 0 through the

accumulator.

Move the data (address of displays) pointed by R0 to Port 1

Start the timer in mode 1 for generating a delay between each display of

1msec.

When timer 1 is overflows (interrupts) turn off the display & continue.

Decrement R0

Increment data pointer so that next character of massage is loaded

PAGE | 35

Go back this Step A and repeat this step until accumulator is not

zero(A=0)

If Accumulator = 0, reload the data pointer with the base address of selected

massage using register R3 and R2 and go back to step A.

// Interrupt Services Routine for Timer 0(Executed when timer 0 overflows)

Initialized R6 with 10 in main at the beginning of program execution.

Initialize R7 WITH 46 in main at the beginning of program execution so that

timer 0 need to overflow 46 times before R1 increments (by One) to changing the

starting display.

Start timer 0 and return back

Continue above steps till R1 reaches 50 h. i.e. the first letter in selected massage

reaches the rightmost display

When R1 = 50 h, decrement R6 and restart timer 0 and return back, so that

display remains stationary till R6=0

When R6 = 0, increment R1 and restart timer 0 and return back.

When R1 = 60 h, reload R with 41 h i.e. the address of the leftmost display and R6

with 10.

5.4…PROGRAM CODE

Codes for Decimal number, Alphabets and Special characters:

Decimal number : 0 - 9.

Alphabets characters : A – Z

Special characters : * , + , - , _ , m , P.

// Codes for alphabets: Ah equ c3h

Al equ e8h

Hex code = Binary code = Segment glow 03 h 1100 0011 d2 d1 c b e8 h 1110 1000 e f a1 a2

$mode51

PAGE | 36

DBH equ p2 ; Higher byte of Data Bus

DBL equ p0 ; Lower byte of Data Bus

ADB equ p1 ; Address Bus

input equ p3 ; message select input

;** codes for decimal digits are given below:

; (‘h’ refers to higher byte, ‘l’ to lower one)

zeroh equ 17h

zerol equ 0e8h

oneh equ 0d7h

onel equ 0ffh

twoh equ 23h

twol equ 0ech

threeh equ 2bh

threel equ 0fch

fourh equ 0c3h

fourl equ 0fbh

fiveh equ 0bh

fivel equ 0f8h

sixh equ 0bh

sixl equ 0e8h

sevenh equ 0d7h

sevenl equ 0fch

eighth equ 03h

eightl equ 0e8h

nineh equ 03h

ninel equ 0f8h

;** codes for alphabets are given below:

Ah equ 0c3h

Al equ 0e8h

Bh equ 0bh

Bl equ 0ebh

Ch equ 3fh

Cl equ 0e8h

Dh equ 03h

PAGE | 37

Dl equ 0efh

Eh equ 2bh

El equ 0e8h

Fh equ 0ebh

Fl equ 0e8h

GH equ 1bh

Gl equ 0e8h

Hh equ 0c3h

Hl equ 0ebh

Ih equ 0ffh

Il equ 9fh

Jh equ 17h

Jl equ 0ffh

Kh equ 0ech

Kl equ 0ebh

Lh equ 3fh

Ll equ 0ebh

Mh equ 0d5h

Ml equ 0e3h

Nh equ 0d6h

Nl equ 0e3h

Oh equ 17h

Ol equ 0e8h

Ph equ 0e3h

Pl equ 0e8h

Qh equ 06h

Ql equ 0e8h

Rh equ 0e2h

Rlw equ 0e8h

Sh equ 0bh

Sl equ 0f8h

Th equ 0ffh

Tl equ 9ch

Uh equ 17h

PAGE | 38

Ul equ 0ebh

Vh equ 0fdh

Vl equ 6bh

Wh equ 17h

Wl equ 0abh

Xh equ 0fch

Xl equ 77h

Yh equ 0e3h

Yl equ 0bbh

Zh equ 3dh

Zl equ 7ch

;** codes for few special characters:

strh equ 0e8h ;for star sign (asterisk)

strl equ 17h

plsh equ 0ebh ;for ‘+’ sign

plsl equ 9fh

mnsh equ 0ebh ;minus sign

mnsl equ 0ffh

_h equ 3fh ;underscore sign

_l equ 0ffh

bsh equ 0ffh ;blank space

bsl equ 0ffh

pieh equ 0eah ;for pie

piel equ 7fh

mueh equ 0e3h ;for micro (mu)

muel equ 0ebh

org 0000h

sjmp main

org 000bh ;timer0 interrupt vector address

clr tr0 ;clear timer0 run bit

mov tl0,#00h

mov th0,#00h ;reload timer0 with initial count

djnz r7,a1

mov r7,#46

PAGE | 39

cjne r1,#60h,a5 ;check to again start entering from left-side

sjmp a4

a5: cjne r1,#50h,a2 ;check for display to stay on reaching display-16

sjmp a3

a2: inc r1

sjmp a1

a3: djnz r6,a1

inc r1

sjmp a1

a4: mov r6,#10

mov r1,#41h

a1: setb tr0 ;set timer0 run bit

reti ;return from timer0 ISR and clear tf0

main: mov ie,#00h

setb ea ;set global interrupt bit

setb et0 ;enable timer0 interrupt

mov tmod,#01h ;timer0 configured in mode 1

mov tcon,#00h

mov tl0,#00h

mov th0,#00h ;set initial count to 0000H

mov r7,#46 ;provides gap between each shift

mov r6,#10 ;

mov r0,#60h

blank: mov @r0,#0ffh ;initialize the pointed location by null address

dec r0

cjne r0,#2fh,blank

mov r1,#41h ;load address pointer with initial address

mov 50h,#0dfh ;address for 16th Display (rightmost)

mov 4fh,#0bfh ;address for 15th Display

mov 4eh,#9fh ;address for 14th Display

mov 4dh,#7fh ;address for 13th Display

mov 4ch,#5fh ;address for 12th Display

mov 4bh,#3fh ;address for 11th Display

mov 4ah,#1fh ;address for 10th Display

PAGE | 40

mov 49h,#0fbh ;address for 9th Display

mov 48h,#0f7h ;address for 8th Display

mov 47h,#0f3h ;address for 7th Display

mov 46h,#0efh ;address for 6th Display

mov 45h,#0ebh ;address for 5th Display

mov 44h,#0e7h ;address for 4th Display

mov 43h,#0e3h ;address for 3rd Display

mov 42h,#0fdh ;address for 2nd Display

mov 41h,#0feh ;address for 1st Display (leftmost)

chk: mov a,input ;load accumulator with value at P3

orl a,#0fh ;mask lower nible to get selection bus value

cjne a,#0ffh,chk0

mov dptr,#default ;load dptr with starting address of default message

sjmp read ; now start reading

chk0: cjne a,#0fh,chk1

mov dptr,#msg0 ;load dptr with starting address of msg0

sjmp read ; now start reading

chk1: cjne a,#1fh,chk2

mov dptr,#msg1

sjmp read

chk2: cjne a,#2fh,chk3

mov dptr,#msg2

sjmp read

chk3: cjne a,#3fh,chk4

mov dptr,#msg3

sjmp read

chk4: cjne a,#4fh,chk5

mov dptr,#msg4

sjmp read

chk5: cjne a,#5fh,chk6

mov dptr,#msg5

sjmp read

chk6: cjne a,#6fh,chk7

mov dptr,#msg6

PAGE | 41

sjmp read

chk7: cjne a,#7fh,chk8

mov dptr,#msg7

sjmp read

chk8: cjne a,#8fh,chk9

mov dptr,#msg8

sjmp read

chk9: cjne a,#9fh,chk10

mov dptr,#msg9

sjmp read

chk10: cjne a,#0afh,chk11

mov dptr,#msg10

sjmp read

chk11: cjne a,#0bfh,chk12

mov dptr,#msg11

sjmp read

chk12: cjne a,#0cfh,chk13

mov dptr,#msg12

sjmp read

chk13: cjne a,#0dfh,chk14

mov dptr,#msg13

sjmp read

chk14: mov dptr,#msg14

sjmp read

read: mov r3,dph

mov r2,dpl

setb tr0

rd1: mov r0,01h

rd2: clr a

movc a,@a+dptr

jz down

mov DBH,a

clr a

inc dptr

PAGE | 42

movc a,@a+dptr

mov DBL,a

mov ADB,@r0

acall timer

dec r0

inc dptr

sjmp rd2

down: mov dph,r3 ;reload dph

mov dpl,r2 ;reload dpl

sjmp rd1

timer: mov tmod,#10h ; set mode 1 for timer1

mov th1,#0fch ;FC66H will generate a delay of 1ms with 11.0592MHz Xtal

mov tl1,#66h

setb tr1

jnb tf1,$ ;wait until timer1 overflows

clr tr1

clr tf1

mov DBH,#0ffh

mov DBL,#0ffh

ret

;** look-up table starts from here:msg0: db Hh,Hl,Ah,Al,Ph,Pl,Ph,Pl,Yh,Yl,bsh,bsl,Bh,Bl,Ih,Il,Rh,Rlw,Th,Tl,Hh,Hl,bsh,bsl,Dh,Dl,Ah,Al,Yh,Yl,0msg1: db Hh,Hl,Ah,Al,Ph,Pl,Ph,Pl,Yh,Yl,bsh,bsl,Nh,Nl,Eh,El,Wh,Wl,bsh,bsl,Yh,Yl,Eh,El,Ah,Al,Rh,Rlw,0msg2: db strh,strl,bsh,bsl,Hh,Hl,Ah,Al,Ph,Pl,Ph,Pl,Yh,Yl,bsh,bsl,Dh,Dl,Ih,Il,Wh,Wl,Ah,Al,Lh,Ll,Ih,Il,bsh,bsl,strh,strl,0msg3: db Mh,Ml,Eh,El,Rh,Rlw,Rh,Rlw,Yh,Yl,bsh,bsl,Ch,Cl,Hh,Hl,Rh,Rlw,Ih,Il,Sh,Sl,Th,Tl,Mh,Ml,Ah,Al,Sh,Sl,0msg4: db strh,strl,bsh,bsl,Hh,Hl,Ah,Al,Ph,Pl,Ph,Pl,Yh,Yl,bsh,bsl,Hh,Hl,Oh,Ol,Lh,Ll,Ih,Il,bsh,bsl,strh,strl,0msg5: db strh,strl,bsh,bsl,Eh,El,Ih,Il,Dh,Dl,bsh,bsl,Mh,Ml,Uh,Ul,Bh,Bl,Ah,Al,Rh,Rlw,Ah,Al,Kh,Kl,bsh,bsl,strh,strl,0msg6: db Hh,Hl,Ah,Al,Ph,Pl,Ph,Pl,Yh,Yl,bsh,bsl,Dh,Dl,Ah,Al,Sh,Sl,Hh,Hl,Eh,El,Hh,Hl,Rh,Rlw,Ah,Al,0msg7: db Hh,Hl,Ah,Al,Ph,Pl,Ph,Pl,Yh,Yl,bsh,bsl,Wh,Wl,Eh,El,Dh,Dl,Dh,Dl,Ih,Il,Nh,Nl,Gh,Gl,0msg8: db Hh,Hl,Ah,Al,Ph,Pl,Ph,Pl,Yh,Yl,bsh,bsl,Jh,Jl,Ah,Al,Nh,Nl,Mh,Ml,Ah,Al,Sh,Sl,Hh,Hl,Th,Tl,Mh,Ml,Ih,Il,0msg9: db strh,strl,bsh,bsl,Hh,Hl,Ah,Al,Ph,Pl,Ph,Pl,Yh,Yl,bsh,bsl,Rh,Rlw,Ah,Al,Kh,Kl,Hh,Hl,Ih,Il,bsh,bsl,strh,strl,0msg10: db strh,strl,bsh,bsl,Hh,Hl,

PAGE | 43

Ah,Al,Ph,Pl,Ph,Pl,Yh,Yl,bsh,bsl,Ph,Pl,Oh,Ol,Nh,Nl,Gh,Gl,Ah,Al,Lh,Ll,bsh,bsl,strh,strl,0msg11: db Hh,Hl,Ah,Al,Ph,Pl,Ph,Pl,Yh,Yl,bsh,bsl,Mh,Ml,Oh,Ol,Th,Tl,Hh,Hl,Eh,El,Rh,Rlw,Sh,Sl,Dh,Dl,Ah,Al,Yh,Yl,0msg12: db strh,strl,bsh,bsl,Hh,Hl,Ah,Al,Ph,Pl,Ph,Pl,Yh,Yl,bsh,bsl,Rh,Rlw,Ah,Al,Mh,Ml,Jh,Jl,Ah,Al,Nh,Nl,bsh,bsl,strh,strl,0msg13: db strh,strl,bsh,bsl,Hh,Hl,Ah,Al,Ph,Pl,Ph,Pl,Yh,Yl,bsh,bsl,Lh,Ll,Oh,Ol,Hh,Hl,Rh,Rlw,Ih,Il,bsh,bsl,strh,strl,0msg14: db strh,strl,bsh,bsl,Hh,Hl,Ah,Al,Ph,Pl,Ph,Pl,Yh,Yl,bsh,bsl,Eh,El,Ah,Al,Sh,Sl,Th,Tl,Eh,El,Rh,Rlw,bsh,bsl,strh,strl,0default: db Wh,Wl,Eh,El,Lh,Ll,Ch,Cl,Oh,Ol,Mh,Ml,Eh,El,bsh,bsl,Th,Tl,Oh,Ol,bsh,bsl,Ah,Al,Lh,Ll,Lh,Ll,0end

5.6…LIST OF MESSAGES WHICH CAN BE SELECTED

S3 S2 S1 S0 Message selected

0 0 0 0 HAPPY BIRTHDAY

0 0 0 1 HAPPY NEW YEAR

0 0 1 0 *HAPPY DIWALI*

0 0 1 1 MERRY CHRISTMAS

0 1 0 0 *HAPPY HOLI*

0 1 0 1 *EID MUBARAK*

0 1 1 0 HAPPY DASHEHRA

0 1 1 1 HAPPY WEDDING

1 0 0 0 HAPPY JANMASHTMI

1 0 0 1 *HAPPY RAKHI*

1 0 1 0 *HAPPY PONGAL*

1 0 1 1 HAPPY MOTHERS DAY

1 1 0 0 *HAPPY RAMJAN*

1 1 0 1 *HAPPY LOHRI*

1 1 1 0 HAPPY EASTER*

1 1 1 1 WELCOME TO ALL

PAGE | 44

CHAPTER 6

CONCLUSION, APPLICATION, FEUTURE SCOPE AND REFERENCES

6.1…CONCLUSION

It may be concluded that this project has held us to develop a deep practical knowledge of the

At89c51 Microcontroller. We have dealt with the timer programming and the interrupt

programming of the micro controller. The LED displays proved to very. We could also used

the software like Proteus 7.2 and Keil m Vision3 that are very indispensible in embedded

software development

6.2…APPLICATION:

Railway platforms

Banks counters

PAGE | 45

Public offices

Hotels

Training institutes

Nightclubs and shops

Travelling vehicles

6.3…FEUTURE SCOPE

Many more messages would be possible if complete Port-3 is used for message selection.

Pins RxD, TxD, INT0 and INT1 have been kept free, so that these can be used for interfacing

with the serial port of the PC. Also, interrupt pins can be used to display some message and

sound an alarm in the case of an emergency. For example, a fire sensor can be connected to

‘INT0’ and a vibration detector to ‘INT1.’ These pins can also be used to send signals to

synchronies a similar system that displays another related message at the same time, so a 16-

character, two line display is made possible.

A PC keyboard can be interfaced with microcontroller so the message can write and can

display on the fly.

6.4…REFERENCES

1) The 8051 Microcontroller by Kenneth Ayala, 3rd Edition

2) Data sheet of At89c51 Microcontroller:

HTTP://WWW.DATASHEETCATALOG.COM/DATASHEETS_PDF/A/T/8/9/AT89C51.SHT

ML .

3) Datasheet of 16 segment Alphanumeric LED display :

HTTP://WWW.KWALITYINDIA.COM/MAIN.HTML

4) Datasheet of voltage regulator IC 7805 (FAIRCHILD):

HTTP://WWW.DATASHEETCATALOG.COM/DATASHEETS_PDF/7/8/0/5/7805.SHTML

5) Data sheet of BC558 pnp transistor(Philips):

HTTP://WWW.DATASHEETCATALOG.ORG/DATASHEET/PHILIPS/BC558.PDF

PAGE | 46