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Principles of Quantum Fault Diagnostics J. Biamonte, J. Allen, M. Lukac, M. Perkowski Portland Quantum Logic Department of Electrical Engineering, Portland State University, Portland, Oregon, 97207-0751, USA Keywords: Quantum Computing, Quantum Fault Localization, Quantum Test, Quantum error – correction, Quantum error - detection Abstract: The diagnostic problem of fault localization for quantum circuits is considered for the first time. In this study we introduce an algorithm used to identify and localize errors in quantum circuits; we apply our algorithm to example circuits using known errors that occur in quantum circuits [ 3, 4, 5], and we define the quantum fault model. A n overview is presented contrasting classical test theory with the new quantum test theory presented here. Two new types of faults having no parallel in other types of circuit technology are presented, named and formalized in this work. We introduce and define the quantum fault table, and categorize its entries; a method is presented illustrating how to construct a class of statistical decision diagrams from entries in a quantum fault table. This study has been motivated for the following reasons: (1) various quantum error-correcting codes have been developed, but no research has been done on the problem of formulating a general approach for minimizing the number of tests needed to identify errors in the quantum circuit itself, (2) such research may lead to the development of improved error-correcting codes, (3) physicists currently resort to exhaustively testing quantum circuits, where all possible inputs and outputs are compared; based on the current trends in quantum computing technology, quantum circuits will soon be larger than what is feasible to test exhaustively, forcing a need for the diagnostic testing method introduced here, and finally (4) Quantum test set generation has been mentioned in the literature several times, yet at the time of this writing no in depth study has been done [13, 12]. 1. Introduction and Overview.......................................2 2. The problem of Testing a Quantum Circuit........................3 2.1. Selecting a Quantum Fault Model...............................4 2.2. The existence of complete test sets...........................5 3. Generation of the Quantum Fault Table...........................6 3.1. The Quantum Covering Problem..................................7 1 Submitted to: McNair Research Journal 8/8/2004
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Page 1: Principles of Quantum Fault Detection - Computer Action Teamweb.cecs.pdx.edu/~mperkows/QS/Principles-of-Quantum-…  · Web viewAn in-depth study of quantum circuits leads one to

Principles of Quantum Fault DiagnosticsJ. Biamonte, J. Allen, M. Lukac, M. Perkowski

Portland Quantum LogicDepartment of Electrical Engineering, Portland State University,

Portland, Oregon, 97207-0751, USA

Keywords: Quantum Computing, Quantum Fault Localization, Quantum Test, Quantum error – correction, Quantum error - detection

Abstract: The diagnostic problem of fault localization for quantum circuits is considered for the first time. In this study we introduce an algorithm used to identify and localize errors in quantum circuits; we apply our algorithm to example circuits using known errors that occur in quantum circuits [ 3, 4, 5], and we define the quantum fault model. An overview is presented contrasting classical test theory with the new quantum test theory presented here. Two new types of faults having no parallel in other types of circuit technology are presented, named and formalized in this work. We introduce and define the quantum fault table, and categorize its entries; a method is presented illustrating how to construct a class of statistical decision diagrams from entries in a quantum fault table.

This study has been motivated for the following reasons: (1) various quantum error-correcting codes have been developed, but no research has been done on the problem of formulating a general approach for minimizing the number of tests needed to identify errors in the quantum circuit itself, (2) such research may lead to the development of improved error-correcting codes, (3) physicists currently resort to exhaustively testing quantum circuits, where all possible inputs and outputs are compared; based on the current trends in quantum computing technology, quantum circuits will soon be larger than what is feasible to test exhaustively, forcing a need for the diagnostic testing method introduced here, and finally (4) Quantum test set generation has been mentioned in the literature several times, yet at the time of this writing no in depth study has been done [13, 12].

1. Introduction and Overview................................................................................................................22. The problem of Testing a Quantum Circuit.......................................................................................3

2.1. Selecting a Quantum Fault Model.................................................................................................42.2. The existence of complete test sets...............................................................................................5

3. Generation of the Quantum Fault Table.............................................................................................63.1. The Quantum Covering Problem..................................................................................................7

4. Localization of Faults.........................................................................................................................84.1. Fault Trees.....................................................................................................................................94.2. Testing CAD Tool and Simulations – Q-Fault...........................................................................10

5. Conclusion.......................................................................................................................................106. Acknowledgements..........................................................................................................................10Work Cited.....................................................................................................................................................117. Appendix 1: Metrics.........................................................................................................................12

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1. Introduction and Overview

In classical circuit design an error in a circuit is typically referred to as a fault – in this paper we use the word error and fault interchangeably when referring to both classical and quantum circuits. In classical circuits we represent the occurrence of faults digitally as the inversion of one or more bits of information at one or more locations in the circuit [6, 7, 11]. In analog circuits a fault is manifested by lost signal integrity at one or more stages in the circuit. The detection of faults broudly falls in two distinct types of tests: (1) Parametric tests, as those typically adapted by an analog test engineer, taking into account parametric measures [6]. (2) Logical test [6], (known also as functional test [6,7,8,9]) in which the functional output of a system is compared with the expected output value for a given input test [6, 7, 8, 9].

A quantum computer can suffer from three general types of errors; measurement, preperation, or evolution. In this work, we concern ourselves with Logical testing as applied to quantum circuits, where we inspect the logical data processed by the quantum circuit and compare this data with the expected values allowing us to make a judgement on the quantum circuits functionality.

To further narrow the category of logical testing, we now form three catagories of fault occurance where both classical and quantum circuits suffer: (1) faults inherent in the circuit by manufacturing errors (system faults [6], Manufacturing faults [6], Physical malfunctions/defects [6, 7, 9]), (2) faults introduced by the programmer (design errors [6], Conceptual Errors [6], programming errors/bugs) and (3) random errors caused by the environment (transient failures [6], soft errors [6, 8], random errors [13], probabilistic faults).

As noted, similarity exists between the categories of classical circuit faults and quantum circuit faults listed so far, with the following very notable exceptions: (1) A quantum circuit may have a fault always present that is never detectable when measured and (2) A quantum circuit may always have a fault present that is only detectable in some percentage of measurements. This gives rise to a new definition needed to represent faults with these properties, observed so far only in quantum circuits.

In classical circuits the phrase “probabilistic fault” (with contributions from [6, 7, 8, 9]) and the phrase “deterministic fault” (with contributions from [6, 7, 8, 9]), should not be used when referring to a fault in a quantum circuit, we will show that this terminology is incorrect. It is the authors’ hope that the new types of faults defined here will be coined “quantum faults”, as is the case for the remainder of this paper.

Although it may seem as if testing quantum circuits is similar to testing reversible circuits, there is actually little specific similarity between the two. An in-depth study of quantum circuits leads one to understand that although quantum circuits are by definition reversible, the fundamental differences between the inner workings of quantum gates and the gates used in other implementations of reversible logic have a drastic impact on testing. For example, a study recently done in [13] noted that, “Each test vector covers exactly half of the possible faults, and each fault is covered by exactly half of the possible test vectors.” However, we found that a similar property of symmetry does not exist in quantum circuits. On the other hand, the theories used in testing classical logic circuits form the foundation for the new types of theories that we develop and present here, especially in [6, 7, 8, 9, 10, 11].

Most research to date (called Quantum error-correction [1, 2, 4, 5]) amounts to correcting a phase or Pauli rotation fault through error-correcting codes, “… [Errors] can be characterized by the application of a linear combination of the Pauli spin matrices…” [2]. In order to prevent quantum errors of this certain type, elegant codes (such as those mentioned in [1, 2, 3, 5, 6]), have been developed, surprisingly these codes ignore the idea of a global phase error [14]. Our approach involves testing for any type of quantum error that can be represented with a fault model. It is believed that the methods introduced in this work can also be used to help design quantum circuits that are more tolerant to random errors (fault tolerant quantum circuits), system errors [2], and the error of global phase [14,1].

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We organized this paper as follows: Section 2 addresses general issues related to diagnostic testing of quantum circuits. An overview of the different quantum fault models are presented, and contrasted with known classical properties, and the test set is discussed. In section 3 we present our algorithm in the most general form, creating a quantum fault table. We follow this with a discussion of the covering problem. Section 4

presents several decision diagrams representing localization trees, and then we conclude our work by discussing future plans for a CAD tool based on QuIDDpro [15]. The appendix contains a brief introduction to quantum circuits. (if the introduction to quantum circuits is not published with this document, it can be found online at: www.ece.pdx.edu/~biamonte ).

2. The problem of Testing a Quantum Circuit

Traditionally the Test Generation Problem is thought of as the generation of a sequence of tests, (test set) that when applied to a circuit and compared with the circuit’s output, will either verify that the circuit is correct or will determine that it contains one or more faults [6]. In other words, testing is the verification of functionality, and running the ideal test set amounts to complete system verification.

It is the typical case that certain single tests can verify the existence of a fault at multiple locations in a circuit at the same time, thus it is often the goal to choose the fewest tests possible needed to determine all possible errors. On the other hand, if a circuit was found not to pass a certain test, a method referred to commonly as fault diagnostics can be employed. Fault diagnostics amounts to finding a logical set of tests that will allow a circuit engineer to gain a better understanding as to why the circuit is malfunctioning. Fault localization is a method typically used in classical circuits that we adapted to quantum circuits. In the diagnostic method of fault localization a test set is developed that ideally will allow a circuit engineer to know the location and type of fault present in a circuit.

For the diagnostic method of fault localization there are typically two general methods used in classical circuits: (1) single-fault-model [16], and (2) the multiple-fault-model [16]. We address the single fault model in this paper, leaving the multiple-fault-model for latter discussion. The two most popular approaches to Fault Localization are (1) Preset Method and (2) Adaptive Tree Method [17]: In literature, both methods start from a fault table which has tests (input vectors) as rows and all possible faults as columns.1 The goal of the preset

method is to find a minimal test set to locate all the faults in the circuit. The minimal test set is found using an algorithm to solve the covering problem from a location table. The size of this table limits the applicability of this approach to relatively small problems. Therefore we concentrate here only on the Adaptive Tree Method [16], which dynamically solves the covering problem and generates a fault tree.

In this paper we do not address the issue of testing a quantum circuit that has as its function a certain expected probability of any number of basis states when read, instead we address only circuits that are supposed to function with the identical output when measured any number of times. To solve the problem of localizing faults in quantum circuits, we must perform several steps that will be explained in greater detail in the following sections: (1) calculate the ideal (expected) value of the circuit under test, (2) choose a fault model that best describes the error predicted to be present in a given circuit (In the most general case an arbitrary 2 x 2 matrix), (3) determine the locations in the circuit that the error is believed to be located in, (4) place the gate representing the fault model at each location in the circuit (from 3), and generate separate calculations for each placement, (5) generate fault table that contains a column for every fault inserted in the circuit, a row for every possible input vector to the circuit, and a cell that contains the output of the circuit under the conditions of the column,(6) apply the algorithm presented in section 4 to the fault table generating a decision diagram that contains instructions of how to localize faults present in the circuit, and (7) apply the test set (input) listed in the decision diagram to localize (where possible) and detect the faults present in an actual quantum circuit.

1 The quantum fault table has been extended dimensionally adding the output value measured from reading a circuit to the classical circuit.

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2.1. Selecting a Quantum Fault Model

In classical binary CMOS circuits a stuck-at fault model has been used successfully for the last 50 years. However, one must be very careful while adapting this model to a new technology. For instance for many years a fault model that rarely occurred in actual multi-valued CMOS circuits was a standard fault model used by many researchers until it was proven to actually occur more rarely than other faults. Most researchers developed very general methods, potentially applicable to arbitrary technology, (as those presented here), so their work was easily adapted. In classical binary CMOS circuits, the following fault models are in wide use today to test functionality and to perform diagnostic methods [6, 7, 11]:

Stuck-at faults Single stuck-at faults Multiple stuck-at faults

Stuck Open Faults Bridging Faults Delay Faults

In constructing a quantum fault model one must pay special attention to the historic lesson already learned from classical testing, since quantum computers are still in their beginning stages of development. Although we can say with no certainty what technological implementation of the first commercial quantum computer the future holds, we can say with certainty that this implementation will impact the fault model used. Although this is the first diagnostic method that adapts similar established theories of testability to quantum circuits, physicists have already in use what could be considered a fault model. Ample literature including [3, 4, 5] presents error-correcting codes, and these codes help the system recover from errors of phase-shift and rotations, and it is often mentioned [3, 4, 5, 1, 2] that Qubits can become entangled with the environment causing errors to occur[4, 5, 6, 2]. [18] Presents a study on the occurrence of non-unitary faults. The point here is to again mention that a need is already present for diagnostic methods such as this, and to give justification as to why we chose the fault model used in this paper. We believe the most general fault model is inserting 2 x 2 matrices as gates into quantum circuits. The removal of a unitary quantum gate can be modeled as placing the inverse gate next to the gate that is to be removed. Clearly, for a given gate G, provided G is unitary, the removal of G is simply the insertion of G†

directly after G such that, G†G=I. Formally for this work we selected all of the Pauli operators (for the

phase and rotation faults) and the Hadamard and π/8-Gate (for faults resulting from superposition and quantum effects).

With the gates from table 1 as our fault model we noticed some very interesting results that have no parallel in the classical theory of testability; we present these classically unparalleled results of testability:

LEMMA 1: Certain faults can always be present in a circuit yet never detectable.

PROF FOR LEMMA 1: Let us consider the case of a single Qubit, whose probability of being measured in basis state|0> or basis state |1> is left unchanged with a phase shift.

The Lie group SO(3), the group of rotations in three-dimensional space maps to U(2), the unitary group that represents all single Qubits. In addition, the Pauli matrices are a realization (and, in fact, the lowest-dimensional realization) of infinitesimal rotations in three-dimensional space.

In quantum mechanics, the Pauli matrices represent the generators of rotation acting on non-relativistic particles with spin 1/2. The state of the particles are represented as two-component Spinors, which is the fundamental representation of U(2) (the unitary group U(2), defines the current state of a Qubit, according to the first postulate of quantum mechanics[1,2]).

An interesting property of spin 1/2 particles is that they must be rotated by an angle of 4π in order to return to their original configuration. This is due to the fact that SU(2) and SO(3) are not globally isomorphic, even though their infinitesimal generators su(2) and so(3) are isomorphic. SU(2) is actually a "double cover" of SO(3), meaning that each element of SO(3) actually corresponds to two elements in SU(2).

Since SO(3) is the rotational group in R3, and we can map SO(3) to U(2), we are able to think of any unitary gate as a rotation about the Bloch sphere. In fact U(2) preserves all rotations from R3. From the group SO(3) it is clear that rotations (around for instance) do not change the distance between the certain planes or certain basis, these are unaffected by the rotation. If the measurement basis is chosen to be Eigen states |0> and |1> in U(2) than what we refer to as a phase shift is such

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a rotation that does not change the distance from a certain basis and therefore does not impact measurement..

More formally we assume that out Qubit exists in the state:

A simple example is clearer than the more general case, however both proofs are straightforward. Let us act on our Qubit with a phase shift (Pauli-Z):

Since , and , we preserve the fact that, and leave the probability amplitude unchanged. ◊

LEMMA 2: Certain faults can always be present in a circuit but only detectable a percentage of time when measured.

PROF FOR LEMMA 2: Let us state that the occurrence of a fault is deterministic, detection or measurement of the fault is probabilistic.

As example, suppose a Qubit enters an entangled state or a state of superposition, where one of the

states is the correct state and the other is erroneous. When a pure basis is read its value will depend on a certain probability of being the correct state, or the incorrect state.

More formally we assume that out Qubit exists in the state:

If we place our Qubit in a superposition by applying the Hadamard transform, such that:

If we measure from basis |0> and note that the ideal circuit has , in this case, we have1/2 as the probability of erroneous measure, if the fault is indeed present. ◊

Gates Inserted As faults:

Additional Gates used often in quantum circuits:

Hadamard (H), Pauli-X (X), Pauli-Y (Y), and Pauli-Z

(Z)

Feynman (F), Controlled square root of NOT(V) and controlled square root of NOT Hermitian gate(V+)

Table 1 – gates used for circuit construction and as fault models

2.2. The existence of complete test sets

The optimum test set will detect all possible faults that can be present in the device with the least number of test vectors; this is known as high defect coverage for both classical and quantum circuits [6]. In general when we perform a given test, we are attempting to determine to a certain degree of assurance whether or not a fault is present. For example, let us assume that we have defined a location in a theoretical quantum circuit as location X.

If we insert a fault at location X and perform a calculation telling us that the fault we inserted amounts to a bit flip when measured, then if we measured an actual circuit and find the binary output has been inverted (based on our model), we can say that we have determined that the fault exists at X (we have localized X). However, even in this simple case one can make no statements as to the

probability that a fault is present at location X in the circuit prior to running a given test. It is only running the test that allows us to make one of the following statements: (1) the fault is definitely not present at location X, or (2) the fault is definitely present at location X (since the probability of detection of a fault is 100%, if the fault is indeed present).

Now if we perform the same calculations for a fault at location X, and this time determine that the fault we inserted only occurs with a given probability denoted by P(x), prior to running any single test we can make no statement related to the occurrence of P(x). However, after running any number of tests we can say one of two things: (1) the fault is definitely present at location X, or (2) we are able to judge the probability of the assumption of the occurrence of the fault at location X based on passed experimental outcome. In other words, we

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are only able to judge our assumption to a given percentage, and this assumption never answers the

question of whether or not a fault is truly present in the quantum circuit.

3. Generation of the Quantum Fault Table In this section we describe the basic steps used in our algorithm to generate the quantum fault table. Quantum Fault table Construction begins with the selection of a circuit that has either been proven or suspected to not function correctly. *Fault diagnostics requires more time and tester memory, and is generally much slower and unnecessary if the simpler case of verification is all that is needed. (We refer the reader to [17] for in-depth information relating to testing quantum circuits without diagnostics).

The first step to generate a quantum fault table is to model the circuit in question and calculate the ideal result stored in the circuits Qubit memory register (state vector). This calculation is used to determine the probability of measuring each individual state for all possible input test vectors.

A decision must now be made defining all locations that the fault is thought to reside. We illustrate this by numbering locations in the circuit in Figure 1 (locations 1-9). After we number the locations of possible faults, we are free to insert any given fault model into any of the nine locations of the circuit. For all of the locations in the circuit where a fault is suspected to reside, the quantum circuits state matrix is recalculated, and we store the possible output as well as the probability of measurement in

a certain basis. It now becomes clear as to what input vector creates an outcome other than that expected from ideal calculations made in the first step. For example let us illustrate the principle just outlined with a simple example. Table 2 below illustrates a constructed fault table were a Pauli-X fault was inserted at location XN, where N corresponds to the location of the fault (locations 1-9 in circuit).

Figure 1 – The locations that the fault is suspected to reside

From these calculations the Pauli-X fault table directly follows: From the Pauli-X fault table it is clear to see that the input test vector is located as a column to the left, followed by the correct output of the circuit. In the top row the faults are also named, XN, where N is a number between 1 and 9 to signify the location in the circuit we inserted the fault.

Construct quantum fault table:

Select circuit to analyze Calculate ideal output value for all possible inputs and store in fault table Select all possible locations that the fault could reside Select fault model

For all locations in the circuit Insert fault model Calculate new output value after fault was inserted Record the measurement state probability in given cellEnd

Algorithm to construct fault table

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Input Correct

Output

X1 X2 X3 X4 , X5 X6 , X7

X8 , X9

|000>

|000> |100>

|100> |100>50%

|101>50%

|010>50%

|011>50%

|010>

|001>

|001>

|001> |101>

|101> |101>50%

|100>50%

|011>50%

|010>50%

|011>

|000>

|010>

|010> |111>

|111>50%

|110>50%

|111>50%

|110>50%

|000>50%

|001>50%

|000>

|011>

|011>

|011> |110>

|110>50%

|111>50%

|110>50%

|111>50%

|001>50%

|000>50%

|001>

|010>

|100>

|100> |000>

|000> |000>50%

|001>50%

|110>50%

|111>50%

|110>

|101>

|101>

|101> |001>

|001> |001>50%

|000>50%

|111>50%

|110>50%

|111>

|100>

|110>

|111> |010>

|010>50%

|011>50%

|010>50%

|011>50%

|101>50%

|100>50%

|101>

|110>

|111>

|110> |011>

|011>50%

|010>50%

|011>50%

|010>50%

|100>50%

|101>50%

|100>

|111>

Table 2 – Pauli-X fault table Equation 1 –Pauli-X inserted at location 2 from figure 1. Note: j is a complex number.

3.1. The Quantum Covering ProblemThe general theory behind fault localization is that if we know the expected output of a circuit, we insert a fault at some location in the quantum circuit and note the changes of outputs between this new faulty circuit and the expected correct circuit. If we then run a test on a real circuit and find the same output as in the faulty case that we calculated, then by our method we determined that the same fault as we inserted into our theoretical circuit for calculations is (or was) present in the actual circuit. Let us examine the fault table from our last example to further this point.

From the fault tables presented in section 3, it is clear that many of the faults are detectable. Our algorithm is a very simple greedy algorithm that relies on our ability to perform some simple metrics on the table. In table 3 we see the Pauli-X table with some added metrics, all of which are explained in the table.

(Let’s assume we are only using locations 1 and 2, for possible fault locations from figure 1) We will examine a particular case by pointing out X1 having a different output than the correct output for all possible input test vectors (|000> through |111>). If we supply input |000> and get output |100> we know that we have either fault X1, X2. To localize between X1 and X2 we can supply an input of |010> multiple times. If at any iteration of supplying input |010> we read |110> as output we know that X2 exists and not X1 (note we are using the single fault model).

However, if we continue to measure |111> as output when the state of the system is projected onto basis |010> we can ascertain a certain level of percentage that X1 is present and not X2. For example, if we input |010> 10 times and measure |111> each time as output we know that if X2 was in fact present, the circuit would behave in this manor 100 x (1/2)10 percent of the time ( ).

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In the first stage of the algorithm we attempt to split the tree to give it the most breadth using a greedy algorithm. After the tree is split each node of the tree can either be a terminal node, where no more iterations can be applied to localize between further faults, or otherwise. In the later case, a subsection of the fault table is analyzed, and the test vector that has the minimum overlap between all of the faults still present in the node is selected. This is best illustrated with the outline of our algorithm as shown at the end of this section:

The goal of our algorithm is simply to localize between faults, however, in many cases there exists several test vectors that are equivalent to each other, such that we cannot localize between them.

Create Tree:{ examine metrics on each test select test with highest number of unique entries and lowest number of multiple entries create nodes corresponding to each possible output For all nodes: NodeItterator( all nodes ): if node is terminal node return find optimum disjoint set corresponding to node construct new nodes for all each node constructed call NodeItterator}Greedy Algorithm to solve quantum covering problem

Pauli-XX1 X2 X3 X4 , X5 X6, X7 X8, X9

UniqueEntries:

(Number – P)

OverlappingEntries:

(Number – cover (P))

UniqueCorrect Output:Y/N – (P)

Input CorrectOutput

|000>

|000> |100> |100> |100>50%|101>50%

|010>50%|011>50%

|010> |001> 1 – 12 – 0.5

1 – 3 (1,1,0.5) 1 – 2 (0.5,1)

Y

|001>

|001> |101> |101> |101>50%|100>50%

|011>50%|010>50%

|011> |000> 1 – 12 – 0.5

1 – 3 (1,1,0.5)1 – 2 (0.5,1)

Y

|010>

|010> |111> |111>50%|110>50%

|111>50%|110>50%

|000>50%|001>50%

|000> |011> 1 – 1 1 – 0.5

1 – 3 (1,0.5,0.5)2 – 2 (0.5,0.5)

(0.5,1)

Y

|011>

|011> |110> |110>50%|111>50%

|110>50%|111>50%

|001>50%|000>50%

|001> |010> 1 – 1 1 – 0.5

1 – 3 (1,0.5,0.5)2 – 2 (0.5,0.5)

(0.5,1)

Y

|100>

|100> |000> |000> |000>50%|001>50%

|110>50%|111>50%

|110> |101> 1 – 1 2 – 0.5

1 – 3 (1,1,0.5)1 – 2 (0.5,1)

Y

|101>

|101> |001> |001> |001>50%|000>50%

|111>50%|110>50%

|111> |100> 1 – 1 2 – 0.5

1 – 3 (1,1,0.5)1 – 2 (0.5,1)

Y

|110>

|111> |010> |010>50%|011>50%

|010>50%|011>50%

|101>50%|100>50%

|101> |110> 1 – 1 1 – 0.5

1 – 3 (1,0.5,0.5)2 – 2 (0.5,0.5)

(0.5,1)

Y

|111>

|110> |011> |011>50%|010>50%

|011>50%|010>50%

|100>50%|101>50%

|100> |111> 1 – 1 1 – 0.5

1 – 3 (1,0.5,0.5)2 – 2 (0.5,0.5)

(0.5,1)

Y

Table 3 – Fault table for Pauli-Y fault inserted as depicted in Figure 1

Explanation of Table-3: The Unique entries column is given by the number of unique entries followed by a dash and then the probability of detection for a given fault, if actually present. The overlapping entries column is a metric relating the number of entries that are not correct and not unique (this means you can not localize between them generally for a corresponding test vector). The number of over lap is followed by a dash, then the number of entries that overlap is given, and following in brackets are the probabilities for all given overlapping entries.

4. Localization of FaultsA solution to the covering problems leads its self directly to the construction of trees, a graphical simplification used to illustrate exactly the test to run and the steps to take provided a given output, and to localize between faults.

Explanation of Figure 2: Figure 2 is a tree created from inserting the Pauli-Z fault as depicted in Figure 1. From this tree it is clear that the input to

the circuit is inside the node, and the numbers on the edges are the output of the circuit, for a given branching condition. For example, if we supply as input to the circuit a test vector of |010>, and have as output 011 we know that a Pauli-Z fault is present at location 8 (from figure 1). However, if we measure as output 010, we can have any number of faults or a good circuit, and it is not until we run

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another test (|100>) can we localize between all detectable faults and that of a good circuit.

|010>

Z8 |100>

Z(1-7)? Z9

011 010

101else

Figure 2 – (Tree to localize between Pauli-Z faults for circuit in question)

Pauli-ZZ1-Z7

(Same as correct output)

Z8 Z9Input CorrectOutput

|000> |000> |000> |000> |000>|001> |001> |001> |001> |001>|010> |010> |010> |011> |010>|011> |011> |011> |010> |011>|100> |100> |100> |100> |101>|101> |101> |101> |101> |100>|110> |111> |111> |110> |110>|111> |110> |110> |111> |111>Table 4 – Fault table for Pauli-Z fault inserted

as depicted in figure 1

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4.1. Fault TreesThe quantum-covering problem is different than in the classical case as result of the introduction of positive fractions inserted into the fault table. This section presents trees generated from the algorithm presented in section 3. The input of the circuit is shown in the center of each node, as is the terminal indication, where a fault can be localized no further.

The output branching condition is drawn on each edge. All nodes with feed back edges correspond to iterative testing, where one has to run a given test any number of times before past outcome will allow one to make a judgment as to whether or not a fault is present, with a given probability of assurance.

|000>

X8,X9

|100> |000>

X3 X4,X5

|010>

100

110

111

101

001

000

011

001

010

010

011

X1,X2,X3

X2,X3 (X4,X5),(X6,X7)

Pauli-X (Tree to localize between Pauli-X faults)

(Note, the edges that loop back illustrate iterative testing where probabilities are involved in the determination of a given fault)

|110>

|110>

H3

|110>

H4,H5

010

111010

011

011110

111101100

100

H1,H3

H2

|101>

H8

111

000001

H8,H9

101

101

100

(H4,H5),(H6,H7)

Hadamard(Tree to localize between Hadamard faults)

HadamardH1 H2 H3 H4 , H5 H6 , H7 H8 H9

Input CorrectOutput

|000> |000> |000>50%|100>50%

|000>50%|110>25%|111>25%

|000>50%|100>25%|101>25%

|000>50%|010>25%|011>25%

|000>50%|010>50%

|000>50%|001>50%

|000>50%|001>50%

|001> |001> |001>50%|101>50%

|001>50%|110>25%|111>25%

|001>50%|100>25%|101>25%

|001>50%|010>25%|011>25%

|001>50%|011>50%

|001>50%|000>50%

|001>50%|000>50%

|010> |010> |010>50%|111>50%

|010>50%|100>25%|101>25%

|010>50%|111>25%|110>25%

|010>50%|000>25%|001>25%

|010>50%|000>50%

|011> |010>50%|011>50%

|011> |011> |011>50%|110>50%

|011>50%|100>25%|101>25%

|011>50%|110>25%|111>25%

|011>50%|001>25%|000>25%

|011>50%|001>50%

|010> |011>50%|010>50%

|100> |100> |100>50%|000>50%

|100>50%|010>25%|011>25%

|100>50%|000>25%|001>25%

|100>50%|110>25%|111>25%

|100>50%|110>50%

|100>50%|101>50%

|101>

|101> |101> |101>50%|001>50%

|101>50%|010>25%|011>25%

|101>50%|001>25%|000>25%

|101>50%|111>25%|110>25%

|101>50%|111>50%

|101>50%|100>50%

|100>

|110> |111> |111>50%|010>50%

|111>50%|000>25%|001>25%

|111>50%|010>25%|011>25%

|111>50%|101>25%|100>25%

|111>50%|101>50%

|110> |110>

|111> |110> |110>50%|011>50%

|110>50%|000>25%|001>25%

|110>50%|011>25%|010>25%

|110>50%|100>25%|101>25%

|110>50%|100>50%

|111> |111>

Hadamard Fault Table

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4.2. Testing CAD Tool and Simulations – Q-FaultThe simulations in this work were done on QuIDDpro [15]. The end result of this work is a functional software package that verifies all results contained in this paper, as a plug in to QuIDDpro. However, the algorithm presented here can be applied by hand and is completely ready to be used.

The author is willing to construct test trees for circuits provided by our readers. The binary executable as well as the source code will not be made available, due to our license agreement with the University of Michigan.

5. ConclusionIn this paper we presented a solution to the open problem of quantum fault diagnostics. The authors (Perkowski, Biamonte) founded this area of study with their introductory work in [12]. This work was a finalized continuation of [12], and marks the first useful diagnostic method available for actual quantum computers other than the exhaustive approach.

In this work we defined the quantum fault model. Fault models are always very technology dependent, and our future work will result in the development of a working software package to perform the algorithm automatically, using technology dependent fault models.We feel that the elegance of this method is its simplicity and hope that the usefulness of what is presented here will somehow stand apart from the common approach of error correcting codes, that are however less general then the presented approach. This work is by no means the optimal

solution, since the covering problem is well known to be NP. However, the algorithm presented has good heuristics and solves the problem completely, just not optimally.

In closing, we would like to say that this is a very deep area of study, and now that one solution exists and the problem of fault diagnostics is no longer what can be thought of as an open problem, we are sure many solutions will soon be discovered.

6. Acknowledgements A preliminary version of this paper was presented at the INQ research conference, Portland Oregon, May 2004, with John Buell as a coauthor.

We would like to thank George Viamontes for providing us QuIDDPro beta version 1.1.1, the world’s fastest quantum simulation tool that he is developing for his PhD thesis at the University of Michigan [15].

This work was supported by Ronald E. McNair Post baccalaureate Achievement Program of Portland State University. The views and conclusions contained herein are those of the authors and should not be interpreted as necessarily representing official policies of endorsements, either expressed or implied, of the Ronald E. McNair Post baccalaureate Achievement Program of Portland State University, or Portland State University. ◊

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7. Work Cited1. M. Nielsen, I. Chuang, “Quantum Computing and Quantum Information”, Cambridge University

Press, 20002. C. Williams, S. Clearwater, “Explorations in Quantum Computing”, Springer Press, 19973. Ashikhmin, A., Barg, A., Knill, E., and Litsyn, S. Quantum error detection I: Statement of the

problem. IEEE Trans. Inf. Theory, to appear, 1999. arXiv, quant-ph/9906126.4. Ashikhmin, A., Barg, A., Knill, E., and Litsyn, S. Quantum error detection II: Bounds. IEEE

Trans. Inf. Theory, to appear, 1999. arXiv, quant-ph/9906131.5. Bennett, C. H., DiVincenzo, D. P., Smolin, J. A., and Wootters, W. K. Mixed state entanglement

and quantum error-correcting codes. Phys. Rev. A, 54:3824, 1996. arXiv, quant-ph/9604024.6. C. Landrault, Translated by M. A. Perkowski, “Test and Design For Test”

http://www.ee.pdx.edu/~mperkows/CLASS_TEST_99/inx.html7. S. Reddy, “Easily Testable Realizations for Logic Functions”. 1972,8. T. Sasao, “Easily Testable Realizations for Generalized Reed-Muller Expressions”, 19979. E. McCluskey and Ch-W. Tseng, ``Stuck-Fault Tests vs. Actual Defects.''10. R. Butler, B. Keller, S.Paliwal, R. Schooner, J.Swenton, ``Design and Implementation of a Parallel

Automatic Test Pattern Generation Algorithm with Low Test Vector Count ''.11. A.M. Brosa and J. Figueras, ``Digital Signature Proposal for Mixed-Signal Circuits''.12. S. Aligala, S. Ratakonda, K. Narayan, K. Nagarajan, M. Lukac, J. Biamonte and M. Perkowski,

Deterministic and Probabilistic Test Generation for Binary and Ternary Quantum Circuits, Proceedings of ULSI 2004 symposium, Toronto, Canada, in May

13. K. Patel, J. Hayes, I. Markov, Fault Testing for Reversible Circuits, to appear in IEEE Trans. on CAD, quant-ph/0404003

14. S. Kak, The Initialization Problem in Quantum Computing, Foundations of Physics, vol 29, pp. 267-279, 1999

15. G. Viamontes, I. Markov, J. Hayes, Improving Gate-Level Simulation of Quantum Circuits, Quantum Information Processing, vol. 2(5), pp. 347-380, October 2003, quant-ph/0309060

16. K. Ramasamy, R. Tagare, E. Perkins and M. Perkowski, Fault localization in reversible circuits is easier than for classical circuits, IWLS proceedings, 2003

17. Z. Kohavi, Switching and Finite Automata Theory, McGraw Hill, 197818. S. Bettelli, Quantitative model for the effective decoherence of a quantum computer with

imperfect unitary operations , Physical Review A 69,042310 (2004) (14 pages)  19. J. Biamonte, J. Allan, M. Lukac, M. Perkwoski, Principles of Quantum Fault Detection, to be

submitted to IEEE Transactions on Computing 2004

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8. Appendix 1: MetricsHadamard Pauli-Z Pauli-Y Pauli-X

Input UniqueEntries:

(Number – P)

OverlappingEntries:

UniqueCorrectOutput:

UniqueEntries:

OverlappingEntries:

UniqueCorrectOutput:

UniqueEntries:

(Number – P)

OverlappingEntries:

(Number – cover (P))

UniqueCorrectOutput:

Y/N – (P)

UniqueEntries:

(Number – P)

OverlappingEntries:

(Number – cover (P))

UniqueCorrectOutput:Y/N –

(P)|000> 4 – 0.25 1 – 8 (1,0.5 ,0.5,0.5,

0.5,0.5,0.5,0.5)2 – 2 (0.5,0.25)(0.25,0.5)

(0.5,0.5)

N –(1,1,0.5,0.5,

0.5,0.5,0.5,0.5)

0 1 – 10 (1,1,1,1,1,1,1,1,1,1)

N – (1,1,1,1,1,1,1,1,1,1)

1 – 12 – 0.5

3 – 2 (1,0.5)(0.5,1)(1,1)

Y 1 – 12 – 0.5

1 – 3 (1,1,0.5)1 – 2 (0.5,1)

Y

|001> 4 – 0.25 1 – 8 (1,1,0.5,0.5,0.5,0.5,0.5,0.5)

3 – 2 (0.5,0.25)(0.25,0.5)(0.5,0.5)

N 0 1 – 10 (1,1,1,1,1,1,1,1,1,1)

N – (1,1,1,1,1,1,1,1,1,1)

1 – 12 – 0.5

3 – 2 (1,0.5)(0.5,1)(1,1)

Y 1 – 12 – 0.5

1 – 3 (1,1,0.5)1 – 2 (0.5,1)

Y

|010> 4 – 0.25 1 – 7 (1, 0.5, 0.5, 0.5, 0.5, 0.5, 0.5)

3 – 2 (0.5, 0.25)(0.25,0.5)(1,0.5)

N 1 – 1 1 – 9 (1,1,1,1,1,1,1,1,1) N – (1,1,1,1,1,1,1,1,1) 1 – 12 – 0.5

3 – 2 (1,1)(1,0.5)(0.5,1)

N – (1,1) 1 – 11 – 0.5

1 – 3 (1,0.5,0.5)2 – 2 (0.5,0.5)

(0.5,1)

Y

|011> 4 – 0.25 1 – 7 (1, 0.5, 0.5, 0.5, 0.5, 0.5, 0.5)

3 – 2 (0.5, 0.25)(0.25,0.5)(1,0.5)

N 1 – 1 1 – 9 (1,1,1,1,1,1,1,1,1) N – (1,1,1,1,1,1,1,1,1) 1 – 12 – 0.5

3 – 2 (1,1)(1,0.5)(0.5,1)

N – (1,1) 1 – 11 – 0.5

1 – 3 (1,0.5,0.5)2 – 2 (0.5,0.5)

(0.5,1)

Y

|100> 4 – 0.25 1 – 7 (1, 0.5, 0.5, 0.5, 0.5, 0.5, 0.5)

3 – 2 (0.5, 0.25)(0.25,0.5)(1,0.5)

N 1 – 1 1 – 9 (1,1,1,1,1,1,1,1,1) N – (1,1,1,1,1,1,1,1,1) 1 – 12 – 0.5

3 – 2 (1,1)(1,0.5)(0.5,1)

N – (1,1) 1 – 12 – 0.5

1 – 3 (1,1,0.5)1 – 2 (0.5,1)

Y

|101> 4 – 0.25 1 – 7 (1, 0.5, 0.5, 0.5, 0.5, 0.5, 0.5)

3 – 2 (0.5, 0.25)(0.25,0.5)(1,0.5)

N 1 – 1 1 – 9 (1,1,1,1,1,1,1,1,1) N – (1,1,1,1,1,1,1,1,1) 1 – 12 – 0.5

3 – 2 (1,1)(1,0.5)(0.5,1)

N – (1,1) 1 – 12 – 0.5

1 – 3 (1,1,0.5)1 – 2 (0.5,1)

Y

|110> 4 – 0.25 1 – 6 (1, 0.5, 0.5, 0.5, 0.5, 0.5)3 – 2 (0.5, 0.25)(0.25,0.5)

(1,1)

N 0 1 – 10 (1,1,1,1,1,1,1,1,1,1)

N – (1,1,1,1,1,1,1,1,1,1)

1 – 12 – 0.5

1 – 3 (1,1,1)2 – 2 (1,0.5)(0.5,1)

N – (1,1,1)

1 – 11 – 0.5

1 – 3 (1,0.5,0.5)2 – 2 (0.5,0.5)

(0.5,1)

Y

|111> 4 – 0.25 1 – 6 (1, 0.5, 0.5, 0.5, 0.5, 0.5)3 – 2 (0.5, 0.25)(0.25,0.5)

(1,1)

N 0 1 – 8 (1,1,1,1,1,1,1,1)1 – 2 (1,1)

N – (1,1,1,1,1,1,1,1) 1 – 12 – 0.5

1 – 3 (1,1,1)2 – 2 (1,0.5)(0.5,1)

N – (1,1,1)

1 – 11 – 0.5

1 – 3 (1,0.5,0.5)2 – 2 (0.5,0.5)

(0.5,1)

Y

The above table shows the metrics calculated on each of the faults inserted into the circuit (Locations 1-9, Figure 1, Faults: Pauli-X, Pauli-Y, Pauli-Z, Hadamard)