Part 2 Current State-of-the-Art For Commercial ‘Micro’-Electronic Device Production Silicon Technology and Next Generation Lithography.

Part 2

Current State-of-the-ArtFor Commercial

‘Micro’-Electronic Device Production

Silicon Technology

and Next Generation Lithography

Overview of Part 2

Properties of SiliconStructureDoping

Overview of the Fabrication of a Silicon Based Device

Photolithography

Next Generation Lithographies?

Learning Objectives

By the end of this part of the course you should understand

(i) n- and p-type doping,

(ii) The overview of photolithography,

(iii) The terms positive and negative tone resists,

(iv) Have an appreciation for some o f the limits of photolithography,

(v) Have an appreciation for how these limits are being ‘stretched’,

(vi) Moore’s Law, and

(vii) That there are several competing next generation lithographic

processes.

Silicon is a crystallinematerial,

Properties of Silicon Semiconductor

with a tetra-hedral unit cell.

Silicon has two types of charge carriers - electrons and holes. The carrier concentration can be controlled by doping, or electrostatically.

Each silicon atom has 10 core electrons (tightly bound), and 4 valence electrons (loosely bound).


For simplicity we can consider a flattened model structure

At room temperature there are ~1 x 1010 cm-3 free carriers (out of ~2 x 1023 cm-3)

Holes and electrons can move around the lattice, or recombine to form a complete bond.

Due to thermal effects some bonds are broken, giving mobile holes and electrons. + -

Properties of Silicon SemiconductorDonor dopants increase the number of conduction electrons

P+

A donor atom, such as phosphorus, has five valence electrons, four of which participate in bonding, leaving one extra electron that is easily released for conduction. The donorsite becomes positively charged (fixed charge).

Silicon doped with a donor is called n-type.


Acceptor dopants increase the number of holes in the lattice

Silicon doped with an acceptor is called p-type.

An acceptor atom, such as boron, has three valence electrons, and can therefore easily accept an electron from a neighbour, leaving a free hole. The dopant has a fixed negative charge.

B-


Overall doping depends on the relative number of acceptors and donors.

Silicon doped with donor and acceptor atoms is called Counter Doped, and can have multiple separate regions of n- and p-type conductivity

B- B-

P+


The carriers distribution is also affected by electric fields

Between collisions with the lattice the carriers are accelerated in the direction of the electrostatic field.

B-

E

Combining the effects of doping and fields on the carrier concentration and distribution, we can realise useful devices.

Fabrication of a Device (MOSFET)

Silicon devices are built up in a series of layers, using processes such as photo-lithography, etching and doping. Oxide layer is grown on n-type silicon by heating to around 1000˚C in oxygen or steam.

A light sensitive resist is coated on the Si, and exposed to a light pattern. The exposed resist is developed in a solvent

The unexposed areas of resist are used as a mask to protect areas of the wafer from plasma etching, dopant implantation, or metal coating.


B+ B+ B+ B+ B+ B+ B+ B+ B+ B+

A Metal-Oxide-Semiconductor Field Effect Transistor is a fairly simple device, but still requires four separate lithography steps. The lithographic step is probably the most important in microfabrication. Modern chips frequently require 30 to 50 layers (each with multiple process steps)

GateMetal

Contact

SiliconOxide

Silicon

Doped Silicon


Silicon devices are built up in a series of layers, using processes such as photo-lithography, etching and doping.

An oxide layer is grown on n-type silicon by heating to around 1000˚C in oxygen or steam.


Light sensitive material, known as resist, is spin coated onto the surface

Light is projected through a patterned mask onto the resist.

A developing solvent is then used to remove the exposed resist.


The sample is etched with plasma or acids to remove the exposed oxide.

A 50 nm Gate Oxide layer is thermally grown.

The resist pattern is removed with chemical stripper or oxygen plasma


A 50 nm layer of poly-silicon is made by chemical vapour deposition.Another resist pattern is defined, and developed.

The pattern is transferred through both the poly-silicon and the gate oxide by etching, and the resist is stripped.


Boron dopant atoms are ion implanted,

B+ B+ B+ B+ B+ B+ B+ B+ B+ B+

and then driven in by heating to 950˚C in oxygen

Yet another photolitho-graphy, etch and resist strip step is used, to create contact cuts in the oxide layer

Contact Cuts


B+ B+ B+ B+ B+ B+ B+ B+ B+ B+Aluminium is evaporated on to the surface.

And one last patterning, and etching step to afford a MOSFET (metal-oxide-semiconductor field effect transistor)

It took four separate lithography steps to realise this fairly simple device. The lithographic step is probably the most important in microfabrication. Modern chips frequently require 30 to 50 layers (each with multiple process steps)

Photolithography

Energy - causes (photo)chemical reactions that modify resist dissolution rate

Mask - blocks energy transmission to some areas of the resist

Aligner- aligns mask to previously exposed layers of the overall design

Resist - records the masked pattern of energy

Energy

Mask + Aligner

PhotoresistWafer

The Resist

The first step is to coat the Si/SiO2 wafer with a film of a light sensitive material, called a resist.

A resist must also be capable of high fidelity recording of the pattern (resolution) and durable enough to survive later process steps

Solvent Evaporates

RPM

The Resist

Positive tone resists are generally polymers which are prone to bond breaking on irradiation

h

After scission of the polymer chain, the fragments have increased solubility in suitable solvents.

The Resist

Negative tone resists are generally polymers which are prone to crosslinking on irradiation

h

After crosslinking of the polymer chain, the fragments have decreased solubility in suitable solvents

Optical Limits

When light interacts with features with dimensions similar to the wavelength, diffraction effects must be allowed for.

2006

193 nm radiation

Gate length 65 nm

So how are structure created with less than the wavelength of the radiation?

Commercial State-of-the-ArtFor Photolithography

65 nmgate

30 nm

Immersion Photolithography

Immersion lithography extends 193 nm optical lithography to even smaller resolutions, by increasing the refractive index through which the light passes.

Wave Front EngineeringCorrecting for and Utilising Diffraction

Optical Proximity Correction: The shape of the mask is varied to take advantage of constructive

interference

Phase Shift Mask: The phase of the light of adjacent patterns is altered by 180˚ leading to destructive interference

Moore’s Law: Computer performance doubles every 18 months.

Drivers for MiniaturizationWhy do we care about resolution so much?

The current 45 nm and 30 nm gate length processes are

being developed

Next Generation Lithography is also being developed for

if/when conventional process no longer work

Next Generation LithographyIn 1996, five technology options were proposed for the 130 nm gate length technology:

•X-ray proximity Lithography (XPL)

•Extreme Ultraviolet (EUV)

•Electron Projection Lithography (EPL)

•Ion Projection Lithography (IPL)

•Direct-write lithographies (EBDW).

These options were referred to as the next generation lithographies.

Next Generation Lithography

The current forerunners are

Immersion Photolithography, Extreme Ultraviolet Lithography (EUV), and

Electron Beam Lithography (EBL).

Immersion Photolithography

Advantages of Immersion: We can keep using the 193 nm sources

Disadvantages of Immersion:Contamination of the Resist by Immersion LiquidCouple of Wafer/Lens VibrationsCavitation in the Immersion Liquid

BubbleImmersion Liquid

Lens

Wafer

Scan Direction

Energy Sources

Energy Sources are required to modify the resist.

An aerial image of the energy source is produced at the resist.

The imaging can be done by scanning or masking the energy beam.

Energy Source

Wavelength (nm)

UV 365 - 400

DUV 157 - 308

EUV 13

X-ray 0.5

Electrons0.062

Ions 0.012

Lower the wavelength, higher the energy…

Extreme Ultraviolet (EUV)

Extreme Ultraviolet refers to photons with a wavelength that is in the region of 10 nm.

This is absorbed by air so the light path is kept under vacuum. Furthermore there are no known materials that transmit EUV, so reflective optics are used instead of lenses.

EUV is theoretically capable of very high resolution (30 nm) given the short wavelength,

Dip Pen LithographyAn ultra high resolution fountain pen!

Nanocontact printing

Atomic Manipulation

Moving atoms with the STM

Conclusions

Photolithography is ‘struggling’ to keep up with resolution demands

There is currently no clear successor to photolithography

However, it is already possible to manipulate structures on every size scale down to atomic.

As the size becomes smaller though, the manufacturing speed drops dramatically.

What We Will Look at…

Radiative Processes

E-beam Lithography

Scanning Near Field Photolithography

Soft Lithography

Dip-Pen Nanolithography

Nano-Contact Printing

Thanks

Dr Alex Robinson

Nanoscale Physics Research LaboratoryUniversity of Birmingham

www.nprl.bham.ac.uk

For allowing the use of his slides.

Part 2 Current State-of-the-Art For Commercial ‘Micro’-Electronic Device Production Silicon Technology and Next Generation Lithography.

Documents

silicon atom

lattice silicon

ntype silicon

p p slide

ptype doping

ptype conductivity bb

device mosfet silicon

valence electrons