OS

Operating Systems

UTTAM K. ROY

Dept. of Information Technology,

Jadavpur University, Kolkata

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2Operating Systems

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• Silberschatz Galvin, “Operating System Concepts”, Addison Wesley publication

• Andrew S. Tanenbaum, “Operating Systems”

• William Stallings, “Operating Systems”, Prentice-Hall India

BooksBooks

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Computer-system operationOne or more CPUs, device controllers connect through common bus providing access to shared memoryConcurrent execution of CPUs and devices competing for memory cycles

Operating System OrganizationOperating System Organization

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Components of a Computer SystemComponents of a Computer System

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A computer system consists ofhardwaresystem programsapplication programs

Components (Cont.)Components (Cont.)

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Computer system componentsHardware – provides basic computing resources

• CPU, memory, I/O devices

Operating system• Controls and coordinates use of hardware among

various applications and users

Application programs • Define the ways in which the system resources are

used to solve the computing problems of the users

• Word processors, compilers, web browsers, database systems, video games

Users• People, machines, other computers

Components (Cont.)Components (Cont.)

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A program that acts as an intermediary between a user of a computer and the computer hardware.

Operating system goals:Execute user programs and make solving user problems easier.Make the computer system convenient to use.

Purpose:Use the computer hardware in an efficient manner.

What is an Operating System?What is an Operating System?

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Process ManagementThe creation and deletion of both user and system processThe suspension and resumption of processThe provision of mechanisms for process synchronizationThe provision of mechanism for deadlock handling

Main Memory ManagementKeep track of which parts of memory are being used and by whomDecide which processes are to be loaded into the memory when memory space becomes availableAllocates and deallocates memory as and when needed

Operating System Functions?Operating System Functions?

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File ManagementCreation and deletion of filesCreation and deletion of directoriesThe support of primitives for manipulating files and directoriesThe mapping of files onto secondary storageThe backup of files on stable(non-volatile) storage media

I/O System Management

A memory management component including buffering, caching and spooling

A general device driver interface

Drivers for specific hardware interface


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Secondary Storage Management

Free space managementStorage allocationDisk Scheduling

Networking

Communication task

Command Interpreter System

Command line interpreter


Process Management

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Process ManagementProcess Management

Process ManagementCreating and deleting both user and system processesSuspending and resuming processesProviding mechanisms for process synchronizationProviding mechanisms for process communicationProviding mechanisms for deadlock handling

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A process is a program in execution.

It is a unit of work within the system.

Program is a passive entity, process is an active entity.

Process needs resources to accomplish its taskCPU, memory, I/O, filesInitialization data

Process termination requires reclaim of any reusable resources

Process-Basic ConceptProcess-Basic Concept

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Single-threaded process has one program counter specifying location of next instruction to execute

Process executes instructions sequentially, one at a time, until completion

Multi-threaded process has one program counter per thread

Typically system has many processes, some user, some operating system running concurrently on one or more CPUs

Concurrency by multiplexing the CPUs among the processes / threads

Process—Basic ConceptProcess—Basic Concept

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Process States Process States

Possible process states

running—Instructions are being executedBlocked—Process is waiting for some event to occurReady—The process in waiting to be assigned to a processor

Transitions between states shown

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Process Control Block(PCB)Process Control Block(PCB)

Fields of a Process Control Block entry

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Scheduling—Basic ConceptScheduling—Basic Concept

Three level scheduling

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Process SchedulingProcess Scheduling Multiprogramming needed for efficiency

Single user cannot keep CPU and I/O devices busy at all timesMultiprogramming organizes jobs (code and data) so CPU always has one to executeA subset of total jobs in system is kept in memoryOne job selected and run via job schedulingWhen it has to wait (for I/O for example), OS switches to another job

Context Switch

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Process SchedulingProcess Scheduling Timesharing (multitasking) is logical extension in which

CPU switches jobs so frequently that users can interact with each job while it is running, creating interactive computing

Response time should be small enoughEach user has at least one program executing in memory processIf several jobs ready to run at the same time CPU schedulingIf processes don’t fit in memory, swapping moves them in and out to runVirtual memory allows execution of processes not completely in memory

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Basic ConceptMaximum CPU utilization obtained with multiprogramming

CPU–I/O Burst Cycle – Process execution consists of a cycle of CPU execution and I/O wait

CPU burst distribution

CPU SchedulingCPU Scheduling

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SchedulingScheduling

Bursts of CPU usage alternate with periods of I/O waita CPU-bound processan I/O bound process

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Histogram of CPU Burst TimeHistogram of CPU Burst Time

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Selects from among the processes in memory that are ready to execute, and allocates the CPU to one of them

CPU scheduling decisions may take place when a process:1. Switches from running to waiting state2. Switches from running to ready state3. Switches from waiting to ready4. Terminates

Scheduling under 1 and 4 is nonpreemptive

All other scheduling is preemptive

CPU SchedulerCPU Scheduler

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Dispatcher module gives control of the CPU to the process selected by the short-term scheduler; this involves:

switching contextswitching to user modejumping to the proper location in the user program to restart that program

Dispatch latency – time it takes for the dispatcher to stop one process and start another running

DispatcherDispatcher

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CPU utilization

keep the CPU as busy as possible Throughput

# of processes that complete their execution per time unit Turnaround time

amount of time to execute a particular process Waiting time

amount of time a process has been waiting in the ready queue Response time

amount of time it takes from when a request was submitted until the first response is produced, not output (for time-sharing environment)

Scheduling CriteriaScheduling Criteria

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Scheduling Algorithm GoalsScheduling Algorithm Goals

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Process Burst Time

P1 24

P2 3

P3 3

Suppose that the processes arrive in the order: P1 , P2 , P3

The Gantt Chart for the schedule is:

P1 P2 P3

24 27 300

First Come First Serve(FCFS) SchedulingFirst Come First Serve(FCFS) Scheduling

Waiting time for P1 = 0; P2 = 24; P3 = 27

Average waiting time: (0 + 24 + 27)/3 = 17

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Suppose that the processes arrive in the order

P2 , P3 , P1 The Gantt chart for the schedule is:

Waiting time for P1 = 6; P2 = 0; P3 = 3 Average waiting time: (6 + 0 + 3)/3 = 3 Much better than previous case Convoy effect short process behind long process

P1P3P2

63 300

FCFS Scheduling (Cont.)FCFS Scheduling (Cont.)

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29Operating Systems

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Associate with each process the length of its next CPU burst. Use these lengths to schedule the process with the shortest time

Two schemes: nonpreemptive – once CPU given to the process it cannot be preempted until completes its CPU burstpreemptive – if a new process arrives with CPU burst length less than remaining time of current executing process, preempt. This scheme is know as the Shortest-Remaining-Time-First (SRTF)

SJF is optimal – gives minimum average waiting time for a given set of processes

Shortest Job First(SJF) SchedulingShortest Job First(SJF) Scheduling

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ProcessArrival Time Burst Time

P1 0.0 7

P2 2.0 4

P3 4.0 1

P4 5.0 4

SJF (non-preemptive)

Average waiting time = (0 + 6 + 3 + 7)/4 = 4

P1 P3 P2

73 160

P4

8 12

Example of Non-preemptive SJFExample of Non-preemptive SJF

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Process Arrival Time Burst Time

P1 0.0 7

P2 2.0 4

P3 4.0 1

P4 5.0 4

SJF (preemptive)

Average waiting time = (9 + 1 + 0 +2)/4 = 3

P1 P3P2

42 110

P4

5 7

P2 P1

16

Example of Preemptive SJFExample of Preemptive SJF

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Determining Length of Next CPU BurstDetermining Length of Next CPU Burst

Can only estimate the length Can be done by using the length of previous CPU bursts, using

exponential averaging

:Define 4.

10 , 3.

burst CPU next the for value predicted 2.

burst CPU of lenght actual 1.

1

n

th

n nt

.1 1 nnn t

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Predicting Length of Next CPU BurstPredicting Length of Next CPU Burst

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=0n+1 = nRecent history does not count

=1 n+1 = tnOnly the actual last CPU burst counts

If we expand the formula, we get: n+1 = tn+(1 - ) tn -1 + …

• +(1 - )j tn -j + …

• +(1 - )n +1 0

Since both and (1 - ) are less than or equal to 1, each successive term has less weight than its predecessor

Example of Exponential AveragingExample of Exponential Averaging

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A priority number (integer) is associated with each process

The CPU is allocated to the process with the highest priority (smallest integer highest priority)PreemptiveNonpreemptive

SJF is a priority scheduling where priority is the predicted next CPU burst time

Problem Starvation – low priority processes may never execute

Solution Aging – as time progresses increase the priority of the process

Priority SchedulingPriority Scheduling

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Each process gets a small unit of CPU time (time quantum), usually 10-100 milliseconds.

After this time has elapsed, the process is preempted and added to the end of the ready queue.

If there are n processes in the ready queue and the time quantum is q, then each process gets 1/n of the CPU time in chunks of at most q time units at once.

No process waits more than (n-1)q time units.

Performanceq large FIFOq small q must be large with respect to context switch, otherwise overhead is too high

Round Robin(RR) SchedulingRound Robin(RR) Scheduling

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Example of RR SchedulingExample of RR SchedulingTime quantum=20

Process Burst Time

P1 53

P2 17

P3 68

P4 24

The Gantt chart is:

Typically, higher average turnaround than SJF, but better response

P1 P2 P3 P4 P1 P3 P4 P1 P3 P3

0 20 37 57 77 97 117 121 134 154 162

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Time Quantum and Context Switch TimeTime Quantum and Context Switch Time

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Turnaround Time and Time QuantumTurnaround Time and Time Quantum

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Ready queue is partitioned into separate queues:Example 1

• foreground (interactive)

• background

Example 2• System

• Interactive

• Interactive editing

• Batch

• student

Each queue has its own scheduling algorithmforeground – RRbackground – FCFS

Multilevel Queue SchedulingMultilevel Queue Scheduling

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Scheduling must be done between the queuesFixed priority scheduling

• serve all from foreground then from background—Possibility of starvation.Time slice

• each queue gets a certain amount of CPU time which it can schedule amongst its processes; e.g., 80% to foreground in RR and 20% to background in FCFS


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A process can move between the various queuesaging can be implemented this way

Multilevel-feedback-queue scheduler defined by the following parameters:

number of queuesscheduling algorithms for each queuemethod used to determine when to upgrade a processmethod used to determine when to demote a processmethod used to determine which queue a process will enter when that process needs service

Multi-Level Feedback QueueMulti-Level Feedback Queue

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Three queues: Q0 – RR with time quantum 8 millisecondsQ1 – RR time quantum 16 millisecondsQ2 – FCFS

SchedulingA new job enters queue Q0 which is served RR. When it gains CPU, job receives 8 milliseconds. If it does not finish in 8 milliseconds, job is moved to queue Q1.

At Q1 job is again served RR and receives 16 additional milliseconds. If it still does not complete, it is preempted and moved to queue Q2.

Example of Multilevel Feedback QueueExample of Multilevel Feedback Queue

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CPU scheduling more complex when multiple CPUs are available

Homogeneous processors within a multiprocessorAny available processor can be used to run any process

Heterogeneous processorsprogram complied must run on that processor

Multiple Processor SchedulingMultiple Processor Scheduling

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Load sharing Use separate queue for each processor

• One could be idle while another was very busy

Use Common ready queue• Each processor picks a process

• may result inconsistency

• Use one processor as scheduler

• creates master-slave relationship

Asymmetric multiprocessing only one processor accesses the system data structuresOthers executes user processesalleviating the need for data sharing—avoid inconsistency

Multiple Processor SchedulingMultiple Processor Scheduling

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Hard real-time systems required to complete a critical task within a guaranteed amount of time

Soft real-time systems requires that critical processes receive priority over less fortunate ones

Schedulable real-time system

Givenm events (processes)process i occurs within period Pi and requires Ci seconds

Then the load can be handled only if

1

1m

i

i i

C

P

Real Time SchedulingReal Time Scheduling

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Criteria used in selecting an algorithmMaximum CPU utilization under the constraint the maximum response time is 1 secondMaximum throughput such that average turnaround time linearly proportional to execution time

Deterministic ModelingEvaluates using a predetermined work load

• can not cope with the dynamic behavior of the system

Queueing ModelsUses mathematical analysis

• Complicated—hence used unrealistic assumptions

• Uses some assumptions—that may not occur

• An approximation of real system and accuracy is questionable

SimulationExpensive—takes hours of computer time

Algorithm EvaluationAlgorithm Evaluation

Process Synchronization

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Background The Critical-Section Problem Simple Solutions Solutions using Synchronization Hardware Semaphores Solutions of Classic Problems of Synchronization

Process SynchronizationProcess Synchronization

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Cooperating ProcessesProcesses that can affect or be affected by other processesImplementation uses shared logical address space or shared data using files

Concurrent access to shared data may result in data inconsistency

Maintaining data consistency requires mechanisms to ensure the orderly execution of cooperating processes

Suppose that we wanted to provide a solution to the consumer-producer problem

BackgroundBackground

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while (true) {

…

/* produce an item to nextp */

while (count == BUFFER_SIZE)

; // buffer is full, do nothing

buffer [in] = nextp;

in = (in + 1) % BUFFER_SIZE;

count++;

…

}

Producer process

while (true) {

…

while (count == 0)

; // buffer is empty, do nothing

nextc = buffer[out];

out = (out + 1) % BUFFER_SIZE;

count--;

/* consume the item from nextc

…

}

Consumer process

Representative of operating system process

Producer-Consumer ProblemProducer-Consumer Problem

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count++ could be implemented as register1 = count register1 = register1 + 1 count = register1

count-- could be implemented as register2 = count register2 = register2 - 1 count = register2

Consider this execution interleaving with “count = 5” initially:S0: producer execute register1 = count {register1 = 5}S1: producer execute register1 = register1 + 1 {register1 = 6} S2: consumer execute register2 = count {register2 = 5} S3: consumer execute register2 = register2 - 1 {register2 = 4} S4: producer execute count = register1 {count = 6 } S5: consumer execute count = register2 {count = 4}

Race conditionOutcome depends upon the order of execution

Race ConditionRace Condition

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Critical Sectionsegment of code where shared variables are used

Solution must satisfy the following criteriaMutual Exclusion

• If process Pi is executing in its critical section, then no other processes can be executing in their critical sections

Progress • If no process is executing in its critical section and there exist some processes that wish to enter their critical section, then the selection of the processes that will enter the critical section next cannot be postponed indefinitely

Bounded Waiting • A bound must exist on the number of times that other processes are allowed to enter their critical sections after a process has made a request to enter its critical section and before that request is granted

Assume that each process executes at a nonzero speed No assumption concerning relative speed of the N processes

Solution to critical section problemSolution to critical section problem

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Solution 1 Assume that the LOAD and STORE instructions are atomic; that is, cannot be interrupted. The two processes share a variable:

int turn; The variable turn indicates whose turn it is to enter the critical section.

while (true) {…while (turn != i) ;

<CS>

turn = j;

REMAINDER SECTION}

Structure of process i

Two Process SolutionTwo Process Solution

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Solution 2 The two processes share a variable:

Boolean flag[2] The flag array is used to indicate if a process is ready to enter the critical section. flag[i] = true implies

that process Pi is ready!

while (true) {…flag[i]=true;while (flag[j]) ;

<CS>

flag[i]=false;

REMAINDER SECTION}


Two Process SolutionTwo Process Solution

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Solution 3

Two process solution

while (true) {…flag[i]=true;turn=jwhile (flag[j] && turn==j) ;

<CS>

flag[i]=false;

REMAINDER SECTION}


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Many systems provide hardware support for critical section code

Uniprocessors – could disable interruptsCurrently running code would execute without preemptionGenerally too inefficient on multiprocessor systems

• Operating systems using this not broadly scalable

Modern machines provide special atomic hardware instructions• Atomic = non-interruptible

Either test memory word and set valueOr swap contents of two memory words

Synchronization HardwareSynchronization Hardware

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Definition:

bool TestAndSet (bool &target) {

bool temp = target;

target = true;

return temp:

}

Solution using TestAndSetShared boolean variable lock., initialized to false.

while (true) {while ( TestAndSet (lock ))

; /* do nothing<CS>lock = FALSE;// remainder section

}

TestAndSet InstructionTestAndSet Instruction

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Definition: void Swap (bool &a, bool &b) {

bool temp = a;

a = b;

b = temp:

}

Solution Shared Boolean variable lock initialized to false; Each

process has a local Boolean variable key. Solution:

while (true) { key = true; while ( key == true) Swap (lock, key ); // critical section lock = false; // remainder section

}

Swap InstructionSwap Instruction

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Synchronization tool that does not require busy waiting

Semaphore S – integer variable

Two standard operations modify S: wait() and signal()Originally called P() and V()

wait (S) { while S <= 0

; // no-op S--; }

signal (S) { S++; }

Less complicated

Can only be accessed via two indivisible (atomic) operations

SemaphoreSemaphore

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Provides mutual exclusionSemaphore S; // initialized to 1

wait (S);

Critical Section

signal (S);

Binary semaphore – integer value can range only between 0 and 1; can be simpler to implement

Also known as mutex, locks

Counting semaphore – integer value can range over an unrestricted domain

Counting semaphore S can be implemented a as a binary semaphore

Semaphore as Synchronization ToolSemaphore as Synchronization Tool

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Two processes P1 and P2 are running concurrently: P1 with a statement S1 and P2 with a statement S2

Requirement:S2 be executed only after S1

Solution:Use a a semaphore variable sync initialized to 0

……

S1 wait(sync)

signal(sync) S2

……

Process P1

Process P2

Solution of other Synchronization Problem

Solution of other Synchronization Problem

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Must guarantee that no two processes can execute wait () and signal () on the same semaphore at the same time

Thus, implementation becomes the critical section problem where the wait and signal code are placed in the critical section.Could now have busy waiting in critical section implementation

• But implementation code is short

• Little busy waiting if critical section rarely occupied

Note that applications may spend lots of time in critical sections and therefore this is not a good solution.

Semaphore ImplementationSemaphore Implementation

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There is a waiting queue associated with each semaphore.

Each entry in a waiting queue has two data items: value (of type integer) a list of processes L waiting on this semaphore

Typical example

struct Semaphore { int value; ListOfProcess L;};

Two operations on process:block – place the process invoking the operation on the appropriate waiting queue.wakeup – remove one of processes in the waiting queue and place it in the ready queue.

Implementation without busy waitingImplementation without busy waiting

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Implementation of wait:wait (S) {

value--; if (value < 0) {

add this process to waiting queueblock(); }

}

Implementation of signal:signal (S) {

value++; if (value <= 0) {

remove a process P from the waiting queuewakeup(P); }

}

Implementation without busy waiting

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Deadlock – two or more processes are waiting indefinitely for an event that can be caused by only one of the waiting processes

Let S and Q be two semaphores initialized to 1

P0 P1

wait (S); wait (Q); wait (Q); wait (S);

. .

. .

. . signal (S); signal (Q); signal (Q); signal (S);

Starvation – indefinite blocking. A process may never be removed from the semaphore queue in which it is suspended.

Deadlock and StarvationDeadlock and Starvation

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Bounded-Buffer Problem Readers and Writers Problem Dining-Philosophers Problem

Classical Problem of SynchronizationClassical Problem of Synchronization

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N buffers, each can hold one item Semaphore mutex initialized to the value 1 Semaphore full initialized to the value 0 Semaphore empty initialized to the value N.

Bounded-Buffer ProblemBounded-Buffer Problem

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The structure of the producer process

while (true) {

// produce an item

wait (empty);

wait (mutex);

// add the item to the buffer

signal (mutex);

signal (full);

}

The structure of the consumer process

while (true) {

wait (full); wait (mutex);

// remove an item from buffer

signal (mutex); signal (empty); // consume the removed item

}

Bounded-Buffer Problem(Cont.)Bounded-Buffer Problem(Cont.)

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A data set is shared among a number of concurrent processesReaders – only read the data set; they do not perform any updatesWriters – can both read and write.

Problem – allow multiple readers to read at the same time. Only one writer can access the shared data at the same time.

Shared DataData setSemaphore mutex initialized to 1.Semaphore wrt initialized to 1.Integer readcount initialized to 0.

Readers-Writers ProblemReaders-Writers Problem

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The structure of a writer process

while (true) { wait (wrt) ; // writing is performed

signal (wrt) ;}

The structure of a reader process

while (true) { wait (mutex) ; readcount ++ ; if (readercount == 1) wait

(wrt) ; signal (mutex) // reading is performed

wait (mutex) ; readcount - - ; if (redacount == 0) signal (wrt) ; signal (mutex) ;

}

Readers-Writer Problem(Cont.)Readers-Writer Problem(Cont.)

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• Shared data Bowl of rice (data set)Semaphore chopstick [5] initialized to 1

Dining-Philosophers ProblemDining-Philosophers Problem

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The structure of Philosopher i:

While (true) {

wait ( chopstick[i] );

wait ( chopStick[ (i + 1) % 5] );

// eat

signal (chopstick[ (i + 1) % 5] );

signal ( chopstick[i] );

// think

}

Dining-Philosophers Problem(Cont.)Dining-Philosophers Problem(Cont.)

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Deadlock free solutionAllow at most four philosophers to be sitting simultaneously at the tableAllow a philosopher to pick up chopsticks only both are available

While (true) { wait(mutex) wait ( chopstick[i] );

wait ( chopStick[ (i + 1) % 5] );signal(mutex) // eat

wait (mutex)signal (chopstick[ (i +

1) % 5] ); signal ( chopstick[i] );signal(mutex)

// think}Asymmetric solution

• Odd philosopher will pick first left then right while even philosopher picks up first left and then right chopstick

Dining-Philosophers Problem(Cont.)Dining-Philosophers Problem(Cont.)

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• Correct use of semaphore operations:

• signal (mutex) …. wait (mutex)• Mutual exclusion requirement is violated

• wait (mutex) … wait (mutex)• Violation of progress condition

• Possibility of deadlock

• Omitting of wait (mutex) or signal (mutex) (or both)• Violation of mutual exclusion or deadlock

Problems with SemaphoreProblems with Semaphore

Deadlocks

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The Deadlock Problem System Model Deadlock Characterization Methods for Handling Deadlocks Deadlock Prevention Deadlock Avoidance Deadlock Detection Recovery from Deadlock

DeadlocksDeadlocks

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In a multiprogramming Environment several processes compete for finite number of resources

A set of blocked processes each holding a resource and waiting to acquire a resource held by another process in the set.

Example 1System has 2 disk drives.P1 and P2 each holds one disk drive and each needs another

Example 2semaphores A and B, initialized to 1

• P0 P1

• wait (A); wait(B)

• wait (B); wait(A)

Example 3Each philosopher picks left chopstick in dining philosopher problem

The Deadlock ProblemThe Deadlock Problem

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Traffic only in one direction.

Each section of a bridge can be viewed as a resource.

If two cars approach each other at the crossing, neither can start until the other has

gone(Dead locks)

If a deadlock occurs, it can be resolved if one car backs up (preempt resources and rollback).

Several cars may have to be backed up if a deadlock occurs.

Starvation is possible.

Bridge Crossing ExampleBridge Crossing Example

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Resource types R1, R2, . . ., Rm• CPU cycles, memory space, I/O devices

Each resource type Ri has Wi instances.Example—two CPU, Three printers, 2 disk drives

Process may requests as many resources as it requires to perform its designated task

Must be less the total number of resources available

Each process utilizes a resource as follows:Request—If the request can not be granted immediately, the requesting process must wait Use Release

System ModelSystem Model

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Deadlock can arise if four conditions hold simultaneously.

Mutual exclusion: at least one resource must in non-sharable mode i.e. only one process at a time can use that resource.

Hold and wait: a process holding at least one resource is waiting to acquire additional resources held by other processes.

No preemption: a resource can be released only voluntarily by the process holding it, after that process has completed its task.

Circular wait: there exists a set {P0, P1, …, Pn} of waiting processes such that P0 is waiting for a resource that is held by P1, P1 is waiting for a resource that is held by P2, …, Pn–1 is waiting for a resource that is held by Pn, and Pn is waiting for a resource that is held by P0.

Deadlock CharacterizationDeadlock Characterization

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Used to visualize resource allocation pattern

Helps to describe deadlock more precisely

A set of vertices V and a set of edges (directed) E

V is partitioned into two types:P = {P1, P2, …, Pn}, the set consisting of all the processes in the system.R = {R1, R2, …, Rm}, the set consisting of all resource types in the system.

E is partitioned into two types:request edge – directed edge Pi Rjassignment edge – directed edge Rj Pi

Resource-Allocation GraphResource-Allocation Graph

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Process

Resource Type with 4 instances

Pi requests an instance of Rj

Pi is holding an instance of Rj

Pi

Pi

Rj

Rj

Resource-Allocation Graph(Cont.)Resource-Allocation Graph(Cont.)

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The sets P, R and EP = {P1, P2, P3}R = {R1, R2, R3, R4}E = {P1 R1, P2 R3, R1 P2 ,

R2 P2, R2 P1, R3 P3}

Resource InstancesOne instance of resource type R1Two instances of resource type R2One instance of resource type R3Three instances of resource type R3

Example of Resource Allocation GraphExample of Resource Allocation Graph

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If graph contains no cycles no deadlock.

If graph contains a cycle if only one instance per resource type, then deadlock.if several instances per resource type, possibility of deadlock.

Basic factsBasic facts

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Resource Allocation Graph With A Deadlock

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Graph With A Cycle But No Deadlock

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Three methods for dealing with the deadlock problem

Ensure that the system will never enter a deadlock state.• Deadlock prevention—ensure that one of the necessary conditions can not hold

• Deadlock avoidance—systems additional information about resource usage pattern during the execution

Allow the system to enter a deadlock state and then recover.

Ignore the problem and pretend that deadlocks never occur in the system; used by most operating systems, including UNIX.

Methods of Handling DeadlockMethods of Handling Deadlock

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Mutual Exclusion – not required for sharable resources; must hold for nonsharable resources.

Hold and Wait – must guarantee that whenever a process requests a resource, it does not hold any other resources.

Two possibilitiesRequire process to request and be allocated all its resources before it begins executionallow process to request resources only when the process has none.

• Low resource utilization; possibility of starvation

• Data inconsistency

• ensure that one of the necessary conditions can not hold

• Restrain the ways request can be made.

Deadlock PreventionDeadlock Prevention

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No Preemption –Two possibilities

If a process that is holding some resources requests another resource that cannot be immediately allocated to it, then all resources currently being held are released.

If a process requests some resources that are not available as they are allocated to other waiting processes, then preempt desired resources from waiting processes

• Preempted resources are added to the list of resources for which the process is waiting.

• Process will be restarted only when it can regain its old resources, as well as the new ones that it is requesting.

Deadlock Prevention(Cont.)

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Circular Wait – impose a total ordering of all resource types, and require that each process requests resources in an increasing order of enumeration.

F(tape drive)=1F(disk drive)=5F(printer)=12

Facts:IIf a process currently holds resource type R i , the process can request another resource type R j if F(Rj) > F(Ri)

ORIf a process requests a resource type R j , if it has released any resource type R i such the F(Ri) F(Rj)

Proof(by contradiction):Set of deadlocked process {P0, P1, P2, …, Pn}F(R0) < F(R1) < F(R2) <…< F(Rn) < F(R0) which is impossible So there can be no circular wait—no deadlock

Deadlock Prevention(Cont.)

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Simplest and most useful model requires that each process declare the maximum number of resources of each type that it may need.

The deadlock-avoidance algorithm dynamically examines the resource-allocation state to ensure that there can never be a circular-wait condition.

• Requires that the system has some additional information available.

• With this additional information, system can decide whether a newly arrived request can be satisfied (served) or not

Deadlock AvoidanceDeadlock Avoidance

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state is defined by the number of available and allocated resources, and the maximum demands of the processes.

System is in safe state if there exists a sequence <P1, P2, …, Pn> of ALL the processes in the systems such that for each Pi, the resources that Pi can still request can be satisfied by currently available resources + resources held by all the Pj, with j < i.

That is:If Pi needs some resources that are not immediately available, then Pi can wait until all Pj have finished.When Pj is finished, Pi can obtain needed resources, execute, return allocated resources, and terminate. When Pi terminates, Pi +1 can obtain its needed resources, and so on.

When a process requests an available resource, system must decide if immediate allocation leaves the system in a safe state.

Safe StateSafe State

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If a system is in safe state no deadlocks.

If a system is in unsafe state possibility of deadlock.

Avoidance ensure that a system will never enter an

unsafe state. Example: 12 disk drives Snapshot at time T0:

Maximum needs Current NeedsP0 10 5

P1 4 2

P2 9 2 The sequence <P1, P0, P2> is safe At time T1, P2 requests one more disk drive Satisfying the request leaves the system in an unsafe state Request can not be granted

Basic FactsBasic Facts

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Safe, Unsafe and Deadlock stateSafe, Unsafe and Deadlock state

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Single instance of a resource type. Use a resource-allocation graph

Multiple instances of a resource type. Use the banker’s algorithm

Deadlock Avoidance AlgorithmsDeadlock Avoidance Algorithms

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Claim edge Pi Rj indicated that process Pj may request resource Rj; represented by a dashed line.

Claim edge converts to request edge when a process requests a resource.

Request edge converted to an assignment edge when the resource is allocated to the process.

When a resource is released by a process, assignment edge reconverts to a claim edge.

Resources must be claimed a priori in the system.

Resource-Allocation Graph SchemeResource-Allocation Graph Scheme

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Resource Allocation GraphResource Allocation Graph

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Suppose that process Pi requests a resource Rj

The request can be granted only if converting the request edge to an assignment edge does not result in the formation of a cycle (including the claim edge )in the resource allocation graph

Resource-Allocation Graph AlgorithmResource-Allocation Graph Algorithm

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Unsafe state and Resource Allocation GraphUnsafe state and Resource Allocation Graph

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Multiple instances.

Each process must a priori claim maximum use.

When a process requests a resource it may have to wait.

When a process gets all its resources it must return them in a finite amount of time.

Banker’s AlgorithmBanker’s Algorithm

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Available: Vector of length m. If Available [j] = k, there are k instances of resource type Rj available.

Max: n x m matrix. If Max [i,j] = k, then process Pi may request at most k instances of resource type Rj.

Allocation: n x m matrix. If Allocation[i,j] = k then Pi is currently allocated k instances of Rj.

Need: n x m matrix. If Need[i,j] = k, then Pi may need k more instances of Rj to complete its task.

Need [i,j] = Max[i,j] – Allocation [i,j].

Define XY if X[i] Y[i] i

Let n = number of processes, and m = number of resources types.

Data Structures for Banker’s AlgorithmData Structures for Banker’s Algorithm

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1. Let Work and Finish be vectors of length m and n, respectively. Initialize:Work = Available

Finish [i] = false for i = 0, 1, …, n- 1.

2. Find and i such that both: (a) Finish [i] = false(b) Needi WorkIf no such i exists, go to step 4.

3. Work = Work + Allocationi

Finish[i] = truego to step 2.

4. If Finish [i] == true for all i, then the system is in a safe state.

Algorithm requires an order of O(m x n2) operations to detect whether the system is in safe state.

Safety AlgorithmSafety Algorithm

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Requesti = request vector for process Pi. If Requesti [j] = k then process Pi wants k instances of resource type Rj.

1. If Requesti Needi go to step 2. Otherwise, raise error condition, since process has exceeded its maximum claim.

2. If Requesti Available, go to step 3. Otherwise Pi must wait, since resources are not available.

3. Pretend to allocate requested resources to Pi by modifying the state as follows:

• Available = Available – Requesti;

• Allocationi = Allocationi + Requesti;

• Needi = Needi – Requesti;

• If safe the resources are allocated to Pi.

• If unsafe Pi must wait, and the old resource-allocation state is restored

Resource Request AlgorithmResource Request Algorithm

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5 processes P0 through P4;

3 resource types: Available

A (10 instances), B (5 instances), and C (7 instances).

Snapshot at time T0:

Allocation Max Available

A B C A B C A B C

P0 0 1 0 7 5 3 3 3 2

P1 2 0 0 3 2 2

P2 3 0 2 9 0 2

P3 2 1 1 2 2 2

P4 0 0 2 4 3 3

Example of Banker’s AlgorithmExample of Banker’s Algorithm

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The content of the matrix Need is defined to be Max – Allocation.

NeedA B C

P0 7 4 3 P1 1 2 2 P2 6 0 0 P3 0 1 1P4 4 3 1

The system is in a safe state since the sequence < P1, P3, P4, P2, P0> satisfies safety criteria.

Example(Cont.)Example(Cont.)

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Check that Request Available (that is, (1,0,2) (3,3,2) true.

Allocation Need AvailableA B C A B C A B C

P0 0 1 0 7 4 3 2 3 0P1 3 0 2 0 2 0 P2 3 0 1 6 0 0 P3 2 1 1 0 1 1P4 0 0 2 4 3 1

Executing safety algorithm shows that sequence < P1, P3, P4, P0, P2> satisfies safety requirement.

Can request for (3,3,0) by P4 be granted?

Can request for (0,2,0) by P0 be granted?

Example: P1 requests (1, 0, 2)Example: P1 requests (1, 0, 2)

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Allow system to enter deadlock state

System must provideDetection algorithm

• Checks the state of the system to determine whether a deadlock has occurred

Recovery scheme

Deadlock DetectionDeadlock Detection

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Maintain wait-for graphNodes are processes.Pi Pj if Pi is waiting for Pj.

Periodically invoke an algorithm that searches for a cycle in the graph. If there is a cycle, there exists a deadlock.

An algorithm to detect a cycle in a graph requires an order of n2 operations, where n is the number of vertices in the graph.

Single Instance of Resource TypeSingle Instance of Resource Type

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Resource-Allocation Graph Corresponding wait-for graph

Wait For GraphWait For Graph

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n number of processes, m number of resource types

Available: A vector of length m indicates the number of available resources of each type.

Allocation: An n x m matrix defines the number of resources of each type currently allocated to each process.

Request: An n x m matrix indicates the current request of each process. If Request [ij] = k, then process Pi is requesting k more instances of resource type. Rj.

Several Instances of Resource TypeSeveral Instances of Resource Type

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1. Let Work and Finish be vectors of length m and n, respectively Initialize:

(a) Work = Available(b) For i = 1,2, …, n, if Allocationi 0, then

Finish[i] = false;otherwise, Finish[i] = true.

2. Find an index i such that both:

(a) Finish[i] == false(b) Requesti WorkIf no such i exists, go to step 4.

3. Work = Work + Allocationi

Finish[i] = truego to step 2.

4. If Finish[i] == false, for some i, 1 i n, then the system is in deadlock state. Moreover, if Finish[i] == false, then Pi is deadlocked.

Algorithm requires an order of O(m x n2) operations to detect whether the system is in deadlocked state.

Detection AlgorithmDetection Algorithm

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Five processes P0 through P4;

three resource types A (7 instances), B (2 instances), and C (6 instances).

Snapshot at time T0: Allocation RequestAvailableA B C A B C A B CP0 0 1 0 0 0 0 0 0 0P1 2 0 0 2 0 2P2 3 0 3 0 0 0 P3 2 1 1 1 0 0 P4 0 0 2 0 0 2

Sequence <P0, P2, P3, P1, P4> will result in Finish[i] = true for all i.

Example of Detection AlgorithmExample of Detection Algorithm

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P2 requests an additional instance of type C.RequestA B C P0 0 0 0 P1 2 0 1P2 0 0 1P3 1 0 0 P4 0 0 2

State of system?Can reclaim resources held by process P0, but insufficient resources to fulfill other processes; requests.Deadlock exists, consisting of processes P1, P2, P3, and P4.

Example(Cont.)Example(Cont.)

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When, and how often, to invoke depends on:How often a deadlock is likely to occur?How many processes will need to be rolled back?

• one for each disjoint cycle

Run deadlock detection detection algorithm every time a request can not be granted

Considerably overhead

Run once per hour

Run when CPU/resource utilization drops below 40%

If detection algorithm is invoked arbitrarily, there may be many cycles in the resource graph and so we would not be able to tell which of the many deadlocked processes “caused” the deadlock.

Deadlock Detection UsageDeadlock Detection Usage

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Abort all deadlocked processes.

Abort one process at a time until the deadlock cycle is eliminated.

In which order should we choose to abort?Priority of the process.How long process has computed, and how much longer to completion.Resources the process has used.Resources process needs to complete.How many processes will need to be terminated. Is process interactive or batch?

Recovery From Deadlock-Process TerminationRecovery From Deadlock-Process Termination

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Selecting a victim – minimize cost.

Rollback – return to some safe state, restart process for that state.

Starvation – same process may always be picked as victim, include number of rollback in cost factor.

Recovery From Deadlock-Resource Preemption

Memory Management

Memory Management

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Memory ManagementMemory Management

Background

Swapping

Contiguous Memory Allocation

Paging

Structure of the Page Table

Inverted page table

Segmentation

Segmentation with paging

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BackgroundBackground Memory

large array of words each with its own address

Main memory and registers are only storage CPU can access directly

Register access in one CPU clock (or less)—fast

Main memory can take many cycles—slower

Cache sits between main memory and CPU registers

Primary purpose of computer system? execute programs

Program must be brought (from disk) into memory and placed within a process for it to be run

Want to improve CPU utilization or speed?Keep several programs ready in the memory

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Multi-step Processing of a User Program Multi-step Processing of a User Program

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Address BindingAddress Binding

AddressSymbolic e.g. “count”Relocatable e.g. “3 bytes from beginning” Absolute address e.g 01000000

Address binding of instructions and data to memory addresses can happen at three different stages

Compile time: If memory location known a priori, absolute code can be generated; must recompile code if starting location changes

Address content meaning100 00000001 code for addition101 01101000 104 (address of x)102 01101001 105 (address of y)103 01101010 106 (address of z)104 00000011 x=3105 00000100 y=4106 00000000 z=0 (before execution)

int x=3, y=4, z;

z=x+y;

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Load time: Must generate relocatable code if memory location is not known at compile time

content meaning00000001 code for addition4 bytes from start address of x5 bytes from start address of y6 bytes from start address of z00000011 x=300000100 y=400000000 z=0 (before execution)

int x=3, y=4, z;

z=x+y;

Execution time: Binding delayed until run time if the process can be moved during its execution from one memory segment to another. Need hardware support for address maps (e.g., base and limit registers)

Address Binding

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Logical vs. Physical Address SpaceLogical vs. Physical Address Space The concept of a logical address space that is bound

to a separate physical address space is central to proper memory management

Logical address – generated by the CPU; also referred to as virtual addressPhysical address – address seen by the memory unit

Logical and physical addresses are the same in compile-time and load-time address-binding schemes;

Logical (virtual) and physical addresses differ in execution-time address-binding scheme

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Memory-Management Unit (MMU)Memory-Management Unit (MMU)

Hardware device that maps virtual to physical address

In MMU scheme, the value in the relocation register is added to every address generated by a user process at the time it is sent to memory

The user program deals with logical addresses; it never sees the real physical addresses

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Dynamic relocation using a relocation registerDynamic relocation using a relocation register

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Dynamic LoadingDynamic Loading

Used for better memory space utilization

Basic conceptAll routines are kept in disk in relocatable load formatRoutine is not loaded until it is called

AdvantagesBetter memory-space utilization; unused routine is never loadedUseful when large amounts of code are needed to handle infrequently occurring casesNo special support from the operating system is required implemented through program design

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Dynamic LinkingDynamic Linking

Linking postponed until execution time

Basic conceptSmall piece of code, stub, used to locate the appropriate memory-resident library routineStub replaces itself with the address of the routine, and executes the routineOperating system needed to check if routine is in processes’ memory address

AdvantagesDynamic linking is particularly useful for shared libraries

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SwappingSwapping A process can be swapped temporarily out of memory to a

backing store, and then brought back into memory for continued execution

Backing store – fast disk large enough to accommodate copies of all memory images for all users; must provide direct access to these memory images

Roll out, roll in – swapping variant used for priority-based scheduling algorithms; lower-priority process is swapped out so higher-priority process can be loaded and executed

Major part of swap time is transfer time; total transfer time is directly proportional to the amount of memory swapped

Swapping are found on many systems (i.e., UNIX, Linux, and Windows)

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Schematic View of SwappingSchematic View of Swapping

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Contiguous AllocationContiguous Allocation Main memory usually into two partitions:

Resident operating system, usually held in low memory with interrupt vectorUser processes then held in high memory

Relocation registers used to protect user processes from each other, and from changing operating-system code and data

Base register contains value of smallest physical addressLimit register contains range of logical addresses – each logical address must be less than the limit register MMU maps logical address dynamically

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HW address protection with base and limit registersHW address protection with base and limit registers

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Contiguous Allocation (Cont.)Contiguous Allocation (Cont.) Multiple-partition allocation

Hole – block of available memory; holes of various size are scattered throughout memoryWhen a process arrives, it is allocated memory from a hole large enough to accommodate itOperating system maintains information about:a) allocated partitions b) free partitions (hole)

OS

process 5

process 8

process 2

OS

process 5

process 2

OS

process 5

process 2

OS

process 5

process 9

process 2

process 9

process 10

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| U. K. Roy |

Dynamic Storage-Allocation ProblemDynamic Storage-Allocation Problem

First-fit: Allocate the first hole that is big enough

Best-fit: Allocate the smallest hole that is big enough; must search entire list, unless ordered by size Produces the smallest leftover hole

Worst-fit: Allocate the largest hole; must also search entire list Produces the largest leftover hole

How to satisfy a request of size n from a list of free holes

First-fit and best-fit better than worst-fit in terms of speed and storage utilization

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| U. K. Roy |

FragmentationFragmentation

External Fragmentation – total memory space exists to satisfy a request, but it is not contiguous

Internal Fragmentation – allocated memory may be slightly larger than requested memory; this size difference is memory internal to a partition, but not being used

Reduce external fragmentation by compactionShuffle memory contents to place all free memory together in one large blockCompaction is possible only if relocation is dynamic, and is done at execution timeI/O problem

• Latch job in memory while it is involved in I/O

Selecting an optimal compaction algorithm is difficult

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| U. K. Roy |

FragmentationFragmentation

Compaction algorithm

P1

P2

400K

P3

300k

P4

200k

500K

300K

600K

1000K

1200K

1500K

1900K

2100K

P1

P2

P3

900k

P4

500K

300K

600K

800K

2100K

P1

P2

P3

P4

500K

300K

600K

1000K

1200K

2100K

900k

P1

P2

P3

P4

500K

300K

600K

1500K

1900K

2100K

900k

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| U. K. Roy |

PagingPaging

Logical address space of a process can be noncontiguous; process is allocated physical memory whenever the latter is available

Divide physical memory into fixed-sized blocks called frames (size is power of 2, between 512 bytes and 8,192 bytes)

Divide logical memory into blocks of same size called pages

Keep track of all free frames

To run a program of size n pages, need to find n free frames and load program

Set up a page table to translate logical to physical addresses

Advantage

Address space need not be contiguous

Problem

Internal fragmentation

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| U. K. Roy |

Address Translation SchemeAddress Translation Scheme Address generated by CPU is divided into:

Page number (p) • used as an index into a page table which contains base

address of each page in physical memory

Page offset (d) • combined with base address to define the physical

memory address that is sent to the memory unit

For given logical address space 2m and page size 2n

page number page offset

p d

m - n n

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| U. K. Roy |

Paging HardwarePaging Hardware

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| U. K. Roy |

Paging Model of Logical and Physical MemoryPaging Model of Logical and Physical Memory

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| U. K. Roy |

Paging ExamplePaging Example

32-byte memory and 4-byte pages

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| U. K. Roy |

Free FramesFree Frames

Before allocation After allocation

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| U. K. Roy |

Implementation of Page TableImplementation of Page Table Page table is kept in main memory

Page-table base register (PTBR) points to the page table

Page-table length register (PRLR) indicates size of the page table

Problem In this scheme every data/instruction access requires two memory accesses. One for the page table and one for the data/instruction.

SolutionThe two memory access problem can be solved by the use of a special fast-lookup hardware cache called associative memory or translation look-aside buffers (TLBs)TLB stores a fraction of total information of page table

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| U. K. Roy |

Associative MemoryAssociative Memory

Associative memory – parallel search

Address translation (p, d)If p is in associative register, get frame # outOtherwise get frame # from page table in memory

Page # Frame #

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| U. K. Roy |

Paging Hardware With TLBPaging Hardware With TLB

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| U. K. Roy |

Efficiency of TLB and locality of referenceEfficiency of TLB and locality of reference Example

for(i=0;j<128;i++) for(j=0;j<128-i-1;j++) if(data[j] > data[j+1])

swap(data[j],data[j+1])

Temporal locality Spatial locality

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| U. K. Roy |

Effective Access TimeEffective Access Time Associative Lookup = time unit Assume memory cycle time is 1 microsecond Hit ratio – percentage of times that a page number is found in the associative registers; ratio related to number of associative registers Hit ratio =

Effective Access Time (EAT)

EAT = (1 + ) + (2 + )(1 – )

= 2 + –

Example

Access time of TLB = 20 ns

Access time of memory = 100 ns

Hit ratio = 0.8

EAT = 0.8x120 + 0.2x220 = 140 ns 40% slow down

= 0.98, EAT = 0.98x120 + 0.02x220 = 122 22% slow down

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| U. K. Roy |

Memory ProtectionMemory Protection Memory protection implemented by associating protection

(read/write) bit with each frame

Finer level of protection can be implemented by adding more bits

Valid-invalid bit attached to each entry in the page table:“valid” indicates that the associated page is in the process’ logical address space, and is thus a legal page“invalid” indicates that the page is not in the process’ logical address spaceExample:

• 14-bit address0-16,383 out of which 0-12,287 can be used

• Page size 2K first 6 pages (0 through 5) are valid, rest (page 6 & 7) are invalid

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| U. K. Roy |

Valid (v) or Invalid (i) Bit In A Page TableValid (v) or Invalid (i) Bit In A Page Table

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| U. K. Roy |

Shared PagesShared Pages Shared code

One copy of read-only (reentrant) code shared among processes (i.e., text editors, compilers, window systems).

Shared code must appear in same location in the logical address space of all processes

Private code and data Each process keeps a separate copy of the code and data

The pages for the private code and data can appear anywhere in the logical address space

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| U. K. Roy |

Shared Pages ExampleShared Pages Example

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| U. K. Roy |

Hierarchical Page TablesHierarchical Page Tables

Break up the logical address space into multiple page tables

A simple technique is a two-level page table

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| U. K. Roy |

Two-Level Paging ExampleTwo-Level Paging Example An example A logical address (on 32-bit machine with 4K page size) is divided into:

a page number consisting of 20 bitsa page offset consisting of 12 bits

Size of page table? 4 Mbytes Solution—break the page table in number of pages Since the page table is paged, the page number is further divided into:

a 10-bit page number a 10-bit page offset

Thus, a logical address is as follows:

where p1 is an index into the outer page table, and p2 is the displacement within the page of the outer page table

page number page offset

p1 p2 d

10 10 12

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| U. K. Roy |

Two-Level Page-Table SchemeTwo-Level Page-Table Scheme

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| U. K. Roy |

Address-Translation SchemeAddress-Translation Scheme

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| U. K. Roy |

Effective Access TimeEffective Access Time Associative Lookup = time unit Assume memory cycle time is T microsecond Hit ratio =

Effective Access Time (EAT)

EAT = (T + ) + (3T + )(1 – )

= 3T + – 2T

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| U. K. Roy |

Three-level Paging SchemeThree-level Paging Scheme

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| U. K. Roy |

Inverted Page TableInverted Page Table One entry for each real page of memory

Entry consists of the page number stored in that frame, and the process that owns the page<page-number, process-id>

Logical address consists of a triple:<process-id, page-number, offset>

Inverted page table is of the form:

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| U. K. Roy |

Inverted Page Table ArchitectureInverted Page Table Architecture

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| U. K. Roy |

Inverted Page TableInverted Page Table Advantage

Decreases memory needed to store each page table

DisadvantageIncreases time needed to search the table when a page reference occurs

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| U. K. Roy |

SegmentationSegmentation Paging does not support user’s view of memory Segmentation Memory-management scheme supports user

view of memory User’s view

A program is a collection of segments/ modules. A segment is a logical unit such as:

• main program,

• procedure,

• function,

• method,

• object,

• local variables, global variables,

• common block,

• stack,

• symbol table, arrays

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| U. K. Roy |

Logical View of SegmentationLogical View of Segmentation

1

3

2

4

3

user space physical memory space

3

2

4

1

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| U. K. Roy |

Segmentation Architecture Segmentation Architecture Logical address consists of a two tuple (for paging a single address is

specified):<segment-number, offset>,

Segmentation hardware

Segment table – maps two-dimensional physical addresses; each table entry is of the form <base, limit>

• base – contains the starting physical address where the segment resides in memory

• limit – specifies the length of the segment

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| U. K. Roy |

Example of SegmentationExample of Segmentation

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| U. K. Roy |

Segmentation Architecture (Cont.)Segmentation Architecture (Cont.) Implementation of segment table

Segment-table base register (STBR) • points to the segment table’s location in memory

Segment-table length register (STLR) • indicates number of segments used by a program;

segment number s is legal if s < STLR

ProtectionWith each entry in segment table associate:

• validation bit = 0 illegal segment

• read/write/execute privileges

Protection bits associated with segments; code sharing occurs at segment level

External FragmentationSince segments vary in length, memory allocation is a dynamic storage-allocation problem

Segmentation with paging

Virtual MemoryVirtual Memory

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| U. K. Roy |

BackgroundBackground Motivation

Programs often handle large error handling code that rarely occursDeclare an array of 800x600 elements;most will not be usedSome routines are less frequently used

Virtual memory – separation of logical memory from physical memory.Only part of the program needs to be in memory for executionLogical address space can therefore be much larger than physical address spaceAllows address spaces to be shared by many processesLess I/O—allows for more efficient process creation

Virtual memory can be implemented via:Demand paging Demand segmentation

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| U. K. Roy |

Virtual Memory That is Larger Than Physical Memory

Virtual Memory That is Larger Than Physical Memory

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| U. K. Roy |

Demand PagingDemand Paging Bring a page into memory only when it is needed

Less memory needed—size of the program can be extremely large Less I/O needed—Faster responseMore users

Page is needed reference to itinvalid reference abortnot-in-memory bring to memory

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| U. K. Roy |

Transfer of a Paged Memory to DiskTransfer of a Paged Memory to Disk

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| U. K. Roy |

Implementation of Demand PagingImplementation of Demand Paging

With each page table entry a valid–invalid bit is associated(v(1) in-memory, i(0) not-in-memory)

Initially valid–invalid bit is set to i(0) on all entries

Example of a page table snapshot:vvv

v

i

ii

….

Frame # valid-invalid bit

page table

During address translation, if valid–invalid bit in page table entry

is i(0) page fault

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| U. K. Roy |

ExampleExample

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| U. K. Roy |

Page FaultPage Fault

page fault—if referenced page is not in memory

Procedure for handling page fault Reference the pageIf invalid reference abort; else page fault page to be brought in to memoryDetermine the location of the page in diskFind a free frame (from free frame list) and read the desired page into this newly allocated frameModify the page table; Set validation bit = vRestart the instruction that caused the page fault

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| U. K. Roy |

Steps in Handling a Page FaultSteps in Handling a Page Fault

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| U. K. Roy |

Page Fault Page Fault Restart instruction

block move (MVC instruction in IBM 360/370)

Solution• Check both ends of both blocks

• Page fault may occur even then

• Store values of overwritten locations

• Where to store? Register or memory? If stored in memory, page fault again?

auto increment/decrement location

MOV (R2)+, -(R3) //copies the content of location pointed //by R2 into location pointed by R3

What will happen if a page fault occurs while accessing location pointed by R3?

Solution• Use status registers to store the initial value of registers R2 and

R3 sot that the instruction can be undone

DestinationBlock

Sourceblock

Page fault

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| U. K. Roy |

Performance of Demand PagingPerformance of Demand Paging Page Fault Rate 0 p 1.0

if p = 0 no page faults if p = 1, every reference is a fault

Effective Access Time (EAT) EAT = (1 – p) x memory access

+ p(page fault overhead + swap page out + swap page in + restart overhead )

Page fault service time

Example

Memory access time = 100 ns

Page fault service time = 25 ms

EAT = (1-p)x100+px25,000,000 = 100+29,999,900xp

If p=0.001 (1 out of 1000),

EAT=25 s (slow down by a factor of 250!!!!)

For 10% performance degradation p < 0.0000004 (1 out of 2,500,000)

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| U. K. Roy |

Page ReplacementPage Replacement Page faultThere is no free frame in memorypage replacement

Page replacement completes separation between logical memory and physical memory – large virtual memory can be provided on a smaller physical memoryInclude page fault algorithm into page-fault service routine

find some page in memory, but not really in use, swap it outalgorithmperformance – want an algorithm which will result in minimum number of page faults

Use modify (dirty) bit to reduce overhead of page transfers – only modified pages are written to disk

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| U. K. Roy |

Need For Page ReplacementNeed For Page Replacement

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| U. K. Roy |

Basic Page ReplacementBasic Page Replacement Find the location of the desired page on disk

Find a free frame:If there is a free frame, use itIf there is no free frame, use a page replacement algorithm to select a victim frameWrite the victim page to the disk (if necessary); change the page and frame tables accordingly

Bring the desired page into the (newly) free frame; update the page and frame tables

Restart the process

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| U. K. Roy |

Page ReplacementPage Replacement

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| U. K. Roy |

Page Faults Versus The Number of FramesPage Faults Versus The Number of Frames

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| U. K. Roy |

Page Replacement AlgorithmsPage Replacement Algorithms

Want lowest page-fault rate

Evaluate algorithm by running it on a particular string of memory references (reference string) and compute the number of page faults on that string

In all our examples, the reference string is

7, 0, 1, 2, 0, 3, 0, 4, 2, 3, 0, 3, 2, 1, 2, 0, 1, 7, 0, 7

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| U. K. Roy |

First-In-First-Out (FIFO) AlgorithmFirst-In-First-Out (FIFO) Algorithm Page that was loaded first will be replaced

Example:Reference string: 7, 0, 1, 2, 0, 3, 0, 4, 2, 3, 0, 3, 2, 1, 2, 0, 1, 7, 0, 73 frames (3 pages can be in memory at a time per process)

15 page faults Implementation:

Use FIFO queue; referenced page will be added at the rear endPage at the head will be replaced

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| U. K. Roy |

Belady’s anomalyBelady’s anomaly Reference string: 1, 2, 3, 4, 1, 2, 5, 1, 2, 3, 4, 5

3 frames (3 pages can be in memory at a time per process)

11

2

3

9 page faults

1

2

1

2

3

4

2

3

4

1

3

4

1

2

5

1

2

5

3

2

1 2 3 4 1 2 5 1 2 3

5

3

4

4 5

11

2

3

10 page faults

4

1 2 3 4 1 2 5 1 2 3 4 5

1

2

1

2

3

1

2

3

4

5

2

3

4

5

1

3

4

5

1

2

4

5

1

2

3

4

1

2

3

4

5

2

3

4 frames

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| U. K. Roy |

FIFO Illustrating Belady’s AnomalyFIFO Illustrating Belady’s Anomaly

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| U. K. Roy |

Optimal Page ReplacementOptimal Page Replacement Replace page that will not be used for longest period of time

9 page faults

FIFO Page replacement

Optimal Page replacement

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| U. K. Roy |

Optimal AlgorithmOptimal Algorithm 4 frames example

1, 2, 3, 4, 1, 2, 5, 1, 2, 3, 4, 5

11

2

3

6 page faults

4

1 2 3 4 1 2 5 1 2 3 4 5

1

2

1

2

3

1

2

3

4

1

2

3

5

4

2

3

5

How do you know this? Used for measuring how well your algorithm performs

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| U. K. Roy |

Least Recently Used (LRU) Algorithm Uses the locality of reference property Use the concept of optimal algorithm but look backward

instead of looking forward Replace the page that has not been used longest period of time

12 page faults

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| U. K. Roy |

Least Recently Used (LRU) AlgorithmLeast Recently Used (LRU) Algorithm Reference string: 1, 2, 3, 4, 1, 2, 5, 1, 2, 3, 4, 5

5

2

4

3

1

2

3

4

1

2

5

4

1

2

5

3

1

2

4

3

Implementation of LRU

Counter implementation• Every page entry has a counter; every time page is referenced through

this entry, copy the clock into the counter

• When a page needs to be changed, look at the counters to determine which are to change

• Problems:

• Write counter to the memory—memory access

• Searching the page with smallest counter value

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| U. K. Roy |

LRU Algorithm (Cont.)LRU Algorithm (Cont.)Stack(Queue) implementation

keep a stack (queue) of page numbers in a double link form:Maintain two pointers head and tail pointing to top(head) and bottom (tail) of stack (queue)Whenever a page is referenced:

• Remove it and put it on the top/head

• Remove the page at the bottom/rear(this is the least recently used page)

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| U. K. Roy |

LRU Algorithm (Cont.)LRU Algorithm (Cont.)Advantage

• Limited number of pointers to be changed

• No search for replacementDisadvantage

• Searching for update is expensive

Neither optimal nor LRU algorithm suffers from Belady’s anomaly

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| U. K. Roy |

LRU Approximation AlgorithmsLRU Approximation AlgorithmsReference bit

With each page associate a bit, initially = 0When page is referenced bit set to 1Replace the one which is 0 (if one exists)

Use additional reference bitsUse 8-bit shift registerOS periodically stores the reference bit in this storeReplace the page with smallest register value

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| U. K. Roy |

Second-Chance Page-Replacement AlgorithmSecond-Chance Page-Replacement Algorithm Extension of FIFO

Need reference bit

If page to be replaced has reference bit = 1 then:• set reference bit 0 (implies that the page will not be replaced until all

other pages are replaced—second chance)

• leave page in memory• replace next page (in FIFO

order), subject to same rules

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| U. K. Roy |

LRU Approximation AlgorithmsLRU Approximation AlgorithmsEnhanced Second chance

Need two reference bits• One indicates whether the page is referenced or not

• Other indicates whether the page has been modified(0, 0)—neither recently used nor modified—best page to replace(0, 1)—not recently used but modified—not so good to replace(1, 0)—recently used but clean—probably will be used soon(1, 1)—recently used and modified—worst page to replace

[ 04/08/23 09:13 ][ 04/08/23 09:13 ]


| U. K. Roy |

Counting AlgorithmsCounting Algorithms

Keep a counter of the number of references that have been made to each page

LFU Algorithm: based on the argument that the page is not being used frequently and will not be used later

MFU Algorithm: based on the argument that the page is being used frequently, so there is a small chance that the page will be used further

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| U. K. Roy |

Allocation of FramesAllocation of Frames

Each process needs minimum number of pages

Two major allocation schemesfixed allocation

• e.g. Equal allocation – For example, if there are 100 frames and 5 processes, give each process 20 frames.

Proportional allocation – Allocate according to the size of process

mSs

pa

m

sS

ps

iii

i

ii

for allocation

frames of number total

process of size

5964137127

56413710

127

10

64

2

1

2

a

a

s

s

m

i

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| U. K. Roy |

Priority AllocationPriority AllocationUse a proportional allocation scheme using priorities rather than size

If process Pi generates a page fault,select for replacement one of its framesselect for replacement a frame from a process with lower priority number

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| U. K. Roy |

Global vs. Local AllocationGlobal vs. Local Allocation

Global replacement – process selects a replacement frame from the set of all frames; one process can take a frame from another

Process can not control its own page fault rate

Local replacement – each process selects from only its own set of allocated frames

Less system throughput

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| U. K. Roy |

ThrashingThrashing

low CPU utilizationoperating system thinks that it needs to increase the degree of multiprogramminganother process added to the system

Thrashing a process is busy swapping pages in and out

If a process does not have “enough” pages, the page-fault rate is very high. This leads to:

Demand Paging and Thrashing Why does demand paging work?

Locality model

Process migrates from one locality to another

Localities may overlap

Why does thrashing occur? size of locality > total memory size

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| U. K. Roy |

Locality In A Memory-Reference PatternLocality In A Memory-Reference Pattern

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| U. K. Roy |

Working-Set ModelWorking-Set Model working-set window a fixed number of page references

Example: 10,000 instruction

WSSi (working set of Process Pi) =total number of pages referenced in the most recent (varies in time)

D = WSSi total demand frames

if D > m Thrashing Policy if D > m, then suspend one of the processes Selection of

if too small will not encompass entire locality

if too large will encompass several localities

if = will encompass entire program

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| U. K. Roy |

Page-Fault Frequency SchemePage-Fault Frequency Scheme

Establish “acceptable” page-fault rateIf rate too high, process gains frameIf no free frame available, suspend one or more processIf rate too low, process loses frame

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| U. K. Roy |

Other Issues – Page SizeOther Issues – Page Size

Page size selection must take into consideration:Fragmentationtable size I/O overheadlocality

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| U. K. Roy |

Other Issues – Program StructureOther Issues – Program StructureProgram structure

int data[128][128];Each row is stored in one pageNumber of frames = 1

Program 2

for (j = 0; j <128; j++) for (i = 0; i < 128; i++) data[i,j] = 0;

Program 1

for (i = 0; i < 128; i++) for (j = 0; j < 128; j++) data[i,j] = 0;

128 page faults

128 x 128 = 16,384 page faults

OS

Documents

system process suspension

database systems

operating systemsuttam

system processes

computer system convenient

system resources

process communication

process managementthe