TCL L42M61S2 SERVICE MANUAL MT02 1 Caution 2 2 Specification of Chassis 6 3 Theory of circuits 7 4 Alignment Procedure 16 5 Block Diagram 28 6 Schematic Diagram 30 7 Trouble shooting 49 8 53 9 BOM list This manual is the latest at the time of printing, and does not include the modification which may be made after the printing, by the constant improvement of product
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TCL L42M61S2 SERVICE MANUAL
MT02
1 Caution 2 2 Specification of Chassis 6 3 Theory of circuits 7 4 Alignment Procedure 16 5 Block Diagram 28 6 Schematic Diagram 30 7 Trouble shooting 49 8 53 9 BOM list
This manual is the latest at the time of printing, and does not include the modification which may be made after the printing, by the constant improvement of product
WARNING: TO REDUCE RISK OF FIRE OR ELECTRIC SHOCK, DO NOT
EXPOSE THIS APPLIANCE TO RAIN OR MOISTURE.
CAUTION: TO REDUCE THE RISK OFELECTRICAL SHOCK, DO NOT REMOVECOVER (OR BACK). NO USER SERVICEABLEPARTS INSIDE. REFER SER VICING TOQUALIFIED SERVICE PERSONNEL.
The lighting flash with arrowhead symbol, with an equilateral triangle is intended toalert the user to the presence of uninsulated voltage within the productsenclosure that may be of sufficient magnitude to constitute a risk of electric shock tothe person.
The exclamation point within an equilateral triangle is intended to alert the user to thepresence of important operating and maintenance (servicing) instructions in theliterature accompanying the appliance.
CAUTION:
Use of controls, adjustments or procedures other than those specified herein may result inhazardous radiation exposure.
CAUTIONRISKRISK OF ELECTRIC
SHOCK DO NOT OPEN.OPEN.
FOR YOUR PERSONAL SAFETY1. When the power cord or plug is damaged or frayed, unplug this television set from the wall outlet and refer servicing to
qualified service personnel.
2. Do not overload wall outlets and extension cords as this can result in fire or electric shock.
3. Do not allow anything to rest on or roll over the power cord, and do not place the TV where power cord is subject totraffic or abuse. This may result in a shock or fire hazard.
4. Do not attempt to service this television set yourself as opening or removing covers may expose you to dangerousvoltage or other hazards. Refer all servicing to qualified service personnel.
5. Never push objects of any kind into this television set through cabinet slots as they may touch dangerous voltagepoints or short out parts that could result in a fire or electric shock. Never spill liquid of any kind on the television set.
6. If the television set has been dropped or the cabinet has been damaged, unplug this television set from the wall outletand refer servicing to qualified service personnel.
7. If liquid has been spilled into the television set, unplug this television set from the wall outlet and refer servicing toqualified service personnel.
8. Do not subject your television set to impact of any kind. Be particularly careful not to damage the picture tube surface.
9. Unplug this television set from the wall outlet before cleaning. Do not use liquid cleaners or aerosol cleaners. Use adamp cloth for cleaning.
10.1. Do not place this television set on an unstable cart, stand, or table. The television set may fall, causing serious injuryto a child or an adult, and serious damage to the appliance. Use only with a cart or stand recommended by themanufacturer, or sold with the television set. Wall or shelf mounting should follow the manufacturer s instructions, andshould use a mounting kit approved by the manufacturer.
10.2. An appliance and cart combination should be moved with care. Quick stops, excessive force, and uneven surfacesmay cause the appliance and cart combination to overturn.
CAUTION:
Read all of these instructions. Save these instructions for later use. Follow all Warnings and
Instructions marked on the audio equipment.
1. Read Instructions- All the safety and operating instructions should be read before the product is operated.
2. Retain Instructions- The safety and operating instructions should be retained for future reference.
3. Heed Warnings- All warnings on the product and in the operating instructions should be adhered to.
4. Follow Instructions- All operating and use instructions should be followed.
IMPORTANT SAFETY INSTRUCTIONS
PROTECTION AND LOCATION OF YOUR SET
11. Do not use this television set near water ... for example, near a bathtub, washbowl, kitchen sink, or laundry tub, in awet basement, or near a swimming pool, etc.Never expose the set to rain or water. If the set has been exposed to rain or water, unplug the set from the walloutlet and refer servicing to qualified service personnel.
12. Choose a place where light (artificial or sunlight) does not shine directly on the screen.
13. Avoid dusty places, since piling up of dust inside TV chassis may cause failure of the set when high humidity persists.
14. The set has slots, or openings in the cabinet for ventilation purposes, to provide reliable operation of the receiver, toprotect it from overheating. These openings must not be blocked or covered.
Never cover the slots or openings with cloth or other material.Never block the bottom ventilation slots of the set by placing it on a bed, sofa, rug, etc.Never place the set near or over a radiator or heat register.Never place the set in enclosure, unless proper ventilation is provided.
PROTECTION AND LOCATION OF YOUR SET
15.1. If an outside antenna is connected to the television set, be sure the antenna system is grounded so as to provide someprotection against voltage surges and built up static charges, Section 810 of the National Electrical Code, NFPA No.70-1975, provides information with respect to proper grounding of the mast and supporting structure, grounding of thelead-in wire to an antenna discharge unit, size of grounding conductors, location of antenna discharge unit, connectionto grounding electrode, and requirements for the grounding electrode.
15.2. Note to CATV system installer : (Only for the television set with CATV reception)
This reminder is provided to call the CATV system attention to Article 820-40 of the NEC that providesguidelines for proper grounding and, in particular, specifies that the cable ground shall be connected to the groundingsystem of the building, as close to the point of cable entry as practical.
16. An outside antenna system should not be located in the vicinity of overhead power lines or other electric lights or powercircuits, or where it can fall into such power lines or circuits. When installing an outside antenna system, extreme careshould be taken to keep from touching such power lines or circuits as contact with them might be fatal.
17. For added protection for this television set during a lightning storm, or when it is left unattended and unused for longperiods of time, unplug it from the wall outlet and disconnect the antenna. This will prevent damage due to lightningand power-line surges.
ANTENNALEAD- IN WIRE
ANTENNA DISCHARGE
UNIT (NEC SECTION
810-20)
GROUNDING
CONDUCTORS
(NEC SECTION810-21)
GROUND CLAMPS
POWER SERVICE GROUNDING
ELECTRODE SYSTEM
(NEC ART 250. PART H)
ELECTRIC SERVICEEQUIPMENT
GROUND CLAMP
NEC-NATIONAL ELECTRICAL CODE
EXAMPLE OF ANTENNA GROUNDING AS PER
NATIONAL ELECTRICAL CODE
EXAMPLE OF ANTENNA GROUNDING AS PER NATIONAL ELECTRICAL CODE INSTRUCTIONS
a built-in
installer s
OPERATION OF YOUR SET
18. This television set should be operated only from the type of power source indicated on the marking label.If you are notsure of the type of power supply at your home, consult your television dealer or local power company. For televisionsets designed to operate from battery power, refer to the operating instructions.
19. If the television set does not operate normally by following the operating instructions, unplug this television set from thewall outlet and refer servicing to qualified service personnel. Adjust only those controls that are covered in the operatinginstructions as improper adjustment of other controls may result in damage and will often require extensive work by aqualified technician to restore the television set to normal operation.
20. When going on a holiday : If your television set is to remain unused for a period of time, for instance, when you go ona holiday, turn the television set and unplug the television set from the wall outlet.
IF THE SET DOES NOT OPERATE PROPERLY
21. If you are unable to restorenormal operation by following the detailedprocedure in your operating instructions,do not attempt any further adjustment. Unplug the set and call your dealer or service technician.
22. Whenever the television set is damaged or fails, or a distinct change in performance indicates a need forservice, unplug the set and have it checked by a professional service technician.
23. It is normal for some TV sets to make occasional snapping or popping sounds, particularly when beingturned on or off. If the snapping or popping is continuous or frequent, unplug the set and consult yourdealer or service technician.
FOR SERVICE AND MODIFICATION
24. Do not use attachments not recommended by the television set manufacturer as they may cause hazards.
25. When replacement parts are required, be sure the service technician has used replacement parts specifiedby the manufacturer that have the same characteristics as the original part. Unauthorized substitutionsmay result in fire, electric shock, or other hazards.
26. Upon completion of any service or repairs to the television set, ask the service technician to performroutine safety checks to determine that the television is in safe operating condition.f
Aspect Ratio 16:9 Color Temperature Adjustable(Cold,Warm,Standard) SIGNAL FORMAT CAPABILITYBacklight Adjustable Yes Component Video Format Y,Pb/Cb,Pr/Cr: up to 720p,1080i@50Hz/60HzScaler Mode 16:9,16:9 subtitles,4:3,Cinema DVI Video Format -Picture Effect 4 (Bright,Standard,Soft,Personal) HDMI Video Format (720p,1080i)@50Hz/60HzFilm Mode (3:2 pull down) Yes PC Compatibility VGA/HDMI: Up to SXGA (1280*1024 @75Hz)Picture Enhancement TERMINALS Comb Filter 3D Audio/CVBS Input (Composite) 3 Video + 3 R/L :AV1 and AV2 rear,AV3(side) Gamma Correction Yes S-Video Input 1
3D+ Engine (Advanced flesh tone and color processing) Audio Input for S-Video Share with AV2MDDi Engine (2nd generation proprietary de-interlacing technology) YPbPr Input 1
Blue Stretch - Audio Input for YPbPr 1 R/L Black Stretch Yes YCbCr Input Share with "YPbPr"
Automatic Luma/Chroma Gain Control Yes Audio Input for YCbCr Share with Audio Input for "YPbPr" DLTI Yes VGA Input(RGB) 1 (D-Sub,15-Pin) DCTI Yes Audio Input for RGB 1 ( 3.5mm) Dynamic Skin Correction Yes DVI - DNR Yes (Motion-adaptive 3D Noise Reduction) Audio Input for DVI -Panel Specification HDMI 1 Panel supplier LPL Audio/CVBS Output (Composite) 1 (R/L+CVBS) (RCA) Viewing Technology SIPS Woofer Output 1 Display Resolution WXGA (1366*768) Headphone Output 1 ( 3.5mm ) Brightness (cd/m2) 500 RF Input(Antenna) 1 (F Type) Contrast Ratio 1000:1 USB - Response Time 5ms (G to G) BASIC INFO. Viewing Angle (H/V) 178°/178° TV System NTSC M,PAL M/N Life Time 50,000hrs (min) AV System NTSC/PAL Color 16.7M Channels 125(CATV)+68(Antenna) free program presets
SOUND Chassis MT02Speakers 2 Integrated (bottom side) Certification CBAudio Power Output 8W*2 Power Supply AC 110V-240V 50/60HzSound Processing MTS Stereo(BTSC-SAP) Power Consumption-TV on 220WDVSS(Dolby Virtual Surround) - Power Consumption-Standby Less than 3WAVC(Auto Volume Control) Yes Default Color of Front Cabinet BlackBBE - Keyboard Position TopSRS - Base Stand Detachable Yes
Unpackaged Dimension for Main Body (L*H*D) (mm) With Base Stand (mm) 1058*765*270
Sound Control Volume,Balance,Sound Effects etc.. Without Base Stand (mm) 1058*711*116FUNCTION Packaged Dimension (L*H*D)
V-Chip Yes Main Body (mm) 1211*889*364CCD(Closed Caption) Yes Speaker Box (mm) --Teletext - Base Stand (mm) Packaged with Main BodyPIP/POP - Net Weight (Kg) 27.5 (Main Body and Base Stand)Macro Vision Yes Gross Weight (Kg) 33 (main body and base stand)Calendar - Container Loading Clock/Timers 24h Timer turn ON/OFF;Sleep timer 20 feet 56 With base standLock Yes (parental lock) 40 feet 118 With base standOSD language English/Spanish/Portuguese/French 40 feet high 177 With base standOSD Features - ACCESSORIESCard Reader - Operation Manual English(Default)DVD Combo - Remote Control For TV control (with two 5# batteries)USB Connection - Base Stand YesGame - Speaker Box IntegratedScreen Saver - Wall Mount Optional (WMB400)Demo Function - Others AC Power cordFavourite Channels Yes (6)
Design and specifications are subject to change without notice! Page 1 of 1
Approved by:
Drafted by:
Model: L42M61S2
Sound Effects (Stereo,Music,News,Movie,Personal),AVL,Treble,Bass,WooferSound Features
Core Technology
Theory of circuitsChassis MT02 adopt MT8202 of MTK Company. MT8202 is configured with video decoder, audio
decoder, CPU, decoder, and picture quality processor. Power supply unit is JSK4338. This chassis is
high picture performance and fully integrated IC, matching circuit and alignment is very simple.
Refer to LCD42K73/MT02 as representative, the power consumption is 240W Max. , the standby
consumption is less than 1W. The Sound speaker’s power is 2x8W.The PSU(power supply unit) has 3
part voltage output: 5v for standby, 24v for inverter, 12v for signal process.
This chassis compose of 7 boards, they are main board, tuner board ,AV board, side AV board, keypad
board, USB board, power board.
The unit supports 1x RF in, 2XAV,1x S-video and common AV audio input. 2xUSB input , one way has
print function, the another way connect with high definition signal source ,it supports SDTV, HDTV, The
highest signal format reaches 1920 1080@60I 1xVGA input, supports the signal format have VGA,
SVGA XGA SXGA 1xheadphone output ,1x AV output. 1xHDMI input , supports most of HDMI format
of video and audio input.
Chapter I Signal Flowing Introduction
There are 7 boards for signal process: main board, tuner board, AV board, side AV board, keypad board,
USB board, power board. Section I Tuner board signal flowing introduction
Turner board mostly assemble are turner and I2C bus control TDA9886 and audio .video SAW filter circuit.
TV signal flow: 75OMH antenna received high frequency TV signal input to tuner U601A disposal. U601A is a common tuner .through tuner inside circuit disposal: high frequency amplifier, mixing, filtering, IF amplifier, detection, pre-video amplifier, AGC, AFT, PLL etc. From U601A output IF signal through Z610,Z611 disposal, PIF and AIF signal send to Pin1,Pin2,Pin23,Pin24 of IC601, after TDA9886 IF amplifier disposal, from pin17 output color full TV signal into audio disposal circuit process .
TDA9886 is multi system video and audio IF signal PLL demodulator without adjustment, using for positive and negative modulator and AM/FM processor. Characters as follow:
1. Power supply voltage of 5V 2. Gain controlling broad band PIF amplifier AC coupling 3. Multi standard synchronization demodulation, linearity demodulation 4. Multi system PIF 5. Audio IF disposal IC
This manual just used for experienced technician, not for any public people. There is not any caution and mention in this manual for one whom unqualified technician attempt to service this product. This product should be serviced by special technician, only other persons attempt to service it might have heavy hurt even have life hazard.
6. Audio apart circuit 7. Reducing the picture interference from audio 8. Full integrated VCC 9. 4M norm frequency input 10. Accurate fully digital AFC detector, 4 bit ADC, through IIC BUS exchange AFC data. 11. Through IIC adjusts receive point 12. SIF-AGC, gain control SIF amplifier single norm QSS 13. AM demodulation without outside reference circuit 14. Choose FM-PLL demodulation without adjustment ,high linearity and low noise
Pin function OSD NO FUNCTION VIF1 1 VIF difference input
1VIF2 2 VIF difference input
2NC Empty pin OP1 3 Output port 1 FMPLL 4 Loop filter FM-PLL DEEM 5 Get rid of aggravate
output AFD 6 AF demodulation
coupled DGND 7 Figure grounding NC Empty pin AUD 8 Audio input TOP 9 Tuner received point SDA 10 IIC data input and
signal output VAGC 16 VIF_AGC NC Empty pin CVBS 17 Complex video
signal output NC Empty pin AGND 18 Analog grounding VPLL 19 Loop filter FM-PLL VP 20 Power supply AFC 21 AFC output OP2 22 Output port 2 NC Empty pin SIF1 23 SIF difference input
1SIF2 24 SIF difference input
2NC Empty NC Empty
Section II Digital board signal flowing introduction
LCD42K73/MT02 digital board chassis adopted ICs are U27-DC change DC disposal circuit, makes the 12v changed to 5v, U21 U23 U24 U37-AZ1117 are three-terminal voltage regulator, it makes 3.3v changed to 1.8v; U3-MT8202 IC include CPU, audio/video decoder, picture tone disposal etc functions; U4 U5-M13S128168 8M picture ,audio memory, U7-29LV160 saves CPU programs; U36-CM2021 HDMI socket prevent static regulator; U8-MT8293 HDMI decode regulator; U11-EEPROM 24C02; U12-CS5340 audio A/D change input ; U13-HEF4052 audio change switch U14-P15V330 video change switch.; Signal input:
Signal input include:one way RF signal,three ways AV signal, VGA,HDMI,YUV. 1 RF input From high frequency board sends CVBS connected to digital board through JP6. Video signal: from pin5 of the JP6 sends CVBS signal, through R354 limiting current, coupled by CE197 signal
sent to Q3 and video signal amplify , from emitter of Q3 sent video signal to D25pin of 8202 IC, process TV video signal decode disposal.
Audio signal: audio signal from pin7 of JP6 sent out and separate two paths TUMPX1 TUMPX2 signal. They are through filter which compose of R212 C48 C139 and R215 C143 R216 C144, the audio signal after filter input to C26pin B26pin of U3 process audio signal decode.
2 AV signal input From CN2 CN5 CN7 input AV1 AV2 AV3 signal, each through D11 D12 D13 prevent static protection
IC process disposal. Video signal: Video signal AV1_ V/AV2_ V/AV3_ V A1/A2/C1 sent to U3 process picture signal disposal.
AV1 AV2 AV3 video signal: From JP603 JP604 JP605 sent AV1 AV2 AV3 video signal through D11 D12 D13 prevent static
protection IC process disposal. Video signal after filtering by filter which compose of C11 R118 C13 R119C7 C8 R96 R101, then input U3’s PinD26, PinE26, PinE25 and disposal video signal.
Audio signal: Audio signal of AV1 AV2 AV3 from JP603 JP604 JP605 output L/R audio signal, through filter circuitry
which compose of CE15 R26 CE18 R34 CE17 R28 CE20 R36 and input audio switch IC U2, through U2 to change the audio signal for corresponding signal channel and output L/R audio signal from Pin13 and Pin3, then send to digital audio disposal IC U3. The digital audio signal from U3’s P1~P4 pin output, through U15 digital/simulative change ,output L/R simulative audio signal send to audio power amplifier U17A.
3 S-video signal input video channels: S-video signal from JP607 input, the Y C signal separate two ways to process. First channel signal :pin1 of JP607 output Y signal through R46 limiting current and coupled by C14 get
AVSY0 signal connected to Pin F25 of U3 to process video disposal. Second channel signal; pin2 of JP607 output Y signal through R44 reduced voltage, FB10 C16 C17 restrain
noise signal interference and filter , coupled by C17 and get AVSC0 input PinF26 of U3 to process video disposal. Audio channel: share with the channel of AV3.
4 YUV HDTV input From CN1 input Y U V signal, through L53 L54 L55 filtering , CN2 connected audio signal. Video channel: Y U V signal separate through R199/R55 R203/R206 R207/R210 limiting current, coupled
by C112/C115 C119/C122 C129/C133. The signal of YO+/YO- PBO+/PBO- PRO+/PRO- connected to U3’s PinP25 P26 N25 N26 I25 I26 process video disposal.
Audio signal: Pin4 and pin2 of the CN2 output YUV_AUDIO_L YUV_AUDIO__R audio signals separate through CE192 CE193
coupled, then filter by R350/R351 R352/R353. Direct input PinA25/A26 of U3 to proceed audio decode disposal. 5 VGA signal input From P2 input VGA’s R G B horizontal and vertical signal. Video channel: From P2 output VGA’s R G B signal through R131/R137/R145 limiting current, coupled by
C88/C92/C97 and get RED+/RED- GREEN+/GREEN- BLUE+/BLUE- signal separate connected with U3’s
PinR26/R25 PinT26/T25 PinU26/U25, pin14 and pin13 of P2 output H/V signals separate through R332 R333C100 C102 coupled to PinV25 and PinV26 of U3 to proceed video signal disposal.
6 HDMI signal input P1 input HDMI signal, dispart as one couple of clock signals and three couples of data signal. Pin12 and pin10
of P1 output R1XC- R1XC+ clock signal through IC U36 disposal then connected to pin50 and pin51 of U8(MT8293),pin9/pin7/pin6/pin4/pin3/pin1 output DATA0-/DATA0+ DATA1-/DATA1+ DATA2-/DATA2+dates through U36 disposal then connect to pin54 /pin55/pin58/pin59/pin62/pin63 of U8,after U8 disposal then dispart as two paths output.
Video channel: pin95 –pin92/pin99-pin105/pin108-pin111, pin114- pin117/pin121-pin124/pin110-pin113 of U8, output 24 bits date signal VI[0 23],through RN26~RN32 connected to U3’s AF20 AE20 AD20 AD21 AC21AF22 AE22 AD22 AF23 AD23 AF24 AE24 AD24 AF25 AF26 AE25 AE26 AD25 AD26AC25 AC26 pin1 and pin128 of U8 output HDMI-HS H/V synchronization signals; process video processing... Pin71-pin74 of U8 output four paths digital audio signal separate connected to pin AA23~AA26 of U3 to process digital audio decode processing..
Video signal processing: Through first channel input U3’s CVBS signal, AV signal, S-VIDEO signal, YUV signal, through inside
option switch control output analog signals, after analog to digital conversion module makes the analog signal change to digital signal.
Under U3’s memory controller controlling, the built-in video decoder, format converter and external flash U4,U5(M13S128168 8M), the signal through 3D comb filtering, color decoder, synchronization signal disposal, VBI amplitude limitation, diagonal angle disposal, noise reducer, progressive converter, format zoom converter, picture quality enhance and so on disposal, and generate main picture’s display matrix.
Through second channel input U3 digital signal, under the MCU controlling, to improve picture quality of sub-picture, and generate display matrix of sub-picture. the two pictures’ signal will be processed picture cover disposal, r correction, LCD speedup drive. OSD display cover disposal, then process output format conversion , changed to LVDS format. Under LVDS transport controller controlling and output display signal to LCD screen interface.Audio signal processing
There were two kinds of signal input to U3: Sound IF signals, chose by switch inside IC, after gain enlarge, after analog to digital converter change to
digital signal. Then send to NICAM decoder, and demodulated audio signal; L/F channels of audio signal chose by switch inside IC after analog to digital converter change to digital
signal. The audio signal which chose by sound switch output from one disposal channel.
Speaker channel: After sound effect disposal, through ADC modulus changed to analog signal. It out from PinA18/A17 of U3, separate input sound disposal circuit, then output to speaker to restore the sound.
Signal output: AV channel output: Video signal: Pin B25 of U3 output simulation complex video signal, after coupled by R181 CE67 and sent to
base of Q7, output from emitter of Q7, then through capacitor CE68 coupling output complex video signal.
A9 B9 A8 B8 of U3 output R G B LVDS signal separate connected to pin1~6\10~13\15~16\18~19/22~23 of JP11;P25 pin R26 pin of U3 output DHS H DVS V synchronization signals connected to pin9 and pin8 of JP11,from U3 output CLK+/CLK-display synchronization clock signals connected to pin21 and pin20 of JP11;From U3 output controlling signal connected to pin28 and pin29,pin30 of JP11,then from the cable output to display circuit of LCD, LCD display the picture.
From pinAC18 of U3 output controlling signal PPWR connected to R156 and base of Q31,mixed with +5V,output to pin26 and pin27 of JP11,supply the working power to screen of LCD.
OCM signal controlling: EPROM controlling: U3 through fllowing connection to control the U7: From pinA5 of U3 output signal to control EPROM operation, pinB5 of U3 output signal to control EPROM of
read operation, pinJ2 of U3 output signal to control EPROM of writing operation.
U3 and U7 through following connection to exchange the date. Pin and U7’s
pin10\9\1617\48\1\2\3\4\5\6\7\8\18\19\20\21\22\23\24\25 connected was address line and pin44\42\40\38\35\33\31\29 of U7 connected were data lines
Turn on/off controllingTurn off: through standby turn off,makes the ON/OFF signal output low level ,power board detected ON/OFF
signal output low leve and makes the 12v and 24v shut down, so that into standby state, follow two ways enter standby situation:
when OCM received standby signal, remove control receiver connected to pin7 of JP9, MCU identified the standby order and makes ON/OFF output low level.
real time clock setting controlling, when the timing off is out , then MCU makes ON/OFF output low level. Turn on: ON/OFF signal makes MCU output high level that can turn on the TV, power board detected ON/OFF
signal output high level and the 12v and 24v output. Follow three ways can turn on the TV: When the remove control send out turn on order.
detected PRG+/PRG- button on local control board be pressed. Real time setting control, the turn on time is outing.
Mute circuit controlling: Turn on/off mute
Turn on: when the power booting, at first point, +12v voltage through R59 Q14 charges to C283.makes Q14 turnon, thus output high level pulse, then through Q21 reverse phase output low level pulse ,makes sound power amplifier U16 in standby model, thus it was mute when turn it on.
Turn off :after cut off the power supply, as the 12v voltage was disappear ,but C283 still has voltage,Q15 turn on, makes C283 discharge from Q15,thus output high level pulse , then through Q21 reverse phase output low level pulse ,makes power amplifier U16 in standby model, thus it is muting when turn it off.
MCU controlling mute Controller U3’s Pinw4 send high level pulse signal, it through R336 Q21 makes the sound power amplifier
U16 in standby state ,so that can control turn off in mute state.
Section III Power board signal flow introduction
Input characteristics:
Surge current :100A max when input 220vac
Output characteristics:
Output protection characteristics:
Protect controlling:
Short circuit protection, while there is short circuit in output path, the power supply unit entered short circuit protect,
it is can start up again while short circuit is removed.
Over voltage protection: while voltage output is over voltage, the circuit entered protection situation, it means no voltage output. Over temperature protection, while the temperature rise to abnormal, the circuit entered protection situation, when
the temperature decrease to normal, the power supply unit restore normal.
1 choose project
A Main IC
Using regulated power supply controlling IC L6563 and L6599 of SANTE company.
Basic characteristics:
Two levels over current protection
B Standby IC
Using VIPER22 power supply standby controlling IC of SANTE company, input voltage range:180v-264v,max
MT8202CGPreliminary specifications are subject to change without notice HDTV-Ready Flat Panel TV Controller
Page 1
The MT8202CG is a highly integrated chip with a cost-effective and high performance HDTV-ready solution for the flat panel TV manufacturers. It supports flat panel TV video/audio input and output formats and HDTV as well. The MT8202CG includes a 3D comb filter of the TV decoder retrieving the best video from composite signals and embedded HDTV/VGA decoders perfectly reproducing the high bandwidth input signals. A 24/16/8 bit digital port can accept a variety of external digital video inputs.
2nd generation motion-adaptive deinterlacer converts interlace to progressive video. In addition, a 2D graphic processor can overlay on-screen displays (OSD) on the progressive video. Advanced full function color processing with a full 10-bit path provides high-quality video contents. Two independent flexible scalers can simultaneously process two different video sources and provide the wide adoption for various flat panels.
An on-chip audio processor with a lip sync control decodes analog signals received from the tuner, delivering high-quality post-processed sound effect to customers. An on-chip microprocessor reduces the system BOM and shortens the schedule of UI design by high level C program.
FEATURES
Video Input Fully programmable eight composite/S-Video input pins Two component inputs with SDTV format and HDTV 480p/720p/1080i formats One VGA input including SOG signals up to SXGA (1280x1024x75Hz) DVI 24-bit RGB digital input CCIR-656/601 digital input
TV decoder Full 10-bit data path to enhance the video resolution and reduce digital truncation errors
PAL (B,G,D,H,M,N,I,Nc), PAL(Nc), PAL, NTSC, NTSC-4.43 and SECAM Automatic Luma/Chroma gain control Automatic TV standard detection 2nd generation NTSC/PAL motion-adaptive 3D comb filter with huge improvements Motion-adaptive 3D noise reduction Macrovision detection Adjustable horizontal delay for combination of SCART composite/RGB input
Video Processor Full 10-bit processing to enhance the video quality Advanced flesh tone and color processing Gamma/anti-Gamma correction Advanced Color Transient Improvement (CTI) 2D Peaking Advanced horizontal/vertical sharpness Saturation/hue adjustment Brightness and contrast adjustment Black level extender White peak level limiter Adaptive Luma/Chroma management Automatic film or video source detection 3:2/2:2 pull down source detection 2nd generation advanced motion-adaptive de-interlacing Arbitrary ratio vertical/horizontal scaling of video, from 1/32X to 32X Advanced linear and non-linear panoramic scaling Programmable zoom viewer Progressive scan output Picture-in-Picture (PIP) Picture-Outside-Picture (POP) Advanced dithering processing for flat panel display with 6/8/10-bit output Frame rate conversion; 50Hz to 75Hz
Audio DSP Supports BTSC/EIAJ/A2/NICAM decoders Stereo and SAP demodulations Noise reduction Mode selections (Main/SAP/Stereo)
ssed sound effectound efessor reduces the sssor reduces t
dule of UI designule of UI de
y programmable eiprogrammablns
Two component inTwo compo480p/720p/1080480p/720pOne VGA ne VG(1280x10(128DVI 2C
ive 3D noise reductie 3D noise ron detection
able horizontal delaorizmposite/RGB input posite/RGB inp
ideo Processor deo ProFull 10-bit prFull 10-bAdvancedAdvaGammGAd
MT8202CG PRELIMINARY, SUBJECT TO CHANGE WITHOUT NOTICE MTK CONFIDENTIAL, NO DISCLOSURE
Page 2
Pink noise and white noise generator EqualizerSub-woofer/Bass enhancement Noise automatic mute 3D surround processing with virtual surround Audio and video lip synchronization Supports reverberation
Audio Input/Output Decodes audio AF from the tuner Two-channel audio L/R digital line in 7.1-channel slave digital line in Including a full 7.1-channels digital output, two- channel bypass and two-channel headphone output Three embedded internal DAC outputs
DRAM Controller Supports up to 32MB SDR/DDR DRAM Supports 2x16-bit SDR/DDR bus interfaces A built-in programmable DRAM interface clock optimizes DRAM performance Programmable DRAM access cycle and refresh cycle timings Supports 3.3/2.5-V SDR/DDR Interfaces
Video Output TV patterns generator for testing Supports up to 1366 horizontal points 6/8/10-bit single channel or 6/8/10-bit dual channel LVDS output Supports mirror and upside down images
2D-Graphic/OSD processor
Two backend OSD planes at RGB domain and one OSD plane at YUV domain Supports Text/Bitmap decoder Supports line/rectangle/gradient fill Supports bitblt Supports color key function Supports clip mask Supports alpha blending with video output A 256/16/4/2-color bitmap-formatted OSD Automatic vertical scrolling of OSD images Supports OSD mirror and upside down images
Host Micro-controller Turbo 8032 micro-controller A built-in internal 373 and 8-bit programmable lower address port 2048-byte on-chip RAM Up to 4M bytes FLASH-programming interface Supports 5/3.3-Volt. FLASH interface Supports power-down mode Supports additional serial ports IR controls serial inputs Support two RS232 interfaces for external source communication Supports two PWM outputs A programmable GPIO setting for complex external device controls
Outline 388-pin BGA package 3.3/2.5/1.8-V operating voltages 0.18 m process
0-bit dual channel dual cha
own images mages
sor
o output putmatted OSD matted OSD
g of OSD images of OSD imand upside down imagd upside down
er r micro-controller ro-contro
n internal 373 and 8rnal 373 as port
48-byte on-chip RAM8-byte on-chip Up to 4M bytes FLAUp to 4M byteSupports 5/3.3-VSupporSupports powSupportsSupports SupIR coISu
MT8202CG PRELIMINARY, SUBJECT TO CHANGE WITHOUT NOTICE MTK CONFIDENTIAL, NO DISCLOSURE
Page 3
Functional Block Diagram
Analog Switch
Built-in analog switches connect to seventeen input signals and it is necessary to add external components and analog video multiplexes on the printed circuit board (PCB).
There are nine high-speed differential input pairs for three sets of YPRPB/VGA input signals.
The eight composite/S-Video input pins can be fully programmed to connect to any AV/S-Video inputs.
ADC/ Selected Source
The video ADC converts analog input signals to digital signals. The selected sources multiplex all inputs from digital and analog video ports and route them into data path.
Audio Interface
The audio interface accepts analog audio signals from the tuner, for example, AF. It also includes preprocessing circuit to filter the noise. Audio decoder decodes the BTSC or NICAM, and outputs high-quality sound with enhanced 3D surround post processing.
Embedded 7.1 channel digital audio input (slave) and 2 channels (master) digital audio inputs.
Embedded three high performance audio DACs.
DSP
HDMI Receiver
RGB
LVDS
PIP Select ADC
TVD
TVD
Selected Sources
MDDi Scalar
OSD
2D-G
DD
R/SD
R D
RA
M
AV/SV inputs X 8
YPbPr X2
8032
RG
B2Y
U
Tuner
Analog Sw
itch Color
Gamma
Audio I/F
Flash
LCD Panel Audio DAC
Audio AMP
nect to seventeen inpo seventeed (PCB).
peed differential inpudifferentia
site/S-Video input pite/S-Video inp
elected Source lected Source
video ADC converideo ADC coports and route them nd route th
Audio InterAudio
The audTAud
LVDS
alar
DD
R/SD
R
MP
MT8202CG PRELIMINARY, SUBJECT TO CHANGE WITHOUT NOTICE MTK CONFIDENTIAL, NO DISCLOSURE
Page 4
DSP
DSP implements audio decoding and intensive computing jobs. The downloadable micro-code enables fast functional convergence forvarious audio standards.
An advanced DSP engine supports full functions of sound effects.
MDDi/Scaler
MDDi is MediaTek’s proprietary de-interlacing technology. 2nd generation MDDi solution provides improved low angle processing and accurate motion detection for all interlaced sources. The techniques successfully reduce jagged edges and broken images. The MDDi engine supports both main and sub channel of SDTV inputs or one channel of 1080i high quality de-interlacing.
Two independent scalers support full functions of PIP/POP and frame rate conversion.
With MDDi and the high quality scalers, MT8202CG guarantees all input formats can be translated with the best video quality for motion and still pictures.
Color/Gamma
MT8202CG includes advanced color management function allowing users to improve video quality with full flexibility. With contrast/hue/saturation/Gamma/anti-Gamma/flesh tone functions, MT8202CG delivers the best video quality with lifelike color.
An advanced dither function supports 6/8/10-bit video output for any kinds of display unit (LCD, PDP, CRT).
8032
An on-chip Turbo8032 provides cost-effective environment for system house. Well-proven F/W can significantly ease the system design.
2D-G/OSD
On-chip graphic engine draws bitmap OSD and stores them into DRAM. OSD accesses data from DRAM and displays on the screen.
With 2D-G and OSD, the computing power requirement of P can be minimized.
This document contains information that is proprietary to MediaTek Inc. Unauthorized reproduction or disclosure of this information in whole or in part is prohibited
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GL850A USB 2.0 Low-Power HUB Controller
2000-2005 Genesys Logic Inc. - All rights reserved. Page 9
CHAPTER 3 PIN ASSIGNMENT
3.1 Pinouts
GL850A
LQFP - 48
AV
DD
1
AG
ND
2
DM
03
DP0
4
DM
15
DP1
6
AV
DD
7
AG
ND
8
DM
29
DP2
10
RR
EF11
AV
DD
12
AM
BER
2/E
E_D
I
GR
EEN
2/EE
_DO
DV
DD
DG
ND
AM
BER
3
GR
EEN
3
NC
TEST
RES
ET#
DV
DD
DG
ND
AM
BER
4
36 35 34 33 32 31 30 29 28 27 26 25
PSELF 37
DGND 38
DVDD 39
PGANG/SUSPND 40
OVCUR1# 41
PWREN1# 42
DGND 43
DVDD 44
GREEN1/EE_SK 45
AMBER1/EE_CS 46
DGND 47
DVDD 48
GREEN4
DP4
DM4
AGND
AVDD
DP3
DM3
AGND
AVDD
X2
X1
AGND
24
23
22
21
20
19
18
17
16
15
14
13
Figure 3.1 GL850A 48 Pin LQFP Pinout Diagram
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3.2 Pin List
Table 3.1 GL850A 48 Pin List
Pin# Pin Name Type Pin# Pin Name Type Pin# Pin Name Type Pin# Pin Name Type1 AVDD P 13 AGND P 25 AMBER4 O 37 PSELF I
2 AGND P 14 X1 I 26 DGND P 38 DGND P
3 DM0 B 15 X2 O 27 DVDD P 39 DVDD P
4 DP0 B 16 AVDD P 28 RESET# I 40 PGANG/SUSPND B
5 DM1 B 17 AGND P 29 TEST I 41 OVCUR1# I
6 DP1 B 18 DM3 B 30 NC - 42 PWREN1# O
7 AVDD P 19 DP3 B 31 GREEN3 O 43 DGND P
8 AGND P 20 AVDD P 32 AMBER3 O 44 DVDD P
9 DM2 B 21 AGND P 33 DGND P 45 GREEN1/EE_SK B
10 DP2 B 22 DM4 B 34 DVDD P 46 AMBER1/EE_CS B
11 RREF B 23 DP4 B 35 GREEN2/EE_DO B 47 DGND P
12 AVDD P 24 GREEN4 O 36 AMBER2/EE_DI B 48 AVDD P
Table 3.2 GL850A 64 Pin List
Pin# Pin Name Type Pin# Pin Name Type Pin# Pin Name Type Pin# Pin Name Type
1 AGND P 17 RREF B 33 NC - 49 AMBER2/EE_DI B
2 NC - 18 AVDD P 34 GREEN4 O 50 PSELF I
3 DM0 B 19 AGND P 35 AMBER4 O 51 DGND P
4 DP0 B 20 X1 I 36 DGND P 52 DVDD P
5 NC - 21 X2 O 37 DVDD P 53 PGANG/SUSPND B
6 NC - 22 AVDD P 38 RESET# I 54 OVCUR2# I
7 NC - 23 AGND P 39 TEST I 55 PWREN2# O
8 DM1 B 24 NC - 40 OVCUR4# I 56 OVCUR1# I
9 DP1 B 25 DM3 B 41 PWREN4# O 57 PWREN1# O
10 NC - 26 DP3 B 42 OVCUR3# I 58 DGND P
11 AVDD P 27 NC - 43 PWREN3# O 59 DVDD P
12 AGND P 28 AVDD P 44 GREEN3 O 60 GREEN1/EE_SK B
13 NC - 29 AGND P 45 AMBER3 O 61 AMBER1/EE_CS B
14 DM2 B 30 NC - 46 DGND P 62 DGND P
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15 DP2 B 31 DM4 B 47 DVDD P 63 AVDD P
16 NC - 32 DP4 B 48 GREEN2/EE_DO B 64 AVDD P
3.3 Pin Descriptions
Table 3.3 - Pin Descriptions
USB Interface
GL850APin Name
48Pin# 64 Pin#I/O Type Description
DM0,DP0 3,4 3,4 B USB signals for USPORT
DM1,DP1 5,6 8,9 B USB signals for USPORT1
DM2,DP2 9,10 14,15 B USB signals for USPORT2
DM3,DP3 18,19 25,26 B USB signals for USPORT3
DM4,DP4 22,23 31,32 B USB signals for USPORT4
RREF 11 17 B A 680 resister must be connected between RREF andanalog ground (AGND).
Note: USB signals must be carefully handled in PCB routing. For detailed information, please refer toGL850A Design Guideline.
HUB Interface
GL850APin Name
48Pin# 64 Pin#I/O Type Description
OVCUR1#~4 41 56,54,42,40
I(pu)
Active low. Over current indicator for DSPORT1~4OVCUR1# is the only over current flag for GANGmode.
PWREN1#~4 42 57,55,43,41 O
Active low. Power enable output for DSPORT1~4PWREN1# is the only power-enable output for GANGmode.
GREEN1~4 45,35,31,24
60,48,44,34
O(pd)
Green LED indicator for DSPORT1~4*GREEN[1~2] are also used to access the external EEPROMFor detailed information, please refer to Chapter 5.
AMBER1~4 46,36,32,25
61,49,45,35
O(pd)
Amber LED indicator for DSPORT1~4*Amber[1~2] are also used to access the external EEPROM
EE_CS/EE_DI - - I Used to access the external EEPROM.
For detailed information, please refer to Chapter 5.
PSELF 37 50 I 0: GL850A is bus-powered.1: GL850A is self-powered.
PGANG/SUSPND 40 53 B
This pin is default put in input mode after power-onreset. Individual/gang mode is strapped during thisperiod. After the strapping period, this pin will be set to
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output mode, and then output high for normal mode.When GL850A is suspended, this pin will output low.*For detailed explanation, please see Chapter 5Input: 0: individual, 1: gangOutput: 0: suspend, 1: normal
Clock and Reset Interface
GL850APin Name
48Pin# 64Pin#I/O Type Description
X1 14 20 I 12MHz crystal clock input.
X2 15 21 O 12MHz crystal clock output.
RESET# 28 38 IActive low. External reset input, default pull high 10K .When RESET# = low, whole chip is reset to the initialstate.
System Interface
GL850APin Name
48Pin# 64 Pin#I/O Type Description
TEST 29 39 I(pd)
0: Normal operation.1: Chip will be put in test mode.
Power / Ground
GL850APin Name
48Pin# 64 Pin#I/O Type Description
AVDD 1,7,12,16,20
11,18,22,28,64 P 3.3V analog power input for analog circuits.
AGND 2,8,13,17,21
1,12,19,23,29 P Analog ground input for analog circuits.
DVDD 27,34,39,44
37,47,52,59 P 3.3V digital power input for digital circuits
DGND26,33,38,
43,47
36,46,51,58,62 P Digital ground input for digital circuits.
NC 30
2,5~7,10,13,16,24,27,30,33
- No connection
Note: Analog circuits are quite sensitive to power and ground noise. PCB layout must take care the powerrouting and the ground plane. For detailed information, please refer to GL850A Design Guideline.
Notation:Type O Output
I InputB Bi-directionalB/I Bi-directional, default inputB/O Bi-directional, default outputP Power / Ground
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A AnalogSO Automatic output low when suspendpu Internal pull uppd Internal pull downodpu Open drain with internal pull up
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CHAPTER 5 FUNCTION DESCRIPTION
5.1 General
5.1.1 USPORT TransceiverUSPORT (upstream port) transceiver is the analog circuit that supports both full-speed and high-speedelectrical characteristics defined in chapter 7 of USB specification Revision 2.0. USPORT transceiver willoperate in full-speed electrical signaling when GL850A is plugged into a 1.1 host/hub. USPORT transceiverwill operate in high-speed electrical signaling when GL850A is plugged into a 2.0 host/hub.
5.1.2 PLL (Phase Lock Loop)GL850A contains a 40x PLL. PLL generates the clock sources for the whole chip. The generated clocks areproven quite accurate that help in generating high speed signal without jitter.
5.1.3 FRTIMERThis module implements hub (micro)frame timer. The (micro)frame timer is derived from the hub s localclock and is synchronized to the host (micro)frame period by the host generated Start of (micro)frame(SOF). FRTIMER keeps tracking the host s SOF such that GL850A is always safely synchronized to thehost. The functionality of FRTIMER is described in section 11.2 of USB Specification Revision 2.0.
5.1.4 CC is the micro-processor unit of GL850A. It is an 8-bit RISC processor with 2K ROM and 64 bytes RAM.
It operates at 6MIPS of 12Mhz clock to decode the USB command issued from host and then prepares thedata to respond to the host. In addition, C can handle GPIO (general purpose I/O) settings and readingcontent of EEPROM to support high flexibility for customers of different configurations of hub. Theseconfigurations include self/bus power mode setting, individual/gang mode setting, downstream port numbersetting, device removable/non-removable setting, and PID/VID setting.
5.1.5 UTMI (USB 2.0 Transceiver Macrocell Interface)UTMI handles the low level USB protocol and signaling. It s designed based on the Intel s UTMIspecification 1.01. The major functions of UTMI logic are to handle the data and clock recovery, NRZIencoding/decoding, Bit stuffing /de-stuffing, supporting USB 2.0 test modes, and serial/parallel conversion.
5.1.6 USPORT logicUSPORT implements the upstream port logic defined in section 11.6 of USB specification Revision 2.0. Itmainly manipulates traffics in the upstream direction. The main functions include the state machines ofReceiver and Transmitter, interfaces between UTMI and SIE, and traffic control to/from the REPEATERand TT.
5.1.7 SIE (Serial Interface Engine)SIE handles the USB protocol defined in chapter 8 of USB specification Revision 2.0. It co-works with cto play the role of the hub kernel. The main functions of SIE include the state machine of USB protocolflow, CRC check, PID error check, and timeout check. Unlike USB 1.1, bit stuffing/de-stuffing isimplemented in UTMI, not in SIE.
5.1.8 Control/Status registerControl/Status register is the interface register between hardware and firmware. This register contains theinformation necessary to control endpoint0 and endpoint1 pipelines. Through the firmware basedarchitecture, GL850A possesses higher flexibility to control the USB protocol easily and correctly.
5.1.9 REPEATERRepeater logic implements the control logic defined in section 11.4 and section 11.7 of USB specificationRevision 2.0. REPEATER controls the traffic flow when upstream port and downstream port are signalingin the same speed. In addition, REPEATER will generate internal resume signal whenever a wakeup eventis issued under the situation that hub is globally suspended.
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5.1.10. TT (Transaction Translator)TT implements the control logic defined in section 11.14 ~ 11.22 of USB specification Revision 2.0. TTbasically handles the unbalanced traffic speed between the USPORT (operating in HS) and DSPORTS(operating in FS/LS) of hub. GL850A adopts the single TT architecture to provide the most cost effectivesolution. Single TT shares the same buffer control module for each downstream port. GL852 adoptsmultiple TT architecture to provide the most performance effective solution. Multiple TT provides controllogics for each downstream port respectively. Please refer to GL852 datasheet for more detailedinformation.
5.1.11 REPEATER/TT routing logicREPEATER and TT are the major traffic control machines in the USB 2.0 hub. Under situation thatUSPORT and DSPORT are signaling in the same speed, REPEATER/TT routing logic switches the trafficchannel to the REPEATER. Under situation that USPORT is in the high speed signaling and DSPORT is inthe full/low speed signaling, REPEATER/TT routing logic switches the traffic channel to the TT.
5.1.11.1 Connected to 1.1 Host/HubIf an USB 2.0 hub is connected to the downstream port of an USB 1.1 host/hub, it will operate in USB 1.1mode. For an USB 1.1 hub, both upstream direction traffic and downstream direction traffic are passingthrough REPEATER. That is, the REPEATER/TT routing logic will route the traffic channel to theREPEATER.
USB1.1 HOST/HUB
REPEATER TT
DSPORT operatingin FS/LS signaling
USPORToperatingin FS signaling
Traffic channelis routed toREPEATER
Figure 5.1 Operating in USB 1.1 scheme
5.1.11.2 Connected to USB 2.0 Host/HubIf an USB 2.0 hub is connected to an USB 2.0 host/hub, it will operate in USB 2.0 mode. The upstream portsignaling is in high speed with bandwidth of 480 Mbps under this environment. The traffic channel willthen be routed to the REPEATER when the device connected to the downstream port is signaling also inhigh speed. On the other hand, the traffic channel will then be routed to TT when the device connected tothe downstream port is signaling in full/low speed.
AML3278 A/V Processor User Guide Version 0.71
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1 Introduction The AML3278 A/V processor is a completely integrated system targeting all types of Audio/Video decoder applications that provide connectivity to hard disk, digital camera, MP3 players and other external digital consumer devices. The target market for AML3278 A/V processor is feature rich DVD players, audio receivers, DVD/receiver combo players, digital media players, integrated TV media players, portable DVD players, and portable media players.
The AML3278 combines full function of MPEG-1, MPEG-2 and MPEG-4 decoding, numerous dedicated and general-purpose peripherals, and a high speed 32-bit host CPU in a single device. The AML3278 has three built-in AMRISCTM RISC processors with special instructions to accommodate audio, video and servo-loop digital signal processing. The AML3278 also provides a high speed interface to external USB 1.1/2.0 chip for connectivity to popular USB devices like hard disk, Flash memory, and digital camera and MP3 players.
The embedded 32-bits host CPU handles system initialization, DVD navigation, and other system applications. The AML3278 A/V processor provides a glueless interface to all external components: ATAPI loaders, USB interface chip, HDMI transmitter chip, audio DACs and memory. Numerous general-purpose I/O pins can be used to control the front panel display and other miscellaneous tasks. Together, the embedded host CPU and special glueless interfaces reduce the total system cost for all A/V applications from any media.
The AML3278 A/V processor features a sophisticated video sub-system that performs video enhancement and scaling functions. It supports DVD up-scaling capabilities to 720p and 1080i resolutions for the TV system. In addition, a digital TV interface is created for connecting to external HDMI or DVI transmitter for 100% digital solution between the DVD and TV systems. The digital TV interface is designed to work with a companion HDMI transmitter (AML3505) to drive the serial HDMI/DVI signals.
The video sub-system also integrates an NTSC/PAL TV encoder for traditional analog video outputs like S-Video, composite, YUV component, RGB and multiple VGA modes. The video encoder also supports high-quality de-interlaced progressive scan (480p/576p) with full Macrovision support. Contrast enhancement, hue adjustment, video scaling, video interpolation, pan-scan, letter-box, and zoom are also supported. In addition, four built in video DACs complement the video encoder further reducing system cost.
The integrated Audio AMRISCTM RISC processor performs advanced digital audio decoding and post-processing. The micro-coded engine provides support for all existing audio formats and it also has enough flexibility to accommodate new audio standards. Popular audio formats like MPEG, LPCM, Dolby AC-3 5.1, HDCD, MP-3 and WMA are supported. In addition, SPDIF (IEC958) input and outputs are supported. AML3278 also supports the MLP loss-less compression and PCM format for DVD-Audio with sample rate up to 192 KHz for two channels and 96 KHz for multi-channels.
Since AML3728 supports DVD-Audio, the Audio AMRISC processor also supports MLP and high sample rate PCM audio formats.
The USB interface provides the necessary high speed interconnections to an external USB chip. The external USB chip can support up to 2 high-speed USB ports. The AML3278 firmware includes the basic USB device driver, USB protocol stacks to support bulk and INTR transfer, Hub, Mass-Storage (MS) class, Picture Transfer Protocol (PTP) and PictBridge protocol. The USB firmware also supports multiple file systems and includes flexible file transfer functions between USB devices.
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The AML3278 also integrates a flexible disc loader front-end with complete servo control, signal recovery, descrambling, and error detection and correction. The analog front-end features high resolution ADC and DAC for servo control. A front-end optimized AMRISCTM RISC processor performs adaptive servo tracking algorithms and provides unique intelligence to work with disk media errors. The loader front-end is designed to work with a companion RF front-end chip (AML 3501) for interfacing to an OPU.
The adaptive AMPOWER-I algorithm is integrated into both the chip design and the firmware to reduce power consumption for portable applications. AMPOWER-I also provides higher performance within smaller, thermally constrained environments.
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2 Features The AML3278 chip is very flexible and most of the capabilities are under firmware control. The following list of features may or may not be included in the firmware library or binary, depending on the actual application and platform.
High Integration o Embedded 32-bits RISC processor for system control o Integrated disc servo front-end with complete servo control, signal recovery,
descrambling, and error detection and correction o Glueless interface to dual ports USB controller o Complete MPEG 1/2/4 decoding backend and video post processing logic o Complete audio decoding backend o Integrated TV encoder and Video DACs
MPEG 1/2 Decoding o MPEG video engine controlled by dedicated Video AMRISCTM processor o MPEG-2 ML/MP conforming to ISO-13818 o MPEG-1 ML/MP conforming to ISO-11172 o On-chip CSS descrambler o Compliant with DVD Specification 1.0 for read-only Disc decoding o DVD Sub-picture and highlight decoding and display o Advanced error detection, concealment, and recovery scheme o Backward compatible VCD (1.0 to 3.0) decoding o Super VCD decoding
MPEG 4 Decodingo MPEG-4 and DivX 3.x/4.x/5.x compliant o GMC and Q-Pel compatible o Digital Right Management (DRM) engine for content management o Multiple language DivX sub-title support
Video Processingo 3:2 pull-down for 24 fps displaying at 30 fps o 2:2 pull-down for 24 fps displaying at 25 fps o Automatic frame rate adoption when playing non-DVD/VCD contents (like .mpg and .avi
files)o Adaptive pixel-based de-interlacing algorithm o Variable steps video zooming (up to 8x) o Letterboxi and pan/scan o Special trick modes:
Pause, single-step slow motion reverse playback Multiple steps fast forward/backward
o Built-in NTSC to PAL scaling or vice-versa o On-Screen-Display (OSD) capable of supporting up to 256 fixed colors or 16
programmable colors o OSD alpha-blending over video display
TV Encodero Interlaced NTSC output 720x480 at 30 fps, with Macrovision 7.1L1 anti-taping o Interlaced PAL output 720x576 at 25 fps, with Macrovision 7.1L1 anti-taping
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o Progressive NTSC output 480p at 60 fps, with Macrovision 1.03 anti-taping o Progressive PAL output 576p at 50 fps, with Macrovision 1.03 anti-taping o High definition output of 720p and 1080i at 50/60 fps o VGA output for computer monitors and LCD panels. VGA (640x480), SVGA (800x600),
XVGA (1024x768) and SXVGA (1280x1024) are supported o Interlaced S-Video, component, composite and SCART output o Simultaneous output of progressive and interlaced video o Closed caption modulation in the vertical blanking intervals o WSS/CMGS insertion o CCIR656 and CCIR 601 YCbCr output digital LCD panel connections o Full resolution (up to 1920x1080i) digital video output for HDMI/DVI connection o Programmable tint, brightness and other TV enhancements
Graphics o Graphics engine supports JPEG and BMP image decoding o Graphics can be scaled independently of the video output o Unified MPEG video and graphics memory architecture for maximum flexibility and
system cost savings
Audio Decoding o Built-in Audio AMRISCTM processor with extensions specifically designed for audio
processing o On-the-fly switching of audio streams during playback o Full MPEG audio layers I, II and III o Compliant with Dolby AC-3 5.1 channel decoding o DVD-Audio with full CPPM processing o HDCD support o MP3 music CD/DVD support o WMA music CD/DVD support
Audio Post Processing and Output o Supports 8 channels linear PCM output. I2S or EIAJ DAC-compatible o IEC958 (S/PDIF) digital output o DTS audio pass-through o AC-3 two channels down-mixing o Virtual surround sound to create 3-D spatial sound field from two audio channels o Prologic II to convert stereo audio source to multi-channel audio output o Full speaker configurations and bass management with adjustable crossover settings o Muting, volume control, etc. o Karaoke functions like integrated echo control and key control.
Audio Input o IEC958 (S/PDIF) digital input with frame decoding to accommodate A/V receiver
applications o PWM signals for tracking clock difference for external audio inputs o Two channels analog audio input
Front-end Loader Interface and Control o Direct interface to AML3501 Front-End RF device for DVD/CD loader support o DSP servo control with adaptive servo tracking algorithm o Support up to 6x DVD speed and 24x CD speed o Supported medias:
DVD-Video (from DVD-ROM. DVD±R and DVD±R/W) VCD and DVCD (from CD-ROM, CD±R and CD±RW)
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SVCD (from CD-ROM, CD±R and CD±RW) CD-DA and HDCD (CD-ROM, CD±R and CD±RW) DualDisc, Enhanced CD and Hyper CD DivX video (from all CD and DVD medias) JPEG and BMP (from all CD and DVD medias) MP3 and WMA (from all CD and DVD medias)
Front-End Loader Read-channel o Read-channel support for all popular CD/DVD formats o Intelligent sync detection and correction logic o Integrated multi-pass ECC engine o Digital over-sampling slicer
Front-End RF support (via AML3501 RF Front-End Device) o Support AGC and equalizer/filter for CD and DVD medias o 70 KHz bandwidth for the focus, tracking and pull-in circuits o Programmable input gain control amplifiers o Servo algebra signals used for optical alignment, seeking, focusing, and tracking o 50 MHz channels o Supports individual RF inputs for DVD (differential or single ended) and CD (single ended) o Programmable attenuator o Programmable boost/equalization o Less than 2% total harmonic distortion o No external filter components required o Auto laser power control o Programmable power management support (AMPOWER-I)
USB Interface o Glueless USB interface to external USB controller o Support dual ports USB 1.1 or USB 2.0 interface o Device mode, host mode, and OTG interfaces o DMA support for data movement for BULK, INTR and ISO transfer o USB device driver, native USB protocol stack supported in firmware o Integrated support for Mass-storage class (MS-Class), Picture Transfer Protocol (PTP)
and PictBridge protocol o USB Hub support o Video, audio and image decoding from USB attached MS-Class or PTP devices o Photo printing to USB attached PictBridge devices
IDE Hard Disk Interface o Direct interface to IDE hard drive for mass storage o Provides MP3 ripping to hard disk for up to 192kbps o Allows transfer of files between internal hard disk and external USB devices o Video, audio and image decoding from hard disk o Master/Slave mode support
Host CPU Sub-system o 32-bit CPU dedicated for user applications o Embedded debug interface using ICE/JTAG o Shared MPEG SDRAM as run time data storage for minimal system cost
System, Peripherals and Interfaces o Single 27 MHz clock input or crystal oscillator input o Optional audio PLL input for high precision audio applications
AML3278 A/V Processor User Guide Version 0.71
12/21/2005 10/40 Amlogic Proprietary
o AMPOWER-I power/frequency control algorithm for portable applications o Supports 8 or 16-bit FLASH o Support 16-bit SDRAM for front-end, MPEG, audio and host CPU o Numerous programmable GPIO pins for system control and interrupts o 1.2 volt and 3.3 volt power supplies o 5 volt TTL level I/O support o Small 256 pins PQFP package