MOHD. YAMANI IDRIS/ NOORZAILY MOHAMED NOOR 1 Introduction to Logic Gates Logical gates –Inverter –AND –OR –NAND –NOR –Exclusive OR (XOR) –Exclusive NOR.

1MOHD. YAMANI IDRIS/ NOORZAILY MOHAMED NOOR

Introduction to Logic Gates

• Logical gates– Inverter– AND– OR– NAND– NOR– Exclusive OR (XOR)– Exclusive NOR (XNOR)

• Draw Logic Circuit • Analysis of Logic Circuit


Introduction to Logic Gates

• Universal gates NAND and NOR– NAND gate– NOR gate

• Execution using NAND gate• Execution using NOR gate• Positive & Negative Logic• SOP Expression Execution• POS Expression Execution• Integrated Logic Circuit Family


Logic Gates


Logic Gates

• Inverter gate

• The use of inverter: complement


Logic Gates

• AND gate


Logic Gates

• OR gate


Logic Gates

• NAND gate


Logic Gates

• NOR gate


Logic Gates

• Exclusive OR (XOR) gate


Logic Gates

• Exclusive NOR (XNOR) gate


Draw Logic Gates

• When Boolean expression is obtained, we can draw logic gates

• Example:– F1 = xyz’ (use three input AND gate)


Draw Logic Gates


Logic Circuit Analysis

• When logic circuit is given, we can analyze the circuit to obtain logical expression

• Example:– What is the Boolean expression for F4


Logic Circuit Analysis

• What is the Boolean expression for F5


Universal Gates: NAND & NOR

• Gate AND/OR/NOT is enough to build any Boolean function

• Even though, other gates is also used because:– Very useful (no choice)

– Save transistor’s number

– Self sufficient (can build any gate from it)

NAND/NOR: save, self sufficient

XOR: useful (e.g. execute parity bit)


NAND Gate

• NAND gate is self sufficient (i.e.can build any gate from it)

• Can be used for building AND/OR/NOT gate

• Build NOT gate using NAND gate


NAND Gate

• Build AND gate using NAND gates

• Build OR gate using NAND gates


NOR Gate

• NOR gate is also self sufficient

• Can be used for building AND/OR/NOT gate

• Build NOT gate using NOR gate


NOR Gate

• Build AND gate using NOR gates

• Build OR gate using NOR gates


Build using NAND gate

• It is not impossible to build Boolean expression using NAND gatesSteps– Obtain sum-of-product Boolean expression

• E.g: F3 = xy’ +x’z

– Use DeMorgan theorem to get expression using two level NAND gate

• E.g: F3 = xy’ +x’z = (xy’+x’z)” = ((xy’)’.(x’z)’)’


Build using NAND gate


Build using NOR gate

• It is not impossible to build Boolean expression using NOR gatesSteps– Obtain product-of-sum Boolean expression

• E.g: F6 = (x+y’).(x’+z)

– Use DeMorgan theorem to get expression using two level NAND gate

• E.g: F3 = (x+y’).(x’+z) =((x+y’).(x’+z))’’ = ((x+y’)+(x’+z)’)’


Build using NOR gate


Positive & Negative Logic

• In logic gate, most of the time– H (High Voltage, 5V) = logic 1

– L (Low Voltage, 0V) = logic 0

• This is called positive logic• However, if it is inverted, it is negative logic

– H (High Voltage, 5V) = logic 0

– L (Low Voltage, 0V) = logic 1

• Depends, some similar gate need different Boolean function



• Signal which is set to logic 1 is said to be active and true

• Signal which is set to logic 0 is said to be not active and false

• The name of active high signal is always written in non-compliment form

• The name of active low signal is always written in non-compliment form




Construction of SOP Expression

• Sum-of-product expression can be built using– Two level logic gate AND-OR– Two level logic gate AND-NOT

• Logic AND-OR gate


Construction of SOP Expression

• NAND-NAND circuit (with transformation circuit)– Add two balls– Change OR with NAND

with inverted input and ball

on it’s compliment input


Construction of POS Expression

• Product-of-sum expression can be built using– Two level logic gate AND-OR– Two level logic gate AND-NOT

• Logic AND-OR gate


Construction of POS Expression

• NOR-NOR circuit (with transformation circuit)– Add two balls– Change AND with NOR

with inverted input and ball

on it’s compliment input

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MOHD. YAMANI IDRIS/ NOORZAILY MOHAMED NOOR 1 Introduction to Logic Gates Logical gates –Inverter –AND –OR –NAND –NOR –Exclusive OR (XOR) –Exclusive NOR.

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