M.Mohajjel. Resources Verilog HDL A guide to Digital Design and Synthesis, Samir Palnitkar, 19996 Architecture of FPGAs and CPLDs: A Tutorial, Stephen.

An Introduction to Digital System Design

M.Mohajjel

2

ResourcesVerilog HDL A guide to Digital Design and

Synthesis, Samir Palnitkar, 19996Architecture of FPGAs and CPLDs: A Tutorial,

Stephen Brown and Jonathan Rose

Digital System Design

3

WebsiteLecture notesHomework submissionGradesQuestions

Username : std numberPassword: M_std_m


http://mohajjel.gnomio.com/

http://mohajjel.gnomio.com/

4

بندی بارم

( ۴تمرین)نمره ( ۲پروژه)نمره ( ۵امتحان کالسی)نمره ( ۸پایان ترم)نمره ( ۱حضور در کالس)نمره

:۲تعداد غیبت مجاز برای کسب نمره حضور در کالس جلسه

جلسه غیبت حذف درس۴بیش از


5

Scheduling


شهریور۳۱

مهر۷

مهر۱۴

تعطیل )عید غدیر(

مهر۲۱

Quiz 1 مهر۲۸ آبان۵

تعطیل )تاسوعا(

آبان۱۲

Quiz 2 آبان۱۹ آبان۲۶

آذر۳Quiz 3 آذر۱۰

آذر۱۷

آذر۲۴Quiz 4 دی۱

دی۸

دی۱۵

Digital System Design 6

Digital Systems Advantages

Ease of designReproducibility of resultsNoise immunity Ease of Integration

DisadvantagesThe real world is analogA/D & D/A overhead


Evolution of Digital SystemsThe earliest digital circuits

vacuum tubes & transistorsIntegrated circuits

SSI (Small Scale Integration) 10s of logic gates

MSI (Medium Scale Integration) 100s of logic gates

LSI (Large Scale Integration) 1000s of logic gates

VLSI (Very Large Scale Integration) 100,000s of logic gates

Need for Computer-Aided Design


Digital System Design ProcessInitial design ideaBehavioral description (overall functionality)

Flow chartPseudo code

RTL description Data pathControl procedure


Digital System Design Process (cont.)

Logic designNet list of gates & flip flops

Circuit & Physical designNet list of transistors

ManufacturingMasks for IC FabricationBit stream


Digital System Design Process (cont.)SynthesisVerificationComputer aided design (CAD)

toolsSynthesis

From RTL description down to manufacturing

Verification Simulation Timing analysis Test generation


Programmable Logic DevicesWhy?

TTM (Time-to-market)PrototypingReconfigurable and Custom Computing


Programmable Logic Devices (cont.)

How?


Programmable Logic Devices (cont.)

How?


Reprogrammable PLDs

Updating a device or correction of errors

Reuse device for a different design

Ideal for course laboratories


Hardware Description Languages (HDL)

Why?

Very large scale designs

Weakness of conventional programming

languages in hardware modeling and

description

Compact description of hardware in different

design stages


Hardware Description Languages (HDL) (cont.)

Hardware Description RequirementsConcurrencyTiming and DelaySupport for Design HierarchyReadability (Documentation)


Hardware Description Languages (HDL) (cont.)

ExamplesPopular HDLs (IEEE standard)

Verilog = Verifying Logic VHDL = Very High Speed Integrated Circuit

Hardware Description Language

Other HDLs AHPL TI-HDL AHDL


VHDL vs. VerilogAll abstraction levelsDesigned for

documentationAda based constructsHigh level & system

descriptorNo PLI

All abstraction levelsDesigned for hardware

designC and Ada constructsGate & structural

descriptorVery powerful PLI

M.Mohajjel. Resources Verilog HDL A guide to Digital Design and Synthesis, Samir Palnitkar, 19996 Architecture of FPGAs and CPLDs: A Tutorial, Stephen.

Documents