Luka STANISIC Phd 34 Rue de Pessac 33000 Bordeaux France H +33 (6) 71 71 97 51 B [email protected] ˝ mescal.imag.fr/membres/luka.stanisic/ 29 years Serbian PROFESSIONAL EXPERIENCE 2015– Scientific researcher (postdoctoral fellow) in the field of High Performance Com- puting (HPC), Bordeaux, France. Working at the Inria Bordeaux Sud-Ouest in STORM and HiePACS teams. Research and development of kernel models, simulation, performance evaluation and visualization tools for dynamic task-based HPC application. Enhancing reproducibility of the experimental research in the community. Collaboration with physicists on performance evaluation and simulation of lattice QCD code. Teaching "Operating Systems" course to Master 1 students. 2012–2015 Scientific researcher (PhD student) in the HPC field, Grenoble, France. Working in MESCAL and NANOSIM teams, on the European Mont-blanc and ANR SONGS projects. Investigating energy-efficient hardware solutions for the future super-computer platforms. Benchmarking and comparing performance of CPU caches of ARM and Intel processors using personally written C program on Unix. Modeling and simulation of StarPU runtime using SimGrid simulator. Developing a unique methodology based on Org-mode and Git for performing reproducible experimental research. 2009–2010 Software developer, "SOL", Belgrade, Serbia. Working on project for Human Resources Management system developed for the Serbian government, in cooperation with "MD&PROFY d.o.o" 2008 Internship on European project ProSense aimed at researching and implementation of wireless sensor networks, Belgrade University, Serbia. 2006–2009 Technical support (part time engagement), "Botomex d.o.o.", Belgrade, Serbia. EDUCATION 2012–2015 Phd in computer science, University Joseph Fourier, Grenoble, France. Thesis title: "A Reproducible Research Methodology for Designing and Conducting Faithful Simulations of Dynamic Task-based Scientific Applications " Scholarship of French Ministry 2011–2012 Master of Science in Informatics at Grenoble (MOSIG), Option Distributed, Parallel and Embedded systems, University Joseph Fourier, Grenoble, France, GPA 14.46 (max 20). Master internship: Performance evaluation of CPU caches on ARM and Intel processors Scholarship for the best students of Serbian Ministry of Education