Lecture 2 - Politechnika Śląskadb.zmitac.aei.polsl.pl/KT/Lecture2.pdf · 2003-10-17 · Lecture 2. Lecture 2 • 8086 family architecture. From 8086 to Pentium4. Registers, flags,

Assembler Programming

Lecture 2

Lecture 2

• 8086 family architecture. From 8086 to Pentium4. Registers, flags, memory organization. Logical, physical, effectiveaddress. Addressing modes.

Processor

• Processor is the device that manages all actions and services in the system.

• Processor handles synchronous and asynchronous events.

• All those actions processor handles executing the programs or the procedures.

8086 family processors evolution• 8086 – real mode only, 16-bit, 1MB addressing.• 80186 – real mode only, 16-bit, 1MB.• 80286 – real and protected mode, 16-bit, 16MB.• 80386 – real and protected mode, 32-bit, 4GB.• i486 – real and protected mode, 32-bit, 4GB.• Pentium – real and protected, 32-bit, 4GB.• Pentium Pro – real and protected, 32-bit, 64GB.• Pentium II – real and protected, 32-bit, 64GB.• Pentium III – real and protected, 32-bit, 64GB.• Pentium 4 – real and protected, 32-bit, 64GB.

8086 architecture – general purpose registers

BLBH

BX

CLCH

CX

DLDH

DX

ALAH

AX

DI

BP

SI

8086 architecture – special purpose registers

SP IP

Flags CFPFAFZFSFTFIFDFOF

CarryParityAuxiliary CarryZeroSignTraceInterruptDirectionOverflow

8086 architecture – segment registers

CS

DS

ES

SS

Real mode 80386 registers

ALAHAX

DI

EAX

BLBHBX

EBX

CLCHCX

ECX

DLDHDX

EDX

EDI

BP

EBP

SI

ESI

SP

ESP

EIP and extended flag register

EFlags CFPFAFZFSFTFIFDFOFRFVM

I/O Privilege LevelNested TaskResume FlagVirtual ModeAlignment CheckVirt. Interrupt FlagVirt. Interrupt PendingIdentification

IP

EIP

NT PL PLACVIFVIPID

80386 segment registers

CS

DS

ES

SS

FS

GS

Other registers

• 80386 has registers for protected mode operation.

• i486 and above has math coprocessor’s registers.

• Pentium and above has multimedia extension registers for MMX.

• Pentium4 has another multimedia registers for SSE.

Memory addressing in real mode

• Memory is organized in segments– for 16-bit real mode segments’ size is 64kB,– for 32-bit mode segments’ size is 4GB.

• Logical address consists of two values– segment address,– offset within segment.

• Logical address is recalculated into linear address which in real mode corresponds to thephysical address of the memory.

Real address calculating

Segment (16 bit)

Segment

Offset (16 bit)

Linear address (20 bit)

Shift left 4 bits

0 0 0 0

Add Offset value

Fill with four zeros

+

Segmented addressing

CS

DS

ES

SS

FS

GS

Code Segment

Data Segment

Stack Segment

Data Segment

Data Segment

Data Segment

Addressing modes

• Instructions usually have the operands.– the right operand is the source,– the left operand is the destination.

• Operands can be of one of the types:– register,– immediate,– direct memory,– indirect memory.

• In the examples we will use mov instruction.

8086 register addressingmov ax, bxmov dl, almov si, dxmov sp, bpmov dh, clmov ax, ax

mov ax, csmov ds, ax

8086 immediate values

• Immediate value is a constant or result of constant expression.

• It is calculated during assembling.• It is placed in the code as part of the instruction.

mov ax, ‘A’mov ax, 0mov bx, 12*7

8086 memory addressing

• Direct memory addressing (displacement only).• Indirect memory addressing.

– Base addressing.– Index addressing.– Base addressing with indexing.– Base addressing with indexing and displacement.

8086 direct memory addressing

• Specifies the data at given address

mov ax, variablemov ax, [variable]mov si, ES:[variable]mov di, ES:[100]

8086 direct memory addressing

AX

BL one bytemov ds:[0800h], bl

low byte

high byte

0800h

mov ax, ds:[0600h]

0600h0601h

Indirect memory addressing

• Address of the data is held in the base or indexregister.

• While BX, SI or DI is used the processor as a default takes DS segment register.

• While BP is used the processor takes SS segment register.

mov ax, [bx]mov ax, [bp]mov al, [di]mov ah, [si]

Indirect memory addressing

BX

ALdatamov al, [bx]

DS

+

Base memory addressing

• Address of the beggining of the data table is held in the base register.

• Displacement inside the table is a constant.• All of the following variations are legal:

mov ax, element[bx]mov ax, [bx+element]mov ax, [bx]+element

Base memory addressing

BX

ALdatamov al, [bx]+element

DS

+ table beginning

element +

Index memory addressing

• Address of the data table is a constant.• Number of the element (byte) is held in the

index register.• All of the following variations are legal:

mov ax, table[si]mov ax, [si+table]mov ax, [si]+table

Index memory addressing

DI

ALdatamov al, table[di]

DS

+

+

table beginningtable

Base memory addressing with indexing

• Address of the data table is held in the baseregister.

• Number of the element (byte) is held in the index register.

• All of the following variations are legal:

mov ax, [bx][si]mov ax, [bx+si]mov ax, [si][bx]

Base memory addressing with indexing

DI

ALdatamov al, [bp][di]

SS

+

+

base addressBP

Base memory addressing with indexing

• It’s illegal to use two registers of the same type.• Only the following register variations are

possible:

mov ax, [bx][si]mov ax, [bx][di]mov ax, [bp][si]mov ax, [bp][di]

Base memory addressing with indexingand displacement

• Address of the data table is an constant.• Displacment of the structure is held in the base

register.• Number of element in the structure (byte) is held in the

index register.• All of the following variations are legal:

mov ax, table[bx][di]mov ax, table[di][bx]mov ax, table[bx+di]mov ax, [table+bx+di]mov ax, [bx][di]+table

Base memory addressing with indexingand displacement

SI

ALdatamov al, table[bx][si]

DS

+

+

structure addressBX

table addresstable +

Additional notes

• Calculated offset is called effective address.• Different addressing modes have different

timings.• More complicated modes take much time.• If effective address is greater than 0FFFFh the

carry bit is ignored.• Constant displacement is a 8-bit or 16-bit

signed value. Using 8-bit value is faster.

80386 register addressing

• The same as in 8086 with additional 32-bit registers.

• Only lower 16-bit half of 32-bit registers is accessible directly.

mov eax, ebxmov esi, edx

Indirect memory addressing

• Address of the data is held in the base and/orindex register. It is possible to add the constantdisplacement too.

• Almost any of the 32-bit registers can be baseor index register.

• ESP can be the base register only. • In 16-bit addressing mode the displacement

must not exceed 0FFFFh.• In this mode maximum segment size is 64kB.

Indirect memory addressing withscaling

• It is very useful mode for tables containingvalues greater than 1 byte.

• Index registers can be scaled by a factor of 1, 2, 4 or 8.

• If the scaling factor is 1 the base register is thefirst used in the instruction.

• If EBP is scaled it’s treated as index register and DS segment is used instead of SS.

Indirect memory addressing withscaling

mov ax, [ebx][ebp] ;DS bx-basemov ax, [ebp][ebx] ;SS bp-basemov ax, [ebp][ebx*2] ;SS bp-basemov ax, [ebp*2][ebx] ;DS bx-basemov ax, [ebp*2] ;DS no basemov ax, [ebp] ;SS no indexmov ax, es:[ebp][ebx*2] ;ES