Lab Manual EC II Format 2

LIST OF EXPERIMENTS:1. 2. 3. 4. 5. 6. 7. 8. 9.

RC INTEGRATOR RC DIFFERENTIATOR CLIPPING CIRCUITS CLAMPING CIRCUITS RC PHASE SHIFT OSCILLATOR WIEN BRIDGE OSCILLATOR HARTLEY OSCILLATOR COLPITTS OSCILLATOR TUNED CLASS C AMPLIFIER

10. ASTABLE MULTIVIBRATOR 11. MONOSTABLE MULTIVIBRATOR 12. BISTABLE MULTIVIBRATOR 13. FEEDBACK AMPLIFIERS

ELECTRONIC CIRCUITS II LAB

RC INTEGRATORAIM: To design and construct a RC integrator and to study its response.

APPARATUS REQUIRED: S.NO 1 2 3 4 5 APPARATUS Resistor Capacitor Function Generator CRO Bread board TYPE &RANGE 5.6 k 2.2F QUANTITY 1 1 1 1 1

THEORY: If the time constant of the circuit is very large in comparison with the time period of the input signal, the circuit is called an integrator. Under this condition the voltage drop across C will be very small in comparison to the drop across R. The current is Vin/R since almost all Vin is appearing across R. Output voltage across C is Vo = (1/C) i.dt = 1/RC Vin dt. The output is proportional to the integral of the input. Voltage drop across C increases as time passes. For satisfactory integration ,it is necessary that RC 15T,where T is the period of the input waveform. When a pulse waveform is given at the input ,capacitor charges through R and output voltage builds up. Capacitor continues to charge as long as input voltage is present. When input is terminated , capacitor discharges and output falls to zero. As the value of RC increases the amplitude of the output decreases and the output waveform becomes linear. This happens because the charging current does not vary much through a high value resistor. Constant current through a capacitor gives a linear output. If the input is a square wave, capacitor charges and discharges from the negative voltage to the positive voltage input. PROCEDURE: 1. Set up the circuit after testing the components. 2. Switch ON the function generator and set the input. 3. Observe the input and output waveforms on CRO. DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING 2

ELECTRONIC CIRCUITS II LAB 4. Note down the output waveform.

DESIGN: Let the input be a pulse train of 1 kHz. Then T = 1 ms. For an integrator, RC 16 T To avoid loading , select R = ten times the output impedance of the pulse generator. R = 6000 , if output impedance is 600 . Use 5.6 k Substituting this in the above equation , we get C = 2.2 F

CIRCUIT DIAGRAM:

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

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MODEL GRAPH:

RESULT: Thus RC integrator circuit was designed and the output waveform was observed.


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RC DIFFERENTIATORAIM: To design and construct a RC differentiator and to study its response.

APPARATUS REQUIRED: S.NO 1 2 3 4 5 APPARATUS Resistor Capacitor Function Generator CRO Bread board TYPE &RANGE 5.6 k 2.2F QUANTITY 1 1 1 1 1

THEORY: A circuit is called a differentiator if its time constant is very small when compared with the time period of the input signal. The voltage drop across R will be very small compared to the drop across C. The current through the capacitor is C dV/dt. Hence the output is proportional to the derivative of the input. Vo = RC dV/dt. Consider a sinusoidal signal V sin t is fed to the input of the differentiator. Its output will be VRC cos t. For perfect differentiation, it should satisfy the criterion RC < 0.0016 T where T is 1/f .


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PROCEDURE: 1. 2. 3. 4. Set up the circuit after testing the components. Switch ON the function generator and set the input. Observe the input and output waveforms on CRO. Note down the output waveform.

DESIGN: Let the input be a pulse train of 1 kHz. Then T = 1 ms. For a differentiator , RC 0.0016 T To avoid loading , select R = ten times the output impedance of the pulse generator. R = 6000 , if output impedance is 600 . Use 5.6 k Substituting this in the above equation , we get C = 235 pF. Use 220 pF CIRCUIT DIAGRAM:


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MODEL GRAPH:

RESULT: Thus RC differentiator circuit was designed and the output waveform was observed.


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CLIPPING CIRCUITSAIM: To design and construct the various clipping circuits using diodes. APPARATUS REQUIRED: S.NO 1 2 3 4 5 6 APPARATUS Resistor Diode Function Generator CRO Dual Power Supply Bread board TYPE & RANGE 3.3 k IN 4001 (0-15)V QUANTITY 1 2 1 1 1 1

THEORY: Clipping circuits are linear wave shaping circuits. They are useful to clip off the positive or negative portions of an input waveform. It can also be used to slice off an input waveform between two voltage levels. A resistance is used to limit the current throught he diode. The value of the series resistance used in the clipping circuits is given by the expression R = Rf x Rr where Rf = forward resistance of the diode and Rr = reverse resistance of the diode. Positive clipper with clipping level at 0 V: This circuit passes only negative going half cycle of the input to the output.The positive half cycles are bypassed through the diode since the diode gets forward biased when the input voltage becomes positive. Negative clipper with clipping level at 0 V: This circuit passes only positive going half cycle of the input to the output. The negative half cycles are bypassed through the diode since the diode gets forward biased when the input voltage becomes negative. Positive clipper with clipping level at +3 V: Till the input becomes greater than +3 V diode is reverse biased and the input will appear at the output. When the input exceeds +3V diode becomes forward biased and the cell voltage appears at the output. Since the diode is in series with the cell actual clipping level is at +3.6 V.


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Negative clipper with clipping level at -3 V: Till the input becomes less than -3 V diode is reverse biased and the input will appear at the output. When the input is less than -3V diode becomes forward biased and the cell voltage appears at the output. Since the diode is in series with the cell actual clipping level is at -3.6 V. Double clipper with clipping levels at +3 V and -3 V: This circuit is the merging of positive and negative clippers. PROCEDURE: 1. Set up the circuit after testing the diode. 2. The input waveform is observed using function generator and CRO. 3. Observe the clipped waveform on CRO.

DESIGN: Select 1N 4001 or BY 126 diode. Series resistance R = (Rf x Rr) Typical values of Rf = 30 and of Rr = 300 k R = (30 x 300k) = 3k . Use 3.3 k . CIRCUIT DIAGRAM: Negative clipper with clipping level at 0 V:


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Positive clipper with clipping level at 0 V:


Negative clipper with clipping level at 3 V:


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Double Clipper:

MODEL GRAPH: Negative clipper with clipping level at 0 V:



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Negative clipper with clipping level at 3 V:


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Double Clipper:


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RESULT: Thus the clipping circuits are designed and the output waveforms are observed.

CLAMPING CIRCUITSAIM: To design and construct the various clamping circuits using diodes. APPARATUS REQUIRED: S.NO 1 2 3 4 5 6 APPARATUS Capacitor Diode Function Generator CRO Dual Power Supply Bread board TYPE & RANGE 1F IN 4001 (0-15)V QUANTITY 1 1 1 1 1 1


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THEORY: Clampers are circuits used to add or subtract a dc voltage to a given waveform without changing the shape of the waveform. Clamping level can be made at any voltage level by biasing the diode. Clamping positively at 0 V: During the negative half cycle of the input,the diode conducts and the capacitor charges to Vm with positive polarity at right side of the capacitor. During the positive half cycle of the input the capacitor cannot discharge since the diode does not conduct. Thus capacitor acts as a dc source of Vm volt connected in series with the input signal source. Clamping negatively at 0 V: During the positive half cycle of the input, the diode conducts and the capacitor charges to Vm with negative polarity at right side of the capacitor. During the negative half cycle of the input the capacitor cannot discharge since the diode does not conduct. Thus capacitor acts as a dc source of Vm volt connected in series with the input signal source.

Clamping positively at -3 V: During negative half cycle of the input, the capacitor charges through the dc source and the diode till (Vm- 3)V at positive polarity of the capacitor at its right side. The charging of the capacitor is limited to (Vm- 3)V due to the presence of the dc source. Clamping negatively at +3 V: During positive half cycle of the input, the capacitor charges through the dc source and the diode till (Vm- 3)V at negative polarity of the capacitor at its right side. The charging of the capacitor is limited to (Vm- 3)V due to the presence of the dc source. PROCEDURE: 1. Set up the circuit after testing the diode. 2. The input waveform is observed using function generator and CRO. 3. Observe the clamped waveform on CRO by keeping the AC-DC switch in DC position.


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ELECTRONIC CIRCUITS II LAB DESIGN: Use capacitor C = 1 F or more since it acts as a voltage source. Use 1N 4001 diode. CIRCUIT DIAGRAM: Positive clamper at 0 V:

Negative clamper at 0 V:

Positive clamper at -3 V:


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Negative clamper at +3 V:

MODEL GRAPH: Positive clamper at 0 V:


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Input waveform Output waveform

Negative clamper at 0 V:


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Input waveform

Output waveform

Positive clamper at -3 V:


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Input waveform

Output waveform

Negative clamper at +3 V:


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Input waveform

Output waveform


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RESULT: Thus the clamping circuits are designed and the output waveforms are observed.

RC PHASE SHIFT OSCILLATORAIM: To design and construct RC phase shift oscillator using BJT and to observe the sinusoidal output waveform. APPARATUS REQUIRED: DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING 22


S.NO 1 2 3 4 5 6

APPARATUS Transistor Resistors Capacitors CRO Power Supply Bread board

TYPE & RANGE BC 107 47 k,2.2 k,10 k,1.2 k,560 10F,47 F,0.01 F (0-15)V -

QUANTITY 1 1,1,2,3,1 2,1,3 1 1 1

THEORY: An oscillator is an electronic circuit for generating an ac signal voltage with a dc supply as the only input requirement. The frequency of the generated signal is decided by the circuit constants. An oscillator requires an amplifier , a frequency selective network and a positive feedback from the output to the input. The Barkhausen criterion for sustained oscillation is A = 1 where A is the gain of the amplifier and is the feedback factor. The unity gain means signal is in phase. If a CE amplifier is used with a resistive collector load, there is a 180o phase shift between the voltages at the base and the collector. Three sections of phase shift networks (RC) are used so that each section introduces approximately 60o phase shift at resonant frequency.The frequency of oscillation is given by the equation, f= 1/2RC6

PROCEDURE: 1. Set up the amplifier part of the oscillator and ensure that the transistor is operating as an amplifier. 2. Connect the feedback network and observe the sine wave on CRO and measure its amplitude and frequency. 3. Observe the output waveform. DESIGN: Vcc = 12 V , Ic = 2 mA


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ELECTRONIC CIRCUITS II LAB VRC = 40 % of Vcc = 4.8 V VRE = 10 % of Vcc = 1.2 V VCE = 50 % of Vcc = 6 V Design of Rc : VRC = Ic x Rc = 4.8 V Rc = 4.8/2mA = 2.4 k Use 2.2 k Design of RE : VRE = IE x RE = 1.2 V RE = 1.2/2mA = 600 Use 560 Design of R1 and R2 : IB = IC/ hFE = 2 mA/ 100 = 20 A. Assume the current through R1 = 10 IB and that through R2 = 9 IB to avoid loading potential divider by the base current. VR2 = Voltage across R2 = VBE + VRE = 0.7 + 1.2 = 1.9 V VR2 = 9 IB x R2 R2 = 1.9/9 x 20 A. = 10.6 k Use 10 k. VR1 = Voltage across R1 = Vcc - VR2 = 12 1.9 = 10.1 V VR1 = 10 IB x R1 R1 = 10.1/10 x 20 A. = 50 k Use 47 k Design of bypass capacitor CE : XCE RE/ 10 Then RE 1/ (2 x 100 x 68) = 23 F. Use 47 F. Design of frequency selective network: Required frequency of oscillation is 5 kHz. f = 1 / 2 RC (6 + 4 Rc/R) = 5 kHz For C = 0.01 F , R = 1.01 k. Use 1.2 k. CIRCUIT DIAGRAM:


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MODEL GRAPH:


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TABULATION:

Frequency

Theoretical f = 1 / 2 RC 6RC

Practical

RESULT: Thus the RC phase shift oscillator was designed and the output waveform was observed.

WIEN BRIDGE OSCILLATORAIM: To design and construct Wien bridge oscillator using BJT and to observe the sinusoidal output waveform.


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ELECTRONIC CIRCUITS II LAB APPARATUS REQUIRED: S.NO 1 2 3 4 5 6 APPARATUS Transistor Resistors Capacitors CRO Power Supply Bread board TYPE & RANGE BC 107 47 k,2.2 k,10 k,1.2 k,560 10F,47 F,0.01 F (0-15)V QUANTITY 1 1,1,2,3,1 2,1,3 1 1 1

THEORY: The Wien bridge oscillator employs a balanced wien bridge as the feedback network. Two stage CE amplifier provides 360o phase shift to the signal. So the wien bridge need not introduce any phase shift to satisfy Barkausen criterion. The attenuation of the bridges calculated to be 1/3 at resonant frequency. So the amplifier stage should provide a gain of exactly 3 to make loop gain unity. Since the gain of two stage amplifier is the product of individual stages , overall gain becomes very high. But the gain will be trimmed down to 3 by negative feedback network. The emitter resistors of both stages are kept unbypassed . This provides a current series feedback which ensures the stability of operating point and reduction of gain. Frequency of oscillation is given by f = 1/2RC

PROCEDURE: 1. Set up the amplifier part of the oscillator and ensure that the transistor is operating as an amplifier. 2. Connect the feedback network and observe the sine wave on CRO and measure its amplitude and frequency. 3. Observe the output waveform. DESIGN:


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Vcc = 12 V , Ic = 2 mA VRC = 40 % of Vcc = 4.8 V VRE = 10 % of Vcc = 1.2 V VCE = 50 % of Vcc = 6 V Design of Rc : VRC = Ic x Rc = 4.8 V Rc = 4.8/2mA = 2.4 k Use 2.2 k Design of RE : VRE = IE x RE = 1.2 V RE = 1.2/2mA = 600 Use 560 Design of R1 and R2 : IB = IC/ hFE = 2 mA/ 100 = 20 A. Assume the current through R1 = 10 IB and that through R2 = 9 IB to avoid loading potential divider by the base current. VR2 = Voltage across R2 = VBE + VRE = 0.7 + 1.2 = 1.9 V VR2 = 9 IB x R2 R2 = 1.9/9 x 20 A. = 10.6 k Use 10 k. VR1 = Voltage across R1 = Vcc - VR2 = 12 1.9 = 10.1 V VR1 = 10 IB x R1 R1 = 10.1/10 x 20 A. = 50 k Use 47 k Design of Cc: f = 1/2Cc(R1|| R2|| hFERE) Substituting , we get Cc = 44 F Use 47 F.

where f = 1 kHz

Design of feedback network: The required frequency of oscillation is fc = 1/2RC = 10 kHz R must be greater than Rc to avoid loading. Take R = 47 k , then C = 0.01 F Gain of the amplifier must be 3. Negative feedback factor is given by RE/( RE + R3). Then gain of the amplifier must be its reciprocal. RE/( RE + R3) = 3 R3 = 2 RE = 12 k Use 4.7 k pot.


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CIRCUIT DIAGRAM:

MODEL GRAPH:


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TABULATION:

Frequency

Theoretical f = 1 / 2 RC

Practical

RESULT: Thus the wien bridge oscillator was designed and the output waveform was observed.

HARTLEY OSCILLATORAIM: To design and construct Hartley oscillator using BJT and to observe the sinusoidal output waveform. APPARATUS REQUIRED:


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S.NO 1 2 3 4 5 6 7

APPARATUS Transistor Resistors Capacitors Inductor CRO Power Supply Bread board

TYPE & RANGE BC 107 / BF 195 47 k,2.2 k, 10k,560 10F,47 F,0.1 F 4mH (0-15)V -

QUANTITY 1 Each 1 2,1,1 2 1 1 1

THEORY: Hartley oscillators are preferred for high frequency generation. It has LC tank circuit for frequency selection. The voltage divider bias is used for the amplifier in CE configuration. Amplifier section provides 180o phase shift to the signal current. The tank circuit provides another 180o phase shift to satisfy the Barkhausen criterion. High frequency transistors are preferred for a better performance. Frequency of oscillation is determined by the resonant circuit consisting of capacitor C and inductors L1 and L2 . It is given by f = 1/2LeqC

PROCEDURE: 1. Set up the amplifier part of the oscillator and ensure that the transistor is operating as an amplifier. 2. Connect the feedback network and observe the sine wave on CRO and measure its amplitude and frequency. 3. Observe the output waveform.

DESIGN: Vcc = 12 V , Ic = 2 mA VRC = 40 % of Vcc = 4.8 V VRE = 10 % of Vcc = 1.2 V VCE = 50 % of Vcc = 6 V Design of Rc : VRC = Ic x Rc = 4.8 V


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ELECTRONIC CIRCUITS II LAB Rc = 4.8/2mA = 2.4 k Use 2.2 k Design of RE : VRE = IE x RE = 1.2 V RE = 1.2/2mA = 600 Use 560 Design of R1 and R2 : IB = IC/ hFE = 2 mA/ 100 = 20 A. Assume the current through R1 = 10 IB and that through R2 = 9 IB to avoid loading potential divider by the base current. VR2 = Voltage across R2 = VBE + VRE = 0.7 + 1.2 = 1.9 V VR2 = 9 IB x R2 R2 = 1.9/9 x 20 A. = 10.6 k Use 10 k. VR1 = Voltage across R1 = Vcc - VR2 = 12 1.9 = 10.1 V VR1 = 10 IB x R1 R1 = 10.1/10 x 20 A. = 50 k Use 47 k Design of Cc: f = 1/2Cc(R1|| R2|| hFERE) Substituting , we get Cc = 44 F Use 47 F.

where f = 1 kHz

Design of feedback network: The required frequency of oscillation is fc = 1/2CLeq Assume C = 0.1 F , f = 5.626 kHz Leq = 1/4fC = 8 mH Leq = L1 + L2 = 8 mH L1 = L2 = L L = 4 mH

CIRCUIT DIAGRAM:


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MODEL GRAPH:


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TABULATION:

Frequency

Theoretical f = 1/2CLeq

Practical

RESULT: Thus the Hartley oscillator was designed and the output waveform was observed.

COLPITTS OSCILLATORSAIM:


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ELECTRONIC CIRCUITS II LAB To design and construct Colpitts oscillator using BJT and to observe the sinusoidal output waveform. APPARATUS REQUIRED: S.NO 1 2 3 4 5 6 7 APPARATUS Transistor Resistors Capacitors Inductor CRO Power Supply Bread board TYPE & RANGE BC 107 / BF 195 47 k,2.2 k, 10k,560 10F,47 F,0.1 F 6mH (0-15)V QUANTITY 1 Each 1 2,1,2 1 1 1 1

THEORY: Colpitts oscillators are preferred for high frequency generation. It has LC tank circuit for frequency selection. The voltage divider bias is used for the amplifier in CE configuration. Amplifier section provides 180o phase shift to the signal current. The tank circuit provides another 180o phase shift to satisfy the Barkhausen criterion. High frequency transistors are preferred for a better performance. The frequency of oscillation is given by the expression, f = 1/2LCeq

PROCEDURE: 1. Set up the amplifier part of the oscillator and ensure that the transistor is operating as an amplifier. 2. Connect the feedback network and observe the sine wave on CRO and measure its amplitude and frequency. 3. Observe the output waveform.

DESIGN: Vcc = 12 V , Ic = 2 mA VRC = 40 % of Vcc = 4.8 V VRE = 10 % of Vcc = 1.2 V


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ELECTRONIC CIRCUITS II LAB VCE = 50 % of Vcc = 6 V Design of Rc : VRC = Ic x Rc = 4.8 V Rc = 4.8/2mA = 2.4 k Use 2.2 k Design of RE : VRE = IE x RE = 1.2 V RE = 1.2/2mA = 600 Use 560 Design of R1 and R2 : IB = IC/ hFE = 2 mA/ 100 = 20 A. Assume the current through R1 = 10 IB and that through R2 = 9 IB to avoid loading potential divider by the base current. VR2 = Voltage across R2 = VBE + VRE = 0.7 + 1.2 = 1.9 V VR2 = 9 IB x R2 R2 = 1.9/9 x 20 A. = 10.6 k Use 10 k. VR1 = Voltage across R1 = Vcc - VR2 = 12 1.9 = 10.1 V VR1 = 10 IB x R1 R1 = 10.1/10 x 20 A. = 50 k Use 47 k Design of Cc: f = 1/2Cc(R1|| R2|| hFERE) Substituting , we get Cc = 44 F Use 47 F.

where f = 1 kHz

Design of feedback network: Frequency of oscillation f = 1/2LCeq where Ceq = C1C2 / (C1 + C2) Let C1 = C2 = 0.1 F , Ceq = 0.05 F Let f = 9.1 kHz L = 6 mH

CIRCUIT DIAGRAM:


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MODEL GRAPH:


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TABULATION:

Frequency

Theoretical f = 1/2LCeq

Practical

RESULT: Thus the Colpitts oscillator was designed and the output waveform was observed.

TUNED CLASS C AMPLIFIER


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ELECTRONIC CIRCUITS II LAB AIM: To design and construct a class C tuned amplifer and obtain the frequency response characteristics. APPARATUS REQUIRED: S.NO 1 2 3 4 5 6 6 7 APPARATUS Transistor Resistors Capacitors Inductor CRO Function Generator Power Supply Bread board TYPE & RANGE CL 100 680 ,2.2 k 4.7 F,0.1 F 2.5 mH (0-15)V QUANTITY 1 Each 1 2,1 1 1 1 1 1

THEORY: Class C amplifier is the most efficient power amplifier, which can produce more load power than that of class a and class B amplifier, to amplify a sinusoidal frequency. So the class C amplifier is called a tuned amplifier .Tuned amplifiers amplify the signals of desired frequency only. The frequency of amplification is determined by a frequency selective network. These circuits are widely used in the IF and RF stages of television and radio receivers. The selectivity of the circuit Q is given by the expression Q = resonant frequency / bandwidth When Q increases, bandwidth decreases and selectivity increases.

PROCEDURE: 1. Give the connections as per the circuit diagram. 39


ELECTRONIC CIRCUITS II LAB 2. Set the input voltage. 3. Vary the frequency of the input signal and note down the corresponding output voltage. 4. Tabulate the readings and calculate the gain in dB. 5. Plot the graph frequency vs gain in dB .

DESIGN : Let frequency f = 10 kHz f = 1/2LC Let C = 0.1 F then L = 2.5 mH. CIRCUIT DIAGRAM:

MODEL GRAPH:


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TABULATION: Vin = ------------ Volts O/P voltage Vo Gain Av = 20 log Vo/Vi

S.No

Frequency

RESULT: Thus the Class C tuned amplifier was designed and the graph was plotted.

ASTABLE MULTIVIBRATORDEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING 41


AIM: To design,construct and test the performance of astable multivibrator. APPARATUS REQUIRED: S.NO 1 2 3 4 5 6 APPARATUS Transistor Resistors Capacitors CRO Power Supply Bread board TYPE & RANGE BC 107 10k,1 k 0.1 F (0-15)V QUANTITY 2 Each 2 2 1 1 1

THEORY: Astable multivibrator is also called free running oscillator. It does not have a stable state. This circuit transits from one quasi-stable state to the other and back automatically,depending upon the charging and discharging periods of two timing capacitors. When one transistor is in ON state, other remains in OFF state. Both will not be in the same state at the same time. The collector voltage of ON transistor ia approximately 0.3 V and that of OFF transistor is the Vcc supply. Time duration in which Q1 remains ON is given by T1 = 0.693 R1C1 If R1= R2 = R and C1= C2= C , T1= T2= 0.693 RC The time period of the output signal is T = T1+ T2 = 1.386 RC

PROCEDURE:


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ELECTRONIC CIRCUITS II LAB 1. 2. 3. 4. Give the connections as per the circuit diagram. Set the supply voltage. Observe the output waveforms at collector and base of both the transistors. Plot the graph.

DESIGN : Let frequency f= 1 kHz and Duty Cycle = 1/3 Choose transistor BC 107. Let Vcc = 9 V T = T1 + T2 = 1 ms Since duty cycle = T1 / (T1 + T2) = 1/3, we get T1 = 0.33 ms and T2 = 0.66 ms Design of Rc1 and Rc2 : Rc1 = (Vcc Vce1sat) / Ic1sat = 4.35 k Use 4.7 k. Take Rc1 = Rc2 = 4.7 k Design of R1 and R2 : The resistors R1 and R2 must be able to provide base current enough to keep the transistors in saturation. IBmin = IC/ hfe = 2 mA / hfe = 20 A Consider an overdriving factor of 5,so that transistor will be indeed in saturation.Then actual base current IB = 5 IBmin = 0.1 mA R1 = (Vcc VBEsat) / 0.1 mA = 83 k. Take R1 = R2 Design of C1 and C2 : T1 = 0.33 ms = 0.69 R1C1 . Then C1 = 0.006 F Use 0.01 F T2 = 0.66 ms = 0.69 R2C2 . Then C2 = 0.02 F Use 0.02 F


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ELECTRONIC CIRCUITS II LAB CIRCUIT DIAGRAM:

MODEL GRAPH:


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RESULT: Thus the astable multivibrator circuit has been designed and the output waveforms were observed.


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MONOSTABLE MULTIVIBRATORAIM: To design,construct and test the performance of monostable multivibrator. APPARATUS REQUIRED: S.NO 1 2 3 4 5 6 7 8 APPARATUS Transistor Resistors Capacitors Diode Function Generator CRO Power Supply Bread board TYPE & RANGE BC 107 6.8 k ,4.7k ,82k, 47k,1 k,56 k 0.01 F IN 4001 (0-15)V QUANTITY 2 1,2,1,1,1,1 3 1 1 1 1 1

THEORY: The monostable multivibrators has only one stable state. The other state is unstable referred as quasi stable state.When an external trigger pulse is applied to the circuit, it changes from the stable state to the quasi stable state and remains in that state for an amount of time determined by the discharging time of the capacitor. R and C are timing elements and C1 is the speed up capacitor. Monostable multivibrator is also called as one shot or single shot multivibrator.

PROCEDURE: 1. Give the connections as per the circuit diagram. 2. Set the supply voltage and apply the trigger pulse to the base of any one of the transistor. 3. Observe the output waveforms at collector of both the transistors. 4. Plot the graph.


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ELECTRONIC CIRCUITS II LAB DESIGN: Vcc = 12 V

VRE = 2 V since IE = IC

Design of RE: RE = VRE / IE = 1 k

Design of R: R must be able to provide enough base current to keep transistor Q2

CIRCUIT DIAGRAM:


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MODEL GRAPH:

RESULT: Thus the monostable multivibrator circuit has been designed and the output waveforms were observed.


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BISTABLE MULTIVIBRATORAIM: To design,construct and test the performance of bistable multivibrator. APPARATUS REQUIRED: S.NO 1 2 3 4 5 6 7 8 APPARATUS Transistor Resistors Capacitors Diode Function Generator CRO Dual Power Supply Bread board TYPE & RANGE BC 107 68 k ,4.7 k ,10 k, 12 k 0.01 F,47 pF IN 4001 (0-15)V QUANTITY 2 1,2,2,2 1,2 2 1 1 1 1

THEORY: Bistable multivibrator circuit has two stable states. An external trigger switches this circuit from one stable state to the other. Another trigger is needed to switch the circuit back to the old stable state. It is also called as flip flop or binary circuit. It is nothing but two inverters connected back to back. Suppose transistor Q1 is turned ON and transistor Q2 is turned OFF as soon as the Vcc is switched ON. When the negative going trigger appears at the base of Q1 , it switches to OFF state. Due to the regenerative action, Q2 goes to ON state. The bistable multivibrator will continue to remain in this state till next negative going trigger appears at the base of Q2.


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PROCEDURE: 1. Give the connections as per the circuit diagram. 2. Set the supply voltage and apply the trigger pulse to the base of any one of the transistor. 3. Observe the output waveforms at collector of both the transistors. 4. Plot the graph.

RESULT: Thus the bistable multivibrator circuit has been designed and the output waveforms were observed.


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FEEDBACK AMPLIFIERSAIM: To design and construct current series and voltage shunt amplifiers and to obtain the frequency response. APPARATUS REQUIRED: S.NO 1 2 3 4 5 6 7 APPARATUS Transistor Resistors Capacitors Function Generator CRO Power Supply Bread board TYPE & RANGE BC 107 4.7 k ,10 k, 2.2 k, 3.3 k,620 15F,10F,1F (0-15)V QUANTITY 1 Each 1 1,1,2 1 1 1 1

THEORY: An open loop amplifier suffers from many limitations such as frequency and phase distortions, non linear distortions and noise. These limitations can be considerably rectified in feedback amplifiers. The output voltage or current is sampled and feedback to the input of the amplifier in series or in shunt to the input signal source. There are four important topologies of negative feedback namely voltage series, voltage shunt, current series and current shunt. Current Series Feedback Amplifier: A CE RC coupled amplifier without emitter bypass capacitor CE is an example of current series amplifier. Voltage Shunt Feedback Amplifier: Here output voltage is sampled and fed in the form of current to the input.


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PROCEDURE: 1. Set up the amplifier circuit. 2. Feed the input signal and note down the output amplitude by varying the input frequency. 3. Draw the frequency response characteristics.


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RESULT: Thus the circuit was set up and the graph was plotted.


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Lab Manual EC II Format 2

Documents

input voltage

output voltage

input waveform

output impedance

input signal

linear output

rc differentiator circuit

output waveforms