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A A B B C C D D E E 1 1 2 2 3 3 4 4 ZRMAE/ZEMAE LA-A551P Schematic REV 1.0 Juno/Iakros 10AN/10ANG 2013-07-05 Rev 1.0 AMD KABINI Quad Core 25W for UMA+DIS AMD KABINI Quad Core 15W Title Size Document Number Rev Date: Sheet of Security Classification Compal Secret Data THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Issued Date Deciphered Date LA-A551P 1.0 Cover Page 1 40 Tuesday, July 16, 2013 2013/05/15 2015/09/27 Compal Electronics, Inc. Title Size Document Number Rev Date: Sheet of Security Classification Compal Secret Data THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Issued Date Deciphered Date LA-A551P 1.0 Cover Page 1 40 Tuesday, July 16, 2013 2013/05/15 2015/09/27 Compal Electronics, Inc. Title Size Document Number Rev Date: Sheet of Security Classification Compal Secret Data THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Issued Date Deciphered Date LA-A551P 1.0 Cover Page 1 40 Tuesday, July 16, 2013 2013/05/15 2015/09/27 Compal Electronics, Inc.
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LA-A551PR10 ZEMAE 20130716 - Kythuatphancung

Jun 16, 2022

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Page 1: LA-A551PR10 ZEMAE 20130716 - Kythuatphancung

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

ZRMAE/ZEMAE

LA-A551P SchematicREV 1.0

Juno/Iakros 10AN/10ANG

2013-07-05 Rev 1.0

AMD KABINI Quad Core 25W for UMA+DIS

AMD KABINI Quad Core 15W

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-A551P 1.0

Cover Page

1 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-A551P 1.0

Cover Page

1 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-A551P 1.0

Cover Page

1 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

Compal Electronics, Inc.

Page 2: LA-A551PR10 ZEMAE 20130716 - Kythuatphancung

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

AMD FT3 APU

RTC CKT.

page 30~38

Power On/Off CKT & Power/B page 29

Power Circuit DC/DC

DC/DC Interface CKT.page 29

page 30

Jaguar Core

Integrated Yangtze FCH

BGA 769-balls

BANK 0, 1, 2, 3

200pin DDRIII-SO-DIMM X2

1.5V DDRIII 1333/1600 MT/sAPU SMBUS

Memory BUS(DDRIII)

page 10,11Single Channel

PCIeMini Card

For BT USB port 1page 23

Int. Camera

USB port 3page 20

USB port 0page 25

USB 2.0 Left

page 24

USB Right1

USB2.0 port 8

TouchScreen

USB port 4page 20

USB Right2 with S&C

page 24USB2.0 port 9

USB 2.05V 480Mbps

USB 3.05V 5Gbps

USB Right1

page 24USB3.0 port 0

USB Right2

page 24USB3.0 port 1

SATA port 0page 23

SATA HDD5V 6Gbps

SATA Gen3 port 0

SPK Conn

page 26

ALC259HDA Codec

page 25

3.3V 24MHz

HD Audio

Touch Pad Int.KBD

page 27

page 28page 25

ENE KB9012

LPC Bus3.3V 33 MHz

page 21

HDMI Conn

(1.4b & 3D)

page 20

LVDS/eDP Conn

EC SMBus

AMD Sun Pro M2, 64bit with 1GB DDR3(2Gbit)

page 13-19

AMD GPU

AMD Sun Pro M2, 64bit with 2GB DDR3(4Gbit)

page 7

SPI ROM

(4MB)

2.5bpsRTL8106E 10/100M

page 25PCIe port 1

PCIe Gen1 X1

PCIeMini Card For WLAN

PCIe port 2page 23

2.5bps

PCIe Gen1 X1

APU SMBUS

DP0 X4

DP1 X4

PCIe Gen2 X45Gbps

SPI BUS3.3V 33HZ

APU SMBus

Touch Screen Control/Bpage 20

Touch pad/LED Bpage 25

CardReader GL834L(USB20 port 3)

+USB (USB20 port0)

+Audio Combo jackpage 25

Sub Boards

JHPpage 25

CardReader

page 20USB port 2

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-A551P 1.0

Block Diagram

2 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-A551P 1.0

Block Diagram

2 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-A551P 1.0

Block Diagram

2 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

Compal Electronics, Inc.

page 5-9

Page 3: LA-A551PR10 ZEMAE 20130716 - Kythuatphancung

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

N-CHANNEL

+5VALW

+5VS

SUSP#

TPS22966

DESIGN CURRENT 0A

DESIGN CURRENT 0.15A

+5VL

+3VL

DESIGN CURRENT 4A

Ipeak=5.78A, Imax=4.05A, Iocp min=6.5A

Ipeak=9A, Imax=6.3A, Iocp min=11.05A

+1.5VGS

VGA_PWRGD

N-CHANNEL

Ipeak=8.1A, Imax=5.67A, Iocp min=9.63A

DESIGN CURRENT 2A

RT8207M

SYSON

SUSP#DESIGN CURRENT 1.5A +0.75VS

RT8243A

B+

+LCD_VDDAO-3413

LCD_ENVDD

+3VALW

+3VSTPS22966

N-CHANNEL

SUSP#

P-CHANNEL

DESIGN CURRENT 4A

DESIGN CURRENT 1.5A

TPS22966

3VALW_APU_PWREN

+3VALW_APUAO-3413

DESIGN CURRENT 330mAP-CHANNEL

P-CHANNELAO-3413

DGPU_PWR_EN

DESIGN CURRENT 60mA +3VS_DGPU

Ipeak=7.1A, Imax=5A, Iocp min=16A +0.95VALW

1.8_0.95VALW_PWREN

SY8208D

+1.5V

Ipeak=21A, Imax=15A, Iocp min=26.58A

RT8880A

Ipeak=21A, Imax=14.7A, Iocp min=40A

APU_CORE

VR_ON

VGA_CORE

GPU_DPRSLPVR

ISL62881

APU_CORE_NBIpeak=17A, Imax=13A, Iocp min=21.39A

+1.8VALW

1.8_0.95VALW_PWREN

SY8032DESIGN CURRENT 2.5A

+3V_WLANDESIGN CURRENT 2A

+3V_LAN

+0.95VS

0.95VS_PWREN#

N-CHANNEL DESIGN CURRENT 2A

FDS6676

+5VS_ODD

ODD_PWR

N-CHANNEL DESIGN CURRENT 2A

TPS22966

+1.8VS

SUSP#

N-CHANNEL

TPS22966

+1.8VGS

VGA_PWRGD

N-CHANNEL

TPS22966

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-A551P 0.2

Power Tree

3 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-A551P 0.2

Power Tree

3 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-A551P 0.2

Power Tree

3 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

Compal Electronics, Inc.

Page 4: LA-A551PR10 ZEMAE 20130716 - Kythuatphancung

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

+APU_CORE_NB

+3VL

+5VL

O

O

X

O

X

O

O

X

Voltage Rails ( O MEANS ON X MEANS OFF )

O

O

X

S3

+3VS

X

+3VALW

+5VS

S1

O

+APU_CORE

OO

OO

X

X X

power

plane

O

O

O

O

O

X

S5 S4/ Battery only

X X

B+

State

+1.5V

S5 S4/AC & Battery

don't exist

S5 S4/AC

+5VALW

S0

O

O

+0.75VS

+RTCVCC

O

O

O

O

O

O

+VSB+1.5VS

+1.8VS

APU SM Bus Address (SCL0/SDA0)

HEX AddressDevicePower

HEX

EC SM Bus1 Address

Device Address

EC SM Bus2 Address

DevicePowerPower

+0.95VS

+0.95VALW

+1.8VALW

UMA

3VALW_APU_PWREN

1.8_0.95VALW_PWREN

SYSON

VR_ON

SUSP#

G-A

G-B

G-C

G-D

G-E

APU POWER SEQUENCE

+3VALW_APU

+1.8VALW

+0.95VALW

+RTC

+3VS

+1.8VS

+1.5V

+0.95VS

+APU_CORE

+APU_CORE_NB

+3VS DDR SO-DIMM A A0H 1010 0000 b+3VS DDR SO-DIMM B A2H 1010 0010 b+3VS WLAN

+3VL Smart Battery 16H 0001 0110 b+3VL Charger 12H 0001 0010 b

+3VS VGA thermal 82H 1000 0010 b+3VS APU thermal 98H 1001 1000 b

HEX Address HEX Address

+1.5VS

HIGH

G3 LOW LOW

STATESIGNAL

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

SLP_S3# SLP_S5#

LOWLOW

LOW

LOW

HIGHHIGH

HIGH HIGH

HIGH

9012

9012

EC

9012@

LVDS-eDP

LVDS@ IEDP@

LVDS eDP

LVDS-eDP

Camera & Mic

Camera & Mic

Camera & Mic

CAM@

S&C

TI solution

2546@

TPS2546

14@

Size

8106E

BTO Option Table

CAM@EMI@ @CAM@EMI@

2544@

Codec

ALC259

ALC259

259@

Sun-Pro M2

VGA

GPU

VGA@

BTO

explain

Function

description

EMI/ESD/RF part

EMI@ @EMI@ ESD@ @ESD@ @RF@

EMI/ESD/RF part

EMI/ESD/RF part

885

w/

885@

w/ EMI

885_EMI@

Touch Screen

Touch Screen

W/ Touch

LAN

KB Light

KB Light

KB Light

KBL@

Function

BTO

explain

description

8106E

8106E@

Function

BTO

explain

description

APU

CPU A4-5000

Function

BTO

explain

description CPU A6-5200

15W 4C 25W 4C

A4R1@ A6R1@

TPS2544

Size

15@

14" 15" W/O EMI Touch

Touch_EMI@ @Touch_EMI@

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-A551P 1.0

Notes List

Custom

4 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-A551P 1.0

Notes List

Custom

4 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-A551P 1.0

Notes List

Custom

4 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

Compal Electronics, Inc.

Page 5: LA-A551PR10 ZEMAE 20130716 - Kythuatphancung

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

FAN Control Circuit

VGA

GRAPHICS

GPP

VGA

MEMORY

Close to APU AD40

15mil

MEMORY Reference Voltage (Cap follower checklist 1.02) EVENT# pull high

LAN

WLAN

LAN

WLAN

remove from CRB_ver0C

Check List 1.02

close to APU

1A

10mil

SA00002XA00 EOL change use SA00003UO00

2nd source SA00005JO00

P_TX_ZVDD P_RX_ZVDD

PCIE_ATX_GRX_N1PCIE_ATX_GRX_P1

PCIE_ATX_GRX_N0PCIE_ATX_GRX_P0

PCIE_ATX_GRX_N3PCIE_ATX_GRX_P3

PCIE_ATX_GRX_N2PCIE_ATX_GRX_P2

DDR_AB_DQS#0

M_ZVDDIO

DDR_AB_D0DDR_AB_D1DDR_AB_D2DDR_AB_D3DDR_AB_D4DDR_AB_D5DDR_AB_D6DDR_AB_D7

DDR_AB_D8DDR_AB_D9DDR_AB_D10DDR_AB_D11DDR_AB_D12DDR_AB_D13

DDR_AB_D15DDR_AB_D14

DDR_AB_D16DDR_AB_D17DDR_AB_D18DDR_AB_D19DDR_AB_D20DDR_AB_D21DDR_AB_D22DDR_AB_D23

DDR_AB_D24DDR_AB_D25DDR_AB_D26DDR_AB_D27DDR_AB_D28DDR_AB_D29DDR_AB_D30DDR_AB_D31

DDR_AB_D32DDR_AB_D33DDR_AB_D34DDR_AB_D35DDR_AB_D36DDR_AB_D37DDR_AB_D38DDR_AB_D39

DDR_AB_D40DDR_AB_D41DDR_AB_D42DDR_AB_D43DDR_AB_D44DDR_AB_D45DDR_AB_D46DDR_AB_D47

DDR_AB_D48DDR_AB_D49DDR_AB_D50DDR_AB_D51DDR_AB_D52DDR_AB_D53DDR_AB_D54DDR_AB_D55

DDR_AB_D56DDR_AB_D57DDR_AB_D58DDR_AB_D59DDR_AB_D60DDR_AB_D61DDR_AB_D62DDR_AB_D63

DDR_B_SCS1#DDR_B_SCS0#

DDR_AB_WE#DDR_AB_CAS#DDR_AB_RAS#

DDR_AB_MA15

DDR_AB_MA12

DDR_AB_MA14DDR_AB_MA13

DDR_AB_MA1DDR_AB_MA2

DDR_AB_MA11DDR_AB_MA10

DDR_AB_MA6DDR_AB_MA7

DDR_AB_MA3

DDR_AB_MA5DDR_AB_MA4

DDR_AB_MA8DDR_AB_MA9

DDR_AB_MA0

DDR_AB_DM6

DDR_AB_DM3

DDR_AB_DM5DDR_AB_DM4

DDR_AB_DM2DDR_AB_DM1

DDR_AB_DM7

DDR_AB_DM0

DDR_AB_DQS0

DDR_AB_DQS3DDR_AB_DQS#3

DDR_AB_DQS2DDR_AB_DQS#2

DDR_AB_DQS1DDR_AB_DQS#1

DDR_AB_DQS4DDR_AB_DQS#4DDR_AB_DQS5DDR_AB_DQS#5DDR_AB_DQS6DDR_AB_DQS#6

DDR_AB_DQS#7DDR_AB_DQS7

DDR_A_CLK0#DDR_A_CLK0

DDR_A_SCS1#DDR_A_SCS0#

DDR_A_ODT0DDR_A_ODT1

DDR_A_CKE0DDR_A_CKE1

MEM_MAB_EVENT#MEM_MAB_RST#

DDR_A_CLK1#DDR_A_CLK1

DDR_AB_BS1DDR_AB_BS2

DDR_AB_BS0

DDR_B_CLK0#DDR_B_CLK0

DDR_B_CLK1#DDR_B_CLK1

DDR_B_CKE1DDR_B_CKE0

DDR_B_ODT0DDR_B_ODT1

+MEM_VREF

+MEM_VREF MEM_MAB_EVENT#

PCIE_ATX_LANRX_P1PCIE_ATX_LANRX_N1

PCIE_ATX_WLANRX_P2PCIE_ATX_WLANRX_N2

MEM_MAB_RST#

FAN_SPEED1

+FAN1

+FAN1

PCIE_GTX_C_ARX_P0<12>PCIE_GTX_C_ARX_N0<12>

PCIE_GTX_C_ARX_P1<12>PCIE_GTX_C_ARX_N1<12>

PCIE_GTX_C_ARX_P2<12>PCIE_GTX_C_ARX_N2<12>

PCIE_GTX_C_ARX_P3<12>PCIE_GTX_C_ARX_N3<12>

PCIE_ATX_C_GRX_P0 <12>PCIE_ATX_C_GRX_N0 <12>

PCIE_ATX_C_GRX_P1 <12>PCIE_ATX_C_GRX_N1 <12>

PCIE_ATX_C_GRX_P2 <12>PCIE_ATX_C_GRX_N2 <12>

PCIE_ATX_C_GRX_P3 <12>PCIE_ATX_C_GRX_N3 <12>

DDR_AB_D[0..63] <10,11>

DDR_B_SCS0#<11>DDR_B_SCS1#<11>

DDR_A_CLK0<10>DDR_A_CLK0#<10>

DDR_A_CKE0<10>DDR_A_CKE1<10>

DDR_A_ODT0<10>DDR_A_ODT1<10>

DDR_A_SCS0#<10>DDR_A_SCS1#<10>

DDR_AB_RAS#<10,11>DDR_AB_CAS#<10,11>DDR_AB_WE#<10,11>

MEM_MAB_RST#<10,11>MEM_MAB_EVENT#<10,11>

DDR_A_CLK1<10>

DDR_AB_MA[0..15]<10,11>

DDR_A_CLK1#<10>

DDR_AB_DM[0..7]<10,11>

DDR_AB_BS0<10,11>DDR_AB_BS1<10,11>DDR_AB_BS2<10,11>

DDR_B_CLK0<11>DDR_B_CLK0#<11>DDR_B_CLK1<11>DDR_B_CLK1#<11>

DDR_B_CKE0<11>DDR_B_CKE1<11>

DDR_B_ODT0<11>DDR_B_ODT1<11>

DDR_AB_DQS[0..7]<10,11>

DDR_AB_DQS#[0..7]<10,11>

PCIE_ATX_C_LANRX_N1 <22>PCIE_ATX_C_LANRX_P1 <22>PCIE_LANTX_ARX_P1<22>

PCIE_LANTX_ARX_N1<22>

PCIE_WLANTX_ARX_P2<23>PCIE_WLANTX_ARX_N2<23>

PCIE_ATX_C_WLANRX_P2 <23>PCIE_ATX_C_WLANRX_N2 <23>

FAN_SPEED1 <27>

DFAN1<27>

+0.95VS_APU_GFX +0.95VS_APU_GFX

+1.5V

+1.5V

+1.5V

+3VS

+5VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-A551P 1.0

FT3 DISP/MISC/HDT

5 40Tuesday, July 16, 2013

2013/05/15 2015/09/27 Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-A551P 1.0

FT3 DISP/MISC/HDT

5 40Tuesday, July 16, 2013

2013/05/15 2015/09/27 Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-A551P 1.0

FT3 DISP/MISC/HDT

5 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

CC8 0.1U_0402_16V7KVGA@CC8 0.1U_0402_16V7KVGA@1 2

CC11 0.1U_0402_16V7KVGA@CC11 0.1U_0402_16V7KVGA@1 2

CC17

1U_0402_6.3V6K

CC17

1U_0402_6.3V6K1

2

CC2 0.1U_0402_16V7KCC2 0.1U_0402_16V7K1 2

CC94 180P_0402_50V8J

ESD@

CC94 180P_0402_50V8J

ESD@1 2

CC4 0.1U_0402_16V7KCC4 0.1U_0402_16V7K1 2

CC6 0.1U_0402_16V7KVGA@CC6 0.1U_0402_16V7KVGA@1 2

RC7 1K_0402_5%RC7 1K_0402_5%1 2

RC1 1.69K_0402_1%RC1 1.69K_0402_1%1 2

CC1 0.1U_0402_16V7KCC1 0.1U_0402_16V7K1 2

C2710U_0805_6.3V6M

C2710U_0805_6.3V6M

12

CC10 0.1U_0402_16V7KVGA@CC10 0.1U_0402_16V7KVGA@1 2

CC3 0.1U_0402_16V7KCC3 0.1U_0402_16V7K1 2

CC7 0.1U_0402_16V7KVGA@CC7 0.1U_0402_16V7KVGA@1 2

R2 0_0603_5%

Rshort@

R2 0_0603_5%

Rshort@1 2

C310U_0805_6.3V6M

C310U_0805_6.3V6M

12

RC2 1K_0402_1%RC2 1K_0402_1%12

FT3 REV 0.51

MEMORY

UC1A

FT3_BGA769 @

FT3 REV 0.51

MEMORY

UC1A

FT3_BGA769 @

AC38 M_VREFDQ

AD40 M_VREF

AL35 M_WE_L

AL34 M_CAS_L

AJ37 M_RAS_L

AN35 M1_CS_L1

AL38 M1_CS_L0

AR38 M0_CS_L1

AJ34 M0_CS_L0

AR37 M1_ODT1

AN37 M1_ODT0

AU38 M0_ODT1

AN38 M0_ODT0

J34 M1_CKE1

J37 M1_CKE0

J38 M0_CKE1

L34 M0_CKE0

AE34 M_EVENT_L

G38 M_RESET_L

AA38 M_CLK_L3

AA37 M_CLK_H3

AE37 M_CLK_L2

AE38 M_CLK_H2

AA32 M_CLK_L1

AA34 M_CLK_H1

AC34 M_CLK_L0

AC35 M_CLK_H0

Y41 M_DQS_L8

AA40 M_DQS_H8

BA34 M_DQS_L7

AY33 M_DQS_H7

AY41 M_DQS_L6

BA40 M_DQS_H6

AP40 M_DQS_L5

AP41 M_DQS_H5

AH40 M_DQS_L4

AH41 M_DQS_H4

P40 M_DQS_L3

P41 M_DQS_H3

H40 M_DQS_L2

H41 M_DQS_H2

A40 M_DQS_L1

B40 M_DQS_H1

A33 M_DQS_L0

B33 M_DQS_H0

Y40 M_DM8

AY34 M_DM7

AY40 M_DM6

AN41 M_DM5

AG40 M_DM4

N41 M_DM3

G40 M_DM2

B38 M_DM1

B32 M_DM0

N34 M_BANK2

AG35 M_BANK1

AJ38 M_BANK0

L35 M_ADD15

L38 M_ADD14

AN34 M_ADD13

N37 M_ADD12

R34 M_ADD11

AG34 M_ADD10

N38 M_ADD9

R38 M_ADD8

R35 M_ADD7

U34 M_ADD6

U37 M_ADD5

U38 M_ADD4

W34 M_ADD3

W38 M_ADD2

W35 M_ADD1

AG38 M_ADD0

AD41M_ZVDDIO_MEM_S

AB41M_CHECK7

AA41M_CHECK6

V40M_CHECK5

U41M_CHECK4

AC40M_CHECK3

AB40M_CHECK2

W40M_CHECK1

V41M_CHECK0

AY32M_DATA63

BA33M_DATA62

AY36M_DATA61

BA37M_DATA60

AY31M_DATA59

BA32M_DATA58

AY35M_DATA57

BA36M_DATA56

AY38M_DATA55

AY39M_DATA54

AV40M_DATA53

AU41M_DATA52

AY37M_DATA51

BA38M_DATA50

AW40M_DATA49

AV41M_DATA48

AT40M_DATA47

AR40M_DATA46

AM40M_DATA45

AL40M_DATA44

AU40M_DATA43

AT41M_DATA42

AN40M_DATA41

AM41M_DATA40

AJ41M_DATA39

AJ40M_DATA38

AE41M_DATA37

AE40M_DATA36

AK41M_DATA35

AK40M_DATA34

AF41M_DATA33

AF40M_DATA32

T40M_DATA31

R40M_DATA30

M40M_DATA29

L40M_DATA28

U40M_DATA27

T41M_DATA26

N40M_DATA25

M41M_DATA24

J41M_DATA23

J40M_DATA22

E41M_DATA21

E40M_DATA20

K41M_DATA19

K40M_DATA18

F41M_DATA17

F40M_DATA16

C40M_DATA15

B41M_DATA14

A37M_DATA13

B36M_DATA12

D41M_DATA11

D40M_DATA10

A38M_DATA9

B37M_DATA8

B34M_DATA7

A34M_DATA6

A30M_DATA5

B29M_DATA4

A36M_DATA3

B35M_DATA2

A32M_DATA1

B30M_DATA0

JFAN

CVILU_CI4403M1HRT-NH

Conn@JFAN

CVILU_CI4403M1HRT-NH

Conn@

11

22

33

GND4

GND5

RC61K_0402_1%

RC61K_0402_1%

12

C10.01U_0402_25V7K@

C10.01U_0402_25V7K@

1

2

CC18

0.1U_0402_16V7K

CC18

0.1U_0402_16V7K1

2

RC439.2_0402_1% RC439.2_0402_1%1 2

CC5 0.1U_0402_16V7KVGA@CC5 0.1U_0402_16V7KVGA@1 2

FT3 REV 0.51

PCIE

UC1B

FT3_BGA769 @

FT3 REV 0.51

PCIE

UC1B

FT3_BGA769 @

E7 P_GFX_RXN3

D7 P_GFX_RXP3

G4 P_GFX_RXN2

G5 P_GFX_RXP2

J4 P_GFX_RXN1

J5 P_GFX_RXP1

L4 P_GFX_RXN0

L5 P_GFX_RXP0

W8 P_TX_ZVDD_095

N8 P_GPP_RXN3

N10 P_GPP_RXP3

N4 P_GPP_RXN2

N5 P_GPP_RXP2

R4 P_GPP_RXN1

R5 P_GPP_RXP1

R8 P_GPP_RXN0

R10 P_GPP_RXP0

D1P_GFX_TXN3

D2P_GFX_TXP3

E1P_GFX_TXN2

E2P_GFX_TXP2

F1P_GFX_TXN1

F2P_GFX_TXP1

G1P_GFX_TXN0

G2P_GFX_TXP0

W7P_RX_ZVDD_095

H1P_GPP_TXN3

H2P_GPP_TXP3

J1P_GPP_TXN2

J2P_GPP_TXP2

K1P_GPP_TXN1

K2P_GPP_TXP1

L1P_GPP_TXN0

L2P_GPP_TXP0

R1 10K_0402_5%R1 10K_0402_5%12

RC81K_0402_1%

RC81K_0402_1%

12

CC9 0.1U_0402_16V7KVGA@CC9 0.1U_0402_16V7KVGA@1 2

C4

1000P_0402_50V7K

@C4

1000P_0402_50V7K

@

1

2

CC12 0.1U_0402_16V7KVGA@CC12 0.1U_0402_16V7KVGA@1 2

U4

P2793BB0_SO8

U4

P2793BB0_SO8

EN1

VIN2

VOUT3

VSET4

GND8

GND7

GND6

GND5

Page 6: LA-A551PR10 ZEMAE 20130716 - Kythuatphancung

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

HDMI

EDP/LVDS

HDMI

EDP/LVDS

EDP/LVDSEDP Cap co-lay

route TEST25_H/L AND TEST28_H/L differentially

DISPLAY

MISC

MISC

TEST

LCD_ENBKL : APU to EC to LCDLVDS_CLK&LVDS_DATA layout follow EDP AUX route 85 ohm

EDP Cap co-lay

DP_STEREOSYNCUsed to align shutter glasses with the interleaved video frame

EDP use 2 Lane for FHD

SVT,SVC,SVD, APU_PWRGD is 1.8V OutputPROCHOT is 3.3V Input

NOTE: DP_STEREOSYNC & APU_HSYNC PU FOR INTERNAL(HDMI enable), DP_STEREOSYNC & APU_HSYNC PD FOR CUSTOMER(HDMI disable)

HDMI DDC PU RES move to HDMI page

close to APU

close to APU

APU_HSYNC PU FOR INTERNAL(HDMI enable)

AMD: Pull down 75ohm for disable CRT

APU_HDMI_CLKAPU_HDMI_DATA

EDP_LCD_TXOUT2+EDP_LCD_TXOUT2-

EDP_LCD_TXOUT1+EDP_LCD_TXOUT1-

LCD_TXCLK+LCD_TXCLK-

DP_2K_ZVSSDP_150_ZVSS

LCD_ENBKLLCD_ENVDDLCD_INT_PWM

EDP_LVDS_DATA_R

EDP_LVDS_CLK_R

DAC_ZVSS

EDP_LVDS_CLK_REDP_LVDS_DATA_R

TEST4TEST5

TEST31TEST28_LTEST28_H

TEST42TEST43TEST39TEST40TEST41

TEST18TEST19TEST25_HTEST25_L

DP_STEREOSYNC

VDDMEM_SENSE

VDD095_FB_HVDD095_FB_L

APU_PROCHOT#

APU_ALERT#

TEST25_H

TEST25_L

APU_TDIAPU_TDOAPU_TCKAPU_TMSAPU_TRST#APU_DBRDYAPU_DBREQ#

APU_RST#

APU_PWRGD

DP_STEREOSYNC

APU_PROCHOT#

LCD_INT_PWM

TEST14TEST15TEST16TEST17

APU_RST#

APU_PWRGD

LCD_ENBKL

TEST36TEST37

EDP_LVDS_HPD

EDP_LVDS_HPD

APU_PWRGD

TEST19TEST18

APU_TDI

APU_DBREQ#

EDP_LVDS_HPD

TEST36

TEST37

TEST36

TEST37

APU_PROCHOT#

EDP_LCD_TXOUT0+EDP_LCD_TXOUT0-

EDP_LCD_TXOUT2+

EDP_LCD_TXOUT2-

EDP_LCD_TXOUT0+_R

EDP_LCD_TXOUT0-_R

APU_RST#

APU_CRT_HSYNC

APU_CRT_HSYNC

APU_TRST#

APU_ALERT#DP_STEREOSYNC

APU_TCKAPU_TMS

APU_CRT_R

APU_CRT_G

APU_CRT_B

APU_CRT_R

APU_CRT_G

APU_CRT_B

APU_HDMI_TX2+<21>APU_HDMI_TX2-<21>

APU_HDMI_TX1+<21>APU_HDMI_TX1-<21>

APU_HDMI_TX0+<21>APU_HDMI_TX0-<21>

APU_HDMI_CLK+<21>APU_HDMI_CLK-<21>

APU_HDMI_CLK <21>APU_HDMI_DATA <21>

EDP_LCD_TXOUT2+_R<20>EDP_LCD_TXOUT2-_R<20>

EDP_LCD_TXOUT1-_R<20>EDP_LCD_TXOUT1+_R<20>

EDP_LCD_TXOUT0+_R<20>

EDP_LCD_TXOUT0-_R<20>

LCD_TXCLK-<20>LCD_TXCLK+<20>

LCD_ENBKL <20,27>LCD_ENVDD <20>LCD_INT_PWM <20>

APU_SVT<36>APU_SVC<36>APU_SVD<36>

EC_SMB_CK2<13,27>EC_SMB_DA2<13,27>

APU_VDDNB_SEN_H<36>APU_VDD_SEN_H<36>

APU_VDD_SEN_L<36>

APU_PROCHOT#<27,36>

APU_PWRGD<36>

EDP_LVDS_CLK <20>EDP_LVDS_DATA <20>

EDP_LVDS_HPD <20>

HDMI_HPD <21,8>

+3VS

+3VS

+1.8VS

+1.8VS

+1.8VS

+1.8VS

+3VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-A551P 1.0

FT3 DISP/MISC/HDT

6 40Tuesday, July 16, 2013

2013/05/15 2015/09/27 Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-A551P 1.0

FT3 DISP/MISC/HDT

6 40Tuesday, July 16, 2013

2013/05/15 2015/09/27 Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-A551P 1.0

FT3 DISP/MISC/HDT

6 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

RC39 1K_0402_5%@RC39 1K_0402_5%@1 2

T5 TP@T5 TP@

T17TP@T17TP@

DC1

@ESD@

SCV00001K00

DC1

@ESD@

SCV00001K00

12

CC103 0_0402_5%LVDS@CC103 0_0402_5%LVDS@1 2

RC41 1K_0402_5%@RC41 1K_0402_5%@1 2

CC108 0_0402_5%LVDS@CC108 0_0402_5%LVDS@1 2

CC110

0.1U_0402_16V7K

EDP@CC110

0.1U_0402_16V7K

EDP@1 2

RC75 0_0402_5%LVDS@RC75 0_0402_5%LVDS@1 2

RC35 510_0402_1%RC35 510_0402_1%1 2

T6 TP@T6 TP@

RC20 100K_0402_5%RC20 100K_0402_5%12

T9 TP@T9 TP@

RC27 75_0402_1%RC27 75_0402_1%

RC9 2K_0402_1%RC9 2K_0402_1%1 2

RC15 4.7K_0402_5%LVDS@RC15 4.7K_0402_5%LVDS@1 2

CC109

0.1U_0402_16V7K

EDP@CC109

0.1U_0402_16V7K

EDP@1 2

RC46 1K_0402_5%@RC46 1K_0402_5%@1 2

RC36 1K_0402_5%@RC36 1K_0402_5%@1 2

RC13 150_0402_1%RC13 150_0402_1%1 2

RC77 0_0402_5%LVDS@RC77 0_0402_5%LVDS@1 2

T8 TP@T8 TP@

RC32 300_0402_5%RC32 300_0402_5%1 2

CC93 180P_0402_50V8J

ESD@

CC93 180P_0402_50V8J

ESD@1 2

RC22 75_0402_1%RC22 75_0402_1%

RC44 100K_0402_5%EDP@RC44 100K_0402_5%EDP@ 12

T32TP@ T32TP@

T7 TP@T7 TP@RC34 300_0402_5%RC34 300_0402_5%1 2

RC78 0_0402_5%LVDS@RC78 0_0402_5%LVDS@1 2

RC21 499_0402_1%RC21 499_0402_1%1 2

T15TP@ T15TP@

T37TP@ T37TP@

T34TP@T34TP@

FT3 REV 0.51

DISPLAY/SVI2/JTAG/TEST

UC1C

FT3_BGA769 @

FT3 REV 0.51

DISPLAY/SVI2/JTAG/TEST

UC1C

FT3_BGA769 @

AU33 VDD_095_FB_L

AV33 VDD_095_FB_H

E23 VSS_SENSE

E25 VDDIO_MEM_S_SENSE

G23 VDDCR_CPU_SENSE

D23 VDDCR_NB_SENSE

A25 DBREQ_L

B25 DBRDY

G27 TRST_L

D33 TMS

D35 TCK

D31 TDO

D29 TDI

B18 ALERT_L

A22 PROCHOT_L

A19 LDT_PWROK

B19 APU_PWROK

A20 LDT_RST_L

B20 APU_RST_L

B21 SID

B22 SIC

E29 SVD

D27 SVC

G31 SVT

H15 DISP_CLKIN_L

K15 DISP_CLKIN_H

B7 LTDP0_TXN3

A7 LTDP0_TXP3

B6 LTDP0_TXN2

A6 LTDP0_TXP2

B5 LTDP0_TXN1

A5 LTDP0_TXP1

B4 LTDP0_TXN0

A4 LTDP0_TXP0

B12 TDP1_TXN3

A12 TDP1_TXP3

B11 TDP1_TXN2

A11 TDP1_TXP2

B10 TDP1_TXN1

A10 TDP1_TXP1

B9 TDP1_TXN0

A9 TDP1_TXP0

E21HDMI_EN/DP_STEREOSYNC

AP29TMON_CAL

N32M_ANALOGOUT

R32M_ANALOGIN

AJ8USB_ATEST1

AJ10USB_ATEST0

H25GIO_TSTDTM0_CLKINIT

H21GIO_TSTDTM0_SERIALCLK

A29FREE_2

E33M_TEST

AU35PLLCHRZ_L

AV35PLLCHRZ_H

A24BYPASSCLK_L

B24BYPASSCLK_H

A28PLLTEST0

B28PLLTEST1

B26BP3

A26BP2

B27BP1

A27BP0

D25DIECRACKMON

H29THERMDC

H27THERMDA

A16DAC_ZVSS

D21DAC_SDA

D19DAC_SCL

E19DAC_VSYNC

G19DAC_HSYNC

B15DAC_BLUE

A14DAC_GREEN

B14DAC_RED

H17LTDP0_HPD

E15LTDP0_AUXN

D15LTDP0_AUXP

H19TDP1_HPD

E17TDP1_AUXN

D17TDP1_AUXP

A18DP_VARY_BL

A17DP_DIGON

B17DP_BLON

A21DP_2K_ZVSS

B16DP_150_ZVSS

RC26 1K_0402_5%RC26 1K_0402_5%12

T1 TP@T1 TP@

RC19 100K_0402_5%RC19 100K_0402_5%12

RPC4

1K_8P4R_5%

RPC4

1K_8P4R_5%

1 82 73 64 5

RC18 1K_0402_5%RC18 1K_0402_5%1 2

T12TP@T12TP@

CC99 1000P_0402_50V7K

ESD@

CC99 1000P_0402_50V7K

ESD@1 2

T35TP@T35TP@

T18TP@ T18TP@

CC103

0.1U_0402_16V7KEDP@

CC103

0.1U_0402_16V7KEDP@

RPC2

1K_8P4R_5%

RPC2

1K_8P4R_5%

1 82 73 64 5

RC14 4.7K_0402_5%LVDS@RC14 4.7K_0402_5%LVDS@1 2

T13TP@T13TP@

T19TP@ T19TP@

T28TP@ T28TP@

CC107

0.1U_0402_16V7KEDP@

CC107

0.1U_0402_16V7KEDP@

CC101

0.1U_0402_16V7KEDP@

CC101

0.1U_0402_16V7KEDP@

T3 TP@T3 TP@

RC43 510_0402_1%RC43 510_0402_1%1 2

T14TP@T14TP@

RC76 0_0402_5%LVDS@RC76 0_0402_5%LVDS@1 2

CC108

0.1U_0402_16V7KEDP@

CC108

0.1U_0402_16V7KEDP@

T2 TP@T2 TP@

RC37 1K_0402_5%@RC37 1K_0402_5%@1 2

RC28 1K_0402_5%RC28 1K_0402_5%

12

RC45 100K_0402_5%@RC45 100K_0402_5%@ 12

T4 TP@T4 TP@

CC101 0_0402_5%LVDS@CC101 0_0402_5%LVDS@1 2

T16TP@T16TP@

RC24 75_0402_1%RC24 75_0402_1%

CC107 0_0402_5%LVDS@CC107 0_0402_5%LVDS@1 2

Page 7: LA-A551PR10 ZEMAE 20130716 - Kythuatphancung

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

USB2.0-Left1 (Debug Port)

USB2.0-Right1

USB2.0-Right2

USB3.0-Right1

USB3.0-Right2

4M Byte

SPI ROM

48KMHz CRYSTAL

SATA HDD

VGA

EC

SATA

CLK

USB

SPI

LPC

SW said ROM can change to 4MB

4MB ROM P/N:

SA00004LI00

Socket: SP07000F500/SP07000H900Please place UC5 close to UC1 APU,

WLAN (BT)

Touch Screen

Cardreader

Int. Camera

LAN

WLAN

USB_ZVSS

USBSS_ZVDDUSBSS_ZVSS

SATA_ZVSSSATA_ZVSS_095

48M_X1

48M_X2

LPC_CLK0LPC_CLK1 APU_SPI_CLK

APU_SPI_CS1#

APU_SPI_MOSIAPU_SPI_MISO

APU_SPI_CLK_R

APU_SPI_CS1#

APU_SPI_MISOAPU_SPI_MOSI

APU_SPI_CS2#

48M_X1

48M_X2

SATA_ACT

APU_SPI_WP#

APU_SPI_CLK_R

USB20_P0 <25>USB20_N0 <25>

USB20_P8 <24>USB20_N8 <24>

USB20_P9 <24>USB20_N9 <24>

CLK_PCIE_VGA<12>CLK_PCIE_VGA#<12>

SATA_ATX_DRX_P0<23>SATA_ATX_DRX_N0<23>

LPC_AD0<27>LPC_AD1<27>LPC_AD2<27>LPC_AD3<27>

SERIRQ<27>

CLK_PCI_EC<27,8>CLK_PCI_DDR<8>

LPC_FRAME#<27,8>

SATA_DTX_C_ARX_N0<23>SATA_DTX_C_ARX_P0<23>

USB30_TX0P <24>USB30_TX0N <24>

USB30_TX1P <24>USB30_TX1N <24>

USB30_RX0P <24>USB30_RX0N <24>

USB30_RX1P <24>USB30_RX1N <24>

USB20_P1 <23>USB20_N1 <23>

USB20_P2 <25>USB20_N2 <25>

USB20_P3 <20>USB20_N3 <20>

USB20_P4 <20>USB20_N4 <20>

CLK_LAN<22>CLK_LAN#<22>

CLK_WLAN<23>CLK_WLAN#<23>

EC_SPIDI<27>EC_SPIDO<27>

EC_SPICLK<27>EC_SPICS#<27>

+0.95VALW

+0.95VS

+3VALW_APU

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-A551P 1.0

FT3-SATA/CLK/USB/SPI/LPC

7 40Tuesday, July 16, 2013

2013/05/15 2015/09/27 Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-A551P 1.0

FT3-SATA/CLK/USB/SPI/LPC

7 40Tuesday, July 16, 2013

2013/05/15 2015/09/27 Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-A551P 1.0

FT3-SATA/CLK/USB/SPI/LPC

7 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

RC121 33_0402_5%885_EMI@RC121 33_0402_5%885_EMI@1 2

T20

TP@

T20

TP@

RC63 0_0402_5%EMI@RC63 0_0402_5%EMI@1 2

FT3 REV 0.51

CLK/SATA/USB/SPI/LPC

UC1E

FT3_BGA769 @

FT3 REV 0.51

CLK/SATA/USB/SPI/LPC

UC1E

FT3_BGA769 @

AV2 LPC_PD_L/GEVENT5_L/SPI_TPM_CS_L

AP25 LPC_CLKRUN_L

AV29 SERIRQ/GPIO48

AP1 LDRQ0_L

AP2 LFRAME_L

AR1 LAD3

AR2 LAD2

AT1 LAD1

AT2 LAD0

AW2 LPCCLK1

AY2 LPCCLK0

N1 X48M_X2

N2 X48M_X1

AP13 X14M_25M_48M_OSC

AA4 GPP_CLK3N

AA5 GPP_CLK3P

AC5 GPP_CLK2N

AC4 GPP_CLK2P

AE5 GPP_CLK1N

AE4 GPP_CLK1P

AC10 GPP_CLK0N

AC8 GPP_CLK0P

U5 GFX_CLKN

U4 GFX_CLKP

BA12 SATA_X2

AY12 SATA_X1

BA30 SATA_ACT_L/GPIO67

AP19 SATA_ZVDD_095

AR19 SATA_ZVSS

BA17 SATA_RX1P

AY17 SATA_RX1N

BA19 SATA_TX1N

AY19 SATA_TX1P

AY16 SATA_RX0P

BA16 SATA_RX0N

AY14 SATA_TX0N

BA14 SATA_TX0P

AU9SPI_WP_L/GPIO161

AU11SPI_HOLD_L/GEVENT9_L

AR7SPI_DI/GPIO164

AR11SPI_DO/GPIO163

AR4SPI_CS2_L/GPIO166

AW9SPI_CS1_L/GPIO165

AU7SPI_CLK/GPIO162

W2USB_SS_1RXN

W1USB_SS_1RXP

R2USB_SS_1TXN

R1USB_SS_1TXP

V1USB_SS_0RXN

V2USB_SS_0RXP

T1USB_SS_0TXN

T2USB_SS_0TXP

AE8USB_SS_ZVDD_095_USB3_DUAL

AE10USB_SS_ZVSS

AA2USB_HSD9N

AA1USB_HSD9P

AB2USB_HSD8N

AB1USB_HSD8P

AC2USB_HSD7N

AC1USB_HSD7P

AD2USB_HSD6N

AD1USB_HSD6P

AE2USB_HSD5N

AE1USB_HSD5P

AF2USB_HSD4N

AF1USB_HSD4P

AG2USB_HSD3N

AG1USB_HSD3P

AG8USB_HSD2N

AG7USB_HSD2P

AJ5USB_HSD1N

AJ4USB_HSD1P

AL5USB_HSD0N

AL4USB_HSD0P

AG4USB_ZVSS

W4USBCLK/14M_25M_48M_OSC

RC66 10K_0402_5%RC66 10K_0402_5%1 2

RC130 0_0402_5%@

RC130 0_0402_5%@1 2

RC124 33_0402_5%885@RC124 33_0402_5%885@1 2

CC234.7P_0402_50V8JCC234.7P_0402_50V8J

1

2

RC58 1K_0402_1%RC58 1K_0402_1%12RC59 1K_0402_1%RC59 1K_0402_1%12

RC57 11.8K_0402_1%RC57 11.8K_0402_1%1 2

UC5

MX25L3205DM2I-12G SO8

UC5

MX25L3205DM2I-12G SO8

CS1

VCC8

SO2

HOLD7

GND4

SI5

SCLK6

WP3

T21TP@T21TP@ RC10

10_0402_5%@EMI@

RC1010_0402_5%

@EMI@

12

T22TP@T22TP@

CC25

0.1U_0402_16V4Z

CC25

0.1U_0402_16V4Z1

2

RC62 22_0402_5%EMI@

RC62 22_0402_5%EMI@

1 2

CC1310P_0402_50V8J

@EMI@

CC1310P_0402_50V8J

@EMI@1

2

YC148MHZ_8PF_X3S048000D81H-WYC148MHZ_8PF_X3S048000D81H-W

11

22

33

44

RC64 1M_0402_5%RC64 1M_0402_5%RC101 33_0402_5%885@RC101 33_0402_5%885@1 2

CC22

4.7P_0402_50V8J

CC22

4.7P_0402_50V8J

1

2

RC61 1K_0402_1%RC61 1K_0402_1%1 2

RC102 33_0402_5%885@RC102 33_0402_5%885@1 2

RC60 1K_0402_1%RC60 1K_0402_1%1 2

Page 8: LA-A551PR10 ZEMAE 20130716 - Kythuatphancung

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

SD

Sequence

GPIO

IR

MSIC

HDA

RTC CLK

PULL

LOW

PULL

HIGH

RTC_CLKCLK_PCI_EC CLK_PCI_DDR LPC_FRAME# GEVENT2

DEFAULT

STRAP PINS

BOOT FAIL TIMER

BOOT FAIL TIMERDISABLED

CLKGENENABLE

CLKGENDISABLED

SPI ROM 1.8V SPI ROM

3.3V SPI ROM

NORMAL POWR UP/RESET TIMING

FAST POWER UP/RESET TIMINGFOR SIMULATION

LPC ROM

DEFAULT DEFAULT

DEFAULT

DEFAULT

Follow check list & ORB_0C

design 10 ms RC delay circuit

on +1.8-V S5 power rail.

PCIE_RST# is for PCIE devices on APU

A_RST# is for LPC devices

APU SMBus0 for S0 , SMBus1 for S5If APU_SMBUS no use pull high 10K

SLP_S3#, SLP_S5# PU reserve

Board_ID0 Board_ID1Board Conf.

PX5ReservedDISUMA

0011

0101

close to APU

For DIS

TOUCH_SEL

H L

TouchPanel

Non Touch

Panel

(turn off EHCI)

PANEL_SEL

H L

eDPpanel

LVDSpanel

SW request

GPIO174 PD CHK1.03

Place at GPU

close to APU

For HDMI

Add RC3 and RC11 for AMD issue

APU_PCIE_RST#_R

APU_SCLK0APU_SDATA0

LPC_RST#_R

32K_X1

32K_X2

HDA_BITCLK

HDA_SYNC

AZ_SDIN0_HDHDA_SDOUT

HDA_RST#

AZ_SDIN0_HDHDA_BITCLK

RTC_CLKGEVENT2

GEVENT2

SLP_S3#SLP_S5#

SYS_PWRGD

USB_OC#0USB_CHG_OC#

RSMRST#

TEST0TEST1/TMSTEST2

APU_PCIE_RST#_R

LPC_RST#_R

EC_LID_OUT#

APU_SCLK1APU_SDATA1

32K_X1

32K_X2

APU_GPIO174

RSMRST#

RTC_CLK

SLP_S3#SLP_S5#

PXS_RST#

PXS_RST#

USB_OC#2

Board_ID1

Board_ID0

Board_ID1

Board_ID0

APU_PCIE_WAKE#

PXS_RST#

EC_PXCONTROL

PXS_EN#

PXS_PWREN

EC_LID_OUT#

APU_SDATA0APU_SCLK0APU_SCLK1APU_SDATA1

TOUCH_SEL

TOUCH_SEL

PXS_PWREN

PANEL_SEL

PANEL_SEL

SYS_PWRGD

USB_OC#0USB_OC#2USB_CHG_OC#

PXS_PWREN

Board_ID1Board_ID0PXS_EN#

SYS_PWRGD

PW_CLEAR#

APU_PCIE_WAKE#APU_GPIO174

AZ_BITCLK_HD

HDMI_HPD_N

HDMI_HPD_N

TEST0

TEST1/TMS

TEST2

APU_SCLK0 <10,11,23>APU_SDATA0 <10,11,23>

AZ_SYNC_HD<26>

AZ_SDIN0_HD<26>AZ_SDOUT_HD<26>AZ_BITCLK_HD<26>

AZ_RST_HD#<26>

LPC_FRAME#<27,7>

CLK_PCI_EC<27,7>CLK_PCI_DDR<7>

RTC_CLK <27>

SLP_S3#<27>

SLP_S5#<27>

EC_SCI#<27>EC_SMI#<27>

SYS_PWRGD<27>PBTN_OUT#<27>

KB_RST#<27>GATEA20<27>

USB_OC#0<24,27>USB_CHG_OC#<24,27>

EC_RSMRST#<27>

LPC_RST# <27>

APU_PCIE_RST# <12,22,23>

EC_LID_OUT# <27>

CLKREQ_PEG#<13>

APU_SPKR <26>

APU_PCIE_WAKE#<22>

LAN_EN<22> PXS_RST# <12>

USB_OC#2<25,27>

CLKREQ_WLAN#<23>

CLKREQ_LAN#<22>

APU_SCLK1 <25>APU_SDATA1 <25>

EC_PXCONTROL <27>

PXS_PWREN <14,37>

VGA_PWRGD <15,37>

HDMI_HPD <21,6>

+3VALW_APU

+1.8VALW

+3VALW_APU

+3VS

+3VALW_APU

+3VS

+3VALW_APU

+3VALW_APU

+3VS+3VS

+1.8VALW

+3VS+3VALW_APU

+3VS

+3VALW_APU

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-A551P 1.0

FT3 GPIO/AZ/MISC

8 40Tuesday, July 16, 2013

2013/05/15 2015/09/27 Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-A551P 1.0

FT3 GPIO/AZ/MISC

8 40Tuesday, July 16, 2013

2013/05/15 2015/09/27 Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-A551P 1.0

FT3 GPIO/AZ/MISC

8 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

RC97 10K_0402_5%@RC97 10K_0402_5%@1 2

RC161K_0402_5%

@RC161K_0402_5%

@1 2

RC137 10K_0402_5%UMA@RC137 10K_0402_5%UMA@1 2

RC133 1K_0402_5%VGA@RC133 1K_0402_5%VGA@1 2

T23TP@T23TP@

RC1142K_0402_5%RC1142K_0402_5%

12

RC10420M_0402_5%

RC10420M_0402_5%

12

RC171K_0402_5%

@RC171K_0402_5%

@1 2

RC128 2.2K_0402_5%@RC128 2.2K_0402_5%@1 2

YC2

32.768KHZ_7PF_Q13MC1461000100

YC2

32.768KHZ_7PF_Q13MC1461000100

1

4

2

3

RC138 10K_0402_5%UMA@RC138 10K_0402_5%UMA@1 2

RC100 33_0402_5%RC100 33_0402_5%1 2

RPC5

100K_8P4R_5%

RPC5

100K_8P4R_5%

1 82 73 64 5

RC11010K_0402_5%RC11010K_0402_5%

12

CC48 180P_0402_50V8J

@ESD@

CC48 180P_0402_50V8J

@ESD@1 2

RC98 33_0402_5%RC98 33_0402_5%1 2

RC129 2.2K_0402_5%@RC129 2.2K_0402_5%@1 2

RC73 33_0402_5%RC73 33_0402_5%1 2

RPC6

10K_8P4R_5%VGA@

RPC6

10K_8P4R_5%VGA@

1 82 73 64 5

RC94 10K_0402_5%RC94 10K_0402_5%1 2

RC93 33_0402_5%RC93 33_0402_5%1 2

RC315K_0402_5%

RC315K_0402_5%

RC991K_0402_5%NTOUCH@

RC991K_0402_5%NTOUCH@

12

RC1152K_0402_5%

@RC1152K_0402_5%

@

12

RC74100K_0402_5%@

RC74100K_0402_5%@

12

RC92 33_0402_5%EMI@

RC92 33_0402_5%EMI@

1 2

RC96 10K_0402_5%@RC96 10K_0402_5%@1 2

FT3 REV 0.51

ACPI/SD/AZ/GPIO/RTC/MISC

UC1D

FT3_BGA769 @

FT3 REV 0.51

ACPI/SD/AZ/GPIO/RTC/MISC

UC1D

FT3_BGA769 @

AJ1 X32K_X2

AJ2 X32K_X1

AL1 AZ_RST_L

AM2 AZ_SYNC

AL2 AZ_SDIN3/GPIO170

AM1 AZ_SDIN2/GPIO169

AK1 AZ_SDIN1/GPIO168

AK2 AZ_SDIN0/GPIO167

AN1 AZ_SDOUT

AN2 AZ_BITCLK

AY1 USB_OC3_L/TDO/GEVENT15_L

AV1 USB_OC2_L/TCK/GEVENT14_L

AW1 USB_OC1_L/TDI/GEVENT13_L

AY8 USB_OC0_L/SPI_TPM_CS_L/TRST_L/GEVENT12_L

AY29 CLK_REQG_L/GPIO65/OSCIN

AV27 CLK_REQ3_L/SATA_IS1_L/SATA_ZP1_L/GPIO63

AR27 CLK_REQ2_L/GPIO62

AW29 CLK_REQ1_L/GPIO61

AU29 CLK_REQ0_L/SATA_IS0_L/SATA_ZP0_L/GPIO60

AV15 IR_LED_L/LLB_L/GPIO184

BA10 IR_RX1/GEVENT20_L

BA9 IR_TX1/GEVENT6_L

AV13 IR_TX0/GEVENT21_L

AP15 AC_PRES/IR_RX0/GEVENT16_L

AL7 LPC_SMI_L/GEVENT23_L

AN5 LPC_PME_L/GEVENT3_L

AR31 GA20IN/GEVENT0_L

AR23 KBRST_L

AY6 TEST2

AY10 TEST1/TMS

AU13 TEST0

BA5 SLP_S5_L

AY3 SLP_S3_L

AW11 WAKE_L/GEVENT8_L

AY7 SYS_RESET_L/GEVENT19_L

AM19 PWR_GOOD

BA8 PWR_BTN_L

AY5 RSMRST_L

AY9 PCIE_RST_L

AY4 LPC_RST_L

AV11RTCCLK

AU31FANIN0/GPIO56

AV31FANOUT0/GPIO52

AP23GENINT2_L/GPIO33

BA29GENINT1_L/GPIO32

BA6GEVENT22_L

AU17BLINK/GEVENT18_L

AN8GEVENT17_L

AP11GEVENT11_L

AP17GEVENT10_L

AR15GEVENT7_L

BA4GEVENT4_L

AV17GEVENT2_L

BA3GPIO174

AM21GPIO71

AV21GPIO70

AY26GPIO69

AU21GPIO68

BA27SPKR/GPIO66

AY27GPIO64

AV19GPIO59

BA26GPIO58

AP21GPIO57

AV23GPIO55

BA28GPIO51

AY28GPIO50

AP27GPIO49

BA11SDA1/GPIO228

AY11SCL1/GPIO227

AV25SDA0/GPIO47

AU25SCL0/GPIO43

AY25SD_LED/GPIO45

BA24SD_DATA3/GPIO80

AY24SD_DATA2/GPIO79

AY21SD_DATA1/GPIO78

BA22SD_DATA0/GPIO77

BA20SD_WP/GPIO76

AY20SD_CD/GPIO75

AY23SD_CMD/GPIO74

AY22SD_CLK/GPIO73

BA23SD_PWR_CTRL

RC515K_0402_5%

@RC515K_0402_5%

@

RC127 10K_0402_5%RC127 10K_0402_5%1 2

CC27

150P_0402_50V8J

CC27

150P_0402_50V8J

1

2

RC95

10K_0402_5%

TOUCH@

RC95

10K_0402_5%

TOUCH@

12

RC25

10K_0402_5%

RC25

10K_0402_5%

12

RC10710K_0402_5%

@RC10710K_0402_5%

@

12

RC

71

47K

_0402_5%

RC

71

47K

_0402_5%

12

G

D S

QC22N7002KW_SOT323-3

G

D S

QC22N7002KW_SOT323-3

2

1 3

QC3A

2N7002KDWH_SOT363-6

VGA@

QC3A

2N7002KDWH_SOT363-6

VGA@6 1

2

RC10810K_0402_5%RC10810K_0402_5%

12

RC1115K_0402_5%

RC1115K_0402_5%

DC2

CH751H-40PT_SOD323-2

DC2

CH751H-40PT_SOD323-2

21

CC

29

1U

_0402_6.3

V6K

CC

29

1U

_0402_6.3

V6K

1

2

QC3B

2N7002KDWH_SOT363-6

VGA@

QC3B

2N7002KDWH_SOT363-6

VGA@

34

5

JPW SP@JPW SP@1 2

RPC1

2.2K_8P4R_5%

RPC1

2.2K_8P4R_5%

1 82 73 64 5

RC125

10K_0402_5%

EDP@

RC125

10K_0402_5%

EDP@

12

CC31

8P_0402_50V8D

CC31

8P_0402_50V8D1 2

RC1122K_0402_5%RC1122K_0402_5%

12

RC126

10K_0402_5%

LVDS@

RC126

10K_0402_5%

LVDS@

12

RC72

100K_0402_5%

@RC72

100K_0402_5%

@

12

RC1132K_0402_5%

@RC1132K_0402_5%

@

12

RC10610K_0402_5%RC10610K_0402_5%

12

CC30 10P_0402_50V8JCC30 10P_0402_50V8J1 2

RC68 33_0402_5%RC68 33_0402_5%1 2

RC121K_0402_5%

@RC121K_0402_5%

@1 2

CC97 180P_0402_50V8J

ESD@

CC97 180P_0402_50V8J

ESD@1 2

RC1112K_0402_5%

@RC1112K_0402_5%

@

12

RC23

10K_0402_5%

RC23

10K_0402_5%

12

CC15 10P_0402_50V8J@EMI@

CC15 10P_0402_50V8J@EMI@

1 2

RC10910K_0402_5%

@RC10910K_0402_5%

@

12

CC28

150P_0402_50V8J

CC28

150P_0402_50V8J

1

2

Page 9: LA-A551PR10 ZEMAE 20130716 - Kythuatphancung

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

1.5V OF APU

1.8VALW & 1.8VS OF APU

0.95VALW & 0.95VS OF APU

3.3VALW & 3.3VS OF APU

RTC OF APU

15A/21A

13A/17A

3A

0.1A

0.5A

0.2A

1A

0.5A

4.5uA

1.5A

0.2A

5A

0.6A

5A

3A

0.5A 1.5A

for VDDIO_33_ALW 0.2A

0.2A

0.6A1A 0.5AVDDIO_AZ_ALW

VDDIO_33_ALW

VDDIO_33

4.7uF 1uF 180pFAMD CKL v1.01

1 3 1

2

2 1

VDD_18

VDD_18_ALW

10uF 1uF 180pF

1 7 1

1 6 1

AMD CKL v1.01 4.7uF

VDDIO_MEM_S

10uF 0.1uF 180pF

2 8 4

AMD CKL v1.01

VDD_095_USB3_DUAL

10uF 1uF 180pF

2 3 1VDD_095VDD_095_ALWVDD_095_GFX

2 5 14

1 1

AMD CKL v1.01

for VDDIO_AZ_ALW 0.1A

Place on TOP

4.5uA

route to 20mil

+APU_CORE_NB

+APU_CORE

+1.8VS

+3VS_APU

+0.95VS_APU

+0.95VS_APU_GFX

+RTC_APU

+0.95VALW_APU

+0.95VALW_APU_USB3

+3VALW_APU

+1.8VALW_APU

+1.5VS

+1.5V

+1.8VALW

+3VS

+1.8VS

+1.5V

+0.95VALW

+0.95VALW

+0.95VS

+RTC_APU_R

+3VL +RTC

+1.8VALW_APU

+3VALW_APU

+3VS_APU

+0.95VS_APU_GFX+0.95VS_APU

+0.95VALW_APU_USB3

+0.95VALW_APU

+RTC_APU

+1.5VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-A551P 1.0

FT3 PWR/GND

9 40Tuesday, July 16, 2013

2013/05/15 2015/09/27 Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-A551P 1.0

FT3 PWR/GND

9 40Tuesday, July 16, 2013

2013/05/15 2015/09/27 Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-A551P 1.0

FT3 PWR/GND

9 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

CC

36

0.1

U_0402_16V

7K

CC

36

0.1

U_0402_16V

7K

1

2

CC

77

10U

_0603_6.3

V6M

CC

77

10U

_0603_6.3

V6M

1

2

CC

98

0.2

2U

_0402_16V

7K

CC

98

0.2

2U

_0402_16V

7K1

2

CC

88

1U

_0402_6.3

V6K

CC

88

1U

_0402_6.3

V6K

1

2

RC123120_0402_5%RC123120_0402_5%

12

CC

43

0.1

U_0402_16V

7K

CC

43

0.1

U_0402_16V

7K

1

2

CC

96

1U

_0402_6.3

V6K

CC

96

1U

_0402_6.3

V6K

1

2

CC

79

1U

_0402_6.3

V6K

CC

79

1U

_0402_6.3

V6K

1

2

CC

39

10U

_0603_6.3

V6M

CC

39

10U

_0603_6.3

V6M

1

2

CC

63

1U

_0402_6.3

V6K

CC

63

1U

_0402_6.3

V6K

1

2

CC

37

0.1

U_0402_16V

7K

CC

37

0.1

U_0402_16V

7K

1

2

CC

80

1U

_0402_6.3

V6K

CC

80

1U

_0402_6.3

V6K

1

2

CC16

22U

_0603_6.3

V6M

@CC16

22U

_0603_6.3

V6M

@1

2

CC

33

0.1

U_0402_16V

7K

CC

33

0.1

U_0402_16V

7K

1

2

PJ2

JUMP_43X79

@

PJ2

JUMP_43X79

@11

22

CC

87

10U

_0603_6.3

V6M

CC

87

10U

_0603_6.3

V6M

1

2

FT3 REV 0.51

GND

UC1G

FT3_BGA769 @

FT3 REV 0.51

GND

UC1G

FT3_BGA769 @

H31 VSS_62

H23 VSS_61

H13 VSS_60

H11 VSS_59

G41 VSS_58

G39 VSS_57

G37 VSS_56

G35 VSS_55

G29 VSS_54

G25 VSS_53

G21 VSS_52

G17 VSS_51

G15 VSS_50

G13 VSS_49

G11 VSS_48

G7 VSS_47

G3 VSS_46

E39 VSS_45

E38 VSS_44

E35 VSS_43

E31 VSS_42

E27 VSS_41

E13 VSS_40

E11 VSS_39

E9 VSS_38

E4 VSS_37

E3 VSS_36

D13 VSS_35

D11 VSS_34

D9 VSS_33

C41 VSS_32

C39 VSS_31

C37 VSS_30

C35 VSS_29

C33 VSS_28

C31 VSS_27

C29 VSS_26

C27 VSS_25

C25 VSS_24

C23 VSS_23

C21 VSS_22

C19 VSS_21

C17 VSS_20

C15 VSS_19

C13 VSS_18

C11 VSS_17

C9 VSS_16

C7 VSS_15

C5 VSS_14

C2 VSS_13

C1 VSS_12

B39 VSS_11

B31 VSS_10

B23 VSS_9

B13 VSS_8

B8 VSS_7

A39 VSS_6

A35 VSS_5

A31 VSS_4

A23 VSS_3

A13 VSS_2

A8 VSS_1

W25VSS_124

W19VSS_123

W15VSS_122

W11VSS_121

W5VSS_120

W3VSS_119

U39VSS_118

U31VSS_117

U29VSS_116

U25VSS_115

U19VSS_114

U15VSS_113

U11VSS_112

U8VSS_111

U7VSS_110

U3VSS_109

U2VSS_108

U1VSS_107

R41VSS_106

R39VSS_105

R29VSS_104

R25VSS_103

R19VSS_102

R15VSS_101

R7VSS_100

R3VSS_99

P2VSS_98

P1VSS_97

N39VSS_96

N31VSS_95

N29VSS_94

N25VSS_93

N19VSS_92

N15VSS_91

N7VSS_90

N3VSS_89

M2VSS_88

M1VSS_87

L41VSS_86

L39VSS_85

L31VSS_84

L19VSS_83

L15VSS_82

L11VSS_81

L10VSS_80

L8VSS_79

L7VSS_78

L3VSS_77

K31VSS_76

K29VSS_75

K27VSS_74

K25VSS_73

K23VSS_72

K21VSS_71

K19VSS_70

K17VSS_69

K13VSS_68

K11VSS_67

J39VSS_66

J8VSS_65

J7VSS_64

J3VSS_63

RC122

10K_0402_5%

RC122

10K_0402_5%1 2

DC5

CH751H-40PT_SOD323-2

DC5

CH751H-40PT_SOD323-2

2 1

CC

53

1U

_0402_6.3

V6K

CC

53

1U

_0402_6.3

V6K

1

2

CC

58

1U

_0402_6.3

V6K

CC

58

1U

_0402_6.3

V6K

1

2

CC

89

1U

_0402_6.3

V6K

CC

89

1U

_0402_6.3

V6K

1

2

RC119 0_0603_5%

Rshort@

RC119 0_0603_5%

Rshort@1 2

CC

52

1U

_0402_6.3

V6K

CC

52

1U

_0402_6.3

V6K

1

2

FT3 REV 0.51

POWER

UC1F

FT3_BGA769 @

FT3 REV 0.51

POWER

UC1F

FT3_BGA769 @

AN4 VDDBT_RTC_G

AJ13 VDD_095_ALW_4

AJ11 VDD_095_ALW_3

AE13 VDD_095_ALW_2

AE11 VDD_095_ALW_1

AW5 VDD_095_USB3_DUAL_4

AV7 VDD_095_USB3_DUAL_3

AU4 VDD_095_USB3_DUAL_2

AR5 VDD_095_USB3_DUAL_1

AM13 VDD_33_ALW_2

AL13 VDD_33_ALW_1

B2 VDD_18_ALW_2

B1 VDD_18_ALW_1

AL11 VDDIO_AZ_ALW_2

AL10 VDDIO_AZ_ALW_1

AR35 VDDIO_MEM_S_23

AL37 VDDIO_MEM_S_22

AL32 VDDIO_MEM_S_21

AJ35 VDDIO_MEM_S_20

AG37 VDDIO_MEM_S_19

AG32 VDDIO_MEM_S_18

AE35 VDDIO_MEM_S_17

AE31 VDDIO_MEM_S_16

AC37 VDDIO_MEM_S_15

AC32 VDDIO_MEM_S_14

AA35 VDDIO_MEM_S_13

AA31 VDDIO_MEM_S_12

W37 VDDIO_MEM_S_11

W32 VDDIO_MEM_S_10

W31 VDDIO_MEM_S_9

U35 VDDIO_MEM_S_8

U32 VDDIO_MEM_S_7

R37 VDDIO_MEM_S_6

R31 VDDIO_MEM_S_5

N35 VDDIO_MEM_S_4

L37 VDDIO_MEM_S_3

L32 VDDIO_MEM_S_2

J35 VDDIO_MEM_S_1

AA10VDD_095_GFX_3

W10VDD_095_GFX_2

U10VDD_095_GFX_1

AM25VDD_095_9

AM23VDD_095_8

AL27VDD_095_7

AL23VDD_095_6

AL21VDD_095_5

AJ27VDD_095_4

AJ21VDD_095_3

AG27VDD_095_2

AG23VDD_095_1

AM17VDD_33_2

AM15VDD_33_1

C3VDD_18_4

B3VDD_18_3

A3VDD_18_2

A2VDD_18_1

AG21VDDCR_NB_21

AG17VDDCR_NB_20

AE19VDDCR_NB_19

AE17VDDCR_NB_18

AE15VDDCR_NB_17

AC17VDDCR_NB_16

AC13VDDCR_NB_15

AA17VDDCR_NB_14

AA13VDDCR_NB_13

W17VDDCR_NB_12

W13VDDCR_NB_11

U17VDDCR_NB_10

U13VDDCR_NB_9

R17VDDCR_NB_8

R13VDDCR_NB_7

R11VDDCR_NB_6

N17VDDCR_NB_5

N13VDDCR_NB_4

N11VDDCR_NB_3

L17VDDCR_NB_2

L13VDDCR_NB_1

AE27VDDCR_CPU_26

AE23VDDCR_CPU_25

AE21VDDCR_CPU_24

AC27VDDCR_CPU_23

AC23VDDCR_CPU_22

AC21VDDCR_CPU_21

AA27VDDCR_CPU_20

AA23VDDCR_CPU_19

AA21VDDCR_CPU_18

W27VDDCR_CPU_17

W23VDDCR_CPU_16

W21VDDCR_CPU_15

U27VDDCR_CPU_14

U23VDDCR_CPU_13

U21VDDCR_CPU_12

R27VDDCR_CPU_11

R23VDDCR_CPU_10

R21VDDCR_CPU_9

N27VDDCR_CPU_8

N23VDDCR_CPU_7

N21VDDCR_CPU_6

L29VDDCR_CPU_5

L27VDDCR_CPU_4

L25VDDCR_CPU_3

L23VDDCR_CPU_2

L21VDDCR_CPU_1

CC

90

1U

_0402_6.3

V6K

CC

90

1U

_0402_6.3

V6K

1

2

CC

59

1U

_0402_6.3

V6K

CC

59

1U

_0402_6.3

V6K

1

2

CC

85

1U

_0402_6.3

V6K

CC

85

1U

_0402_6.3

V6K

1

2

CC

82

1U

_0402_6.3

V6K

CC

82

1U

_0402_6.3

V6K

1

2

FT3 REV 0.51

GND

UC1H

FT3_BGA769 @

FT3 REV 0.51

GND

UC1H

FT3_BGA769 @

AL29 VSS_186

AL25 VSS_185

AL19 VSS_184

AL17 VSS_183

AL15 VSS_182

AL8 VSS_181

AL3 VSS_180

AJ39 VSS_179

AJ32 VSS_178

AJ31 VSS_177

AJ29 VSS_176

AJ25 VSS_175

AJ23 VSS_174

AJ19 VSS_173

AJ17 VSS_172

AJ15 VSS_171

AJ7 VSS_170

AJ3 VSS_169

AH2 VSS_168

AH1 VSS_167

AG41 VSS_166

AG39 VSS_165

AG31 VSS_164

AG29 VSS_163

AG25 VSS_162

AG19 VSS_161

AG15 VSS_160

AG13 VSS_159

AG11 VSS_158

AG10 VSS_157

AG5 VSS_156

AG3 VSS_155

AE39 VSS_154

AE32 VSS_153

AE29 VSS_152

AE25 VSS_151

AE7 VSS_150

AE3 VSS_149

AC41 VSS_148

AC39 VSS_147

AC31 VSS_146

AC29 VSS_145

AC25 VSS_144

AC19 VSS_143

AC15 VSS_142

AC11 VSS_141

AC7 VSS_140

AC3 VSS_139

AA39 VSS_138

AA29 VSS_137

AA25 VSS_136

AA19 VSS_135

AA15 VSS_134

AA11 VSS_133

AA8 VSS_132

AA7 VSS_131

AA3 VSS_130

Y2 VSS_129

Y1 VSS_128

W41 VSS_127

W39 VSS_126

W29 VSS_125

AM29PSEN

AL31VBURN

A15VSSBG_DAC

BA39VSS_242

BA35VSS_241

BA31VSS_240

BA25VSS_239

BA21VSS_238

BA18VSS_237

BA15VSS_236

BA13VSS_235

BA7VSS_234

BA2VSS_233

AY30VSS_232

AY18VSS_231

AY15VSS_230

AY13VSS_229

AW41VSS_228

AW39VSS_227

AW37VSS_226

AW35VSS_225

AW33VSS_224

AW31VSS_223

AW27VSS_222

AW25VSS_221

AW23VSS_220

AW21VSS_219

AW19VSS_218

AW17VSS_217

AW15VSS_216

AW13VSS_215

AW7VSS_214

AW3VSS_213

AV9VSS_212

AU39VSS_211

AU27VSS_210

AU23VSS_209

AU19VSS_208

AU15VSS_207

AU3VSS_206

AU2VSS_205

AU1VSS_204

AR41VSS_203

AR39VSS_202

AR29VSS_201

AR25VSS_200

AR21VSS_199

AR17VSS_198

AR13VSS_197

AR3VSS_196

AP31VSS_195

AN39VSS_194

AN7VSS_193

AN3VSS_192

AM31VSS_191

AM27VSS_190

AM11VSS_189

AL41VSS_188

AL39VSS_187

CC

62

1U

_0402_6.3

V6K

CC

62

1U

_0402_6.3

V6K

1

2

RC120 0_0603_5%

Rshort@

RC120 0_0603_5%

Rshort@1 2

CC

49

4.7

U_0603_6.3

V6K

CC

49

4.7

U_0603_6.3

V6K

1

2

CC

84

1U

_0402_6.3

V6K

CC

84

1U

_0402_6.3

V6K

1

2

RC116 0_0603_5%

Rshort@

RC116 0_0603_5%

Rshort@1 2

CC

66

4.7

U_0603_6.3

V6K

CC

66

4.7

U_0603_6.3

V6K

1

2

CC

83

1U

_0402_6.3

V6K

CC

83

1U

_0402_6.3

V6K

1

2

CC

71

1U

_0402_6.3

V6K

CC

71

1U

_0402_6.3

V6K

1

2

CC

55

1U

_0402_6.3

V6K

CC

55

1U

_0402_6.3

V6K

1

2

CC

64

1U

_0402_6.3

V6K

CC

64

1U

_0402_6.3

V6K

1

2

CC

57

10U

_0603_6.3

V6M

CC

57

10U

_0603_6.3

V6M

1

2

CC

67

1U

_0402_6.3

V6K

CC

67

1U

_0402_6.3

V6K

1

2

CC

50

1U

_0402_6.3

V6K

CC

50

1U

_0402_6.3

V6K

1

2

CC

34

0.1

U_0402_16V

7K

CC

34

0.1

U_0402_16V

7K

1

2

CC14

22U

_0603_6.3

V6M

@CC14

22U

_0603_6.3

V6M

@1

2

CC

72

1U

_0402_6.3

V6K

CC

72

1U

_0402_6.3

V6K

1

2

LC1

FBMA-L11-201209-300LMA30T

LC1

FBMA-L11-201209-300LMA30T1 2

CC

69

1U

_0402_6.3

V6K

CC

69

1U

_0402_6.3

V6K

1

2

RC117 0_0603_5%

Rshort@

RC117 0_0603_5%

Rshort@1 2

CC

41

0.1

U_0402_16V

7K

CC

41

0.1

U_0402_16V

7K

1

2

CC

40

10U

_0603_6.3

V6M

CC

40

10U

_0603_6.3

V6M

1

2

CC

95

10U

_0603_6.3

V6M

CC

95

10U

_0603_6.3

V6M

1

2

CC

74

1U

_0402_6.3

V6K

CC

74

1U

_0402_6.3

V6K

1

2

CC

35

0.1

U_0402_16V

7K

CC

35

0.1

U_0402_16V

7K

1

2

CC

78

1U

_0402_6.3

V6K

CC

78

1U

_0402_6.3

V6K

1

2

CC

51

1U

_0402_6.3

V6K

CC

51

1U

_0402_6.3

V6K

1

2

CC

60

1U

_0402_6.3

V6K

CC

60

1U

_0402_6.3

V6K

1

2

CC

91

1U

_0402_6.3

V6K

CC

91

1U

_0402_6.3

V6K

1

2

CC

70

1U

_0402_6.3

V6K

CC

70

1U

_0402_6.3

V6K

1

2

CC

42

0.1

U_0402_16V

7K

CC

42

0.1

U_0402_16V

7K

1

2

CC

54

1U

_0402_6.3

V6K

CC

54

1U

_0402_6.3

V6K

1

2

CC

61

1U

_0402_6.3

V6K

CC

61

1U

_0402_6.3

V6K

1

2

CC

92

1U

_0402_6.3

V6K

CC

92

1U

_0402_6.3

V6K

1

2

JCMOS

SP@

JCMOS

SP@

12

CC

86

10U

_0603_6.3

V6M

CC

86

10U

_0603_6.3

V6M

1

2

CC

75

1U

_0402_6.3

V6K

CC

75

1U

_0402_6.3

V6K

1

2

Page 10: LA-A551PR10 ZEMAE 20130716 - Kythuatphancung

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Reverse TypeDDR3 SO-DIMM A

Close to JDDR3L.1 Close to JDDR3L.126

Layout Note:

Place near JDDR3L

Layout Note:

Place near JDDR3L.203 and 204

SO-DIMM VREF

Layout Note: Place these 4 Caps near

Command and Control signals of DIMMA

Change CD43 from 47u 0805 to CD43&CD44 22u*2 0603

DDR_AB_D3

DDR_AB_D18

DDR_AB_D27

DDR_A_CLK0#

DDR_AB_D41

DDR_AB_MA7

DDR_AB_RAS#

DDR_AB_D1DDR_AB_D5

DDR_AB_DQS0

DDR_AB_DQS3

DDR_AB_BS2

DDR_AB_D43

DDR_AB_DQS6

DDR_AB_BS0

DDR_AB_D51

DDR_AB_D59

DDR_AB_D37

DDR_AB_D45

DDR_AB_D53

DDR_AB_MA5

DDR_AB_CAS#

DDR_AB_D35

DDR_AB_MA15

DDR_AB_D47

DDR_A_CLK1#

DDR_AB_DM6

DDR_AB_D25

DDR_AB_D49

DDR_AB_D57

DDR_AB_DQS1

DDR_AB_MA4

DDR_A_ODT0

DDR_AB_DQS4

DDR_AB_D29

DDR_AB_MA14

DDR_AB_D61

APU_SDATA0

DDR_AB_D19

DDR_AB_MA10

DDR_AB_D21

DDR_AB_D31

+VREF_DQA

DDR_AB_MA1

DDR_AB_D23

APU_SCLK0

DDR_AB_D13

DDR_AB_D55

DDR_AB_D11

DDR_A_SCS1#

DDR_AB_D17

DDR_AB_DQS2

DDR_AB_D33

DDR_AB_MA0

DDR_AB_D39

DDR_AB_DQS7

DDR_AB_D7

DDR_AB_D15

DDR_AB_DQS#6

DDR_AB_DQS5

DDR_AB_D63

DDR_AB_D9

DDR_A_CKE0

DDR_AB_MA9

DDR_A_CKE1

MEM_MAB_RST#

DDR_AB_D14

DDR_AB_MA11DDR_AB_MA12

DDR_AB_MA8

DDR_AB_D30

DDR_AB_D62

DDR_AB_DQS#0

DDR_AB_DQS#5

DDR_AB_D46

DDR_AB_D28

DDR_AB_D50

DDR_AB_D60

DDR_AB_D40

DDR_AB_D32

DDR_AB_DQS#4

DDR_AB_D34

DDR_AB_DM1

DDR_AB_D8

DDR_AB_MA3

DDR_A_SCS0#

DDR_AB_D22

DDR_AB_D16

DDR_AB_DQS#1

DDR_AB_D10

DDR_AB_D44

DDR_AB_DQS#3

DDR_AB_D12

DDR_AB_D36

DDR_AB_WE#

DDR_AB_MA13

DDR_AB_DM2

DDR_AB_D56

DDR_AB_MA2

DDR_AB_D52

DDR_AB_BS1

DDR_AB_DM7

DDR_A_ODT1

DDR_A_CLK0

DDR_AB_D26

DDR_A_CLK1

DDR_AB_DM4

DDR_AB_D38

DDR_AB_DM3

DDR_AB_D20

DDR_AB_DQS#7

DDR_AB_D4

DDR_AB_D58

DDR_AB_DQS#2

DDR_AB_MA6

DDR_AB_D48

DDR_AB_DM5

DDR_AB_D6

DDR_AB_D42

DDR_AB_D54

DDR_AB_D2

DDR_AB_DM0

DDR_AB_D24

DDR_AB_D0

+VREF_CAA+VREF_DQA

MEM_MAB_EVENT#

+VREF_CAA

DDR_A_CKE1 <5>DDR_A_CKE0<5>

DDR_AB_RAS# <11,5>

DDR_A_ODT1 <5>

DDR_AB_BS0<11,5>

DDR_A_CLK0#<5>

DDR_AB_WE#<11,5>

DDR_AB_BS2<11,5>

APU_SCLK0 <11,23,8>

DDR_A_ODT0 <5>

DDR_AB_BS1 <11,5>

DDR_A_SCS0# <5>DDR_AB_CAS#<11,5>

DDR_A_CLK1 <5>

DDR_A_SCS1#<5>

APU_SDATA0 <11,23,8>

MEM_MAB_RST# <11,5>

DDR_A_CLK1# <5>DDR_A_CLK0<5>

DDR_AB_DQS#[0..7] <11,5>

DDR_AB_DQS[0..7] <11,5>

DDR_AB_D[0..63] <11,5>

DDR_AB_DM[0..7] <11,5>

DDR_AB_MA[0..15] <11,5>

MEM_MAB_EVENT# <11,5>

+1.5V

+3VS

+0.75VS

+1.5V

+0.75VS

+1.5V +1.5V

+1.5V

+0.75VS

+1.5V

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-A551P 1.0

DDRIII-SODIMMA

10 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-A551P 1.0

DDRIII-SODIMMA

10 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-A551P 1.0

DDRIII-SODIMMA

10 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

Compal Electronics, Inc.

CD3

0.1

U_0402_16V

7K

CD3

0.1

U_0402_16V

7K

1

2RD3

1K_0402_1%RD3

1K_0402_1%

12

RD21K_0402_1%

RD21K_0402_1%

12

CD9 1U_0402_6.3V6KCD9 1U_0402_6.3V6K12

RD11K_0402_1%

RD11K_0402_1%

12

CD11 10U_0603_6.3V6MCD11 10U_0603_6.3V6M1 2

CD18 10U_0603_6.3V6MCD18 10U_0603_6.3V6M1 2

CD44 22U_0603_6.3V6MCD44 22U_0603_6.3V6M1 2

CD6 0.1U_0402_16V4ZCD6 0.1U_0402_16V4Z1 2

CD13 10U_0603_6.3V6MCD13 10U_0603_6.3V6M1 2

CD12 1U_0402_6.3V6KCD12 1U_0402_6.3V6K12

CD1

0.1

U_0402_16V

7K

CD1

0.1

U_0402_16V

7K

1

2

CD

20

0.1

U_0402_16V

4Z

CD

20

0.1

U_0402_16V

4Z

1

2

CD10 10U_0603_6.3V6MCD10 10U_0603_6.3V6M1 2

CD22.2

U_0402_6.3

V6M

@

CD22.2

U_0402_6.3

V6M

@1

2

CD5 0.1U_0402_16V4ZCD5 0.1U_0402_16V4Z1 2

CD42.2

U_0402_6.3

V6M

@

CD42.2

U_0402_6.3

V6M

@1

2

CD16 10U_0603_6.3V6MCD16 10U_0603_6.3V6M1 2

CD14 10U_0603_6.3V6MCD14 10U_0603_6.3V6M1 2

CD8 0.1U_0402_16V4ZCD8 0.1U_0402_16V4Z1 2

CD43 22U_0603_6.3V6MCD43 22U_0603_6.3V6M1 2

CD7 0.1U_0402_16V4ZCD7 0.1U_0402_16V4Z1 2

JDDR3L

LCN_DAN06-K4406-0103Conn@

JDDR3L

LCN_DAN06-K4406-0103Conn@

VREF_DQ1

VSS3

DQ05

DQ17

VSS9

DM011

VSS13

DQ215

DQ317

VSS19

DQ821

DQ923

VSS25

DQS1#27

DQS129

VSS31

DQ1033

DQ1135

VSS37

DQ1639

VSS2

DQ44

DQ56

VSS8

DQS0#10

DQS012

VSS14

DQ616

DQ718

VSS20

DQ1222

DQ1324

VSS26

DM128

RESET#30

VSS32

DQ1434

DQ1536

VSS38

DQ2040

DQ1741

VSS43

DQS2#45

DQS247

VSS49

DQ1851

DQ1953

VSS55

DQ2457

DQ2559

VSS61

DM363

VSS65

DQ2667

DQ2769

VSS71

CKE073

VDD75

NC77

BA279

VDD81

A12/BC#83

A985

VDD87

A889

A591

VDD93

A395

A197

VDD99

CK0101

CK0#103

VDD105

A10/AP107

BA0109

VDD111

WE#113

CAS#115

VDD117

A13119

S1#121

VDD123

TEST125

VSS127

DQ32129

DQ33131

VSS133

DQS4#135

DQS4137

VSS139

DQ34141

DQ35143

VSS145

DQ40147

DQ41149

VSS151

DM5153

VSS155

DQ42157

DQ43159

VSS161

DQ48163

DQ49165

VSS167

DQS6#169

DQS6171

VSS173

DQ50175

DQ51177

VSS179

DQ56181

DQ57183

VSS185

DM7187

VSS189

DQ58191

DQ59193

VSS195

SA0197

VDDSPD199

DQ2142

VSS44

DM246

VSS48

DQ2250

DQ2352

VSS54

DQ2856

DQ2958

VSS60

DQS3#62

DQS364

VSS66

DQ3068

DQ3170

VSS72

CKE174

VDD76

A1578

A1480

VDD82

A1184

A786

VDD88

A690

A492

VDD94

A296

A098

VDD100

CK1102

CK1#104

VDD106

BA1108

RAS#110

VDD112

S0#114

ODT0116

VDD118

ODT1120

NC122

VDD124

VREF_CA126

VSS128

DQ36130

DQ37132

VSS134

DM4136

VSS138

DQ38140

DQ39142

VSS144

DQ44146

DQ45148

VSS150

DQS5#152

DQS5154

VSS156

DQ46158

DQ47160

VSS162

DQ52164

DQ53166

VSS168

DM6170

VSS172

DQ54174

DQ55176

VSS178

DQ60180

DQ61182

VSS184

DQS7#186

DQS7188

VSS190

DQ62192

DQ63194

VSS196

EVENT#198

SDA200

SA1201

VTT203

GND1205

SCL202

VTT204

GND2206

BOSS1207

BOSS2208

RD41K_0402_1%

RD41K_0402_1%

12

Page 11: LA-A551PR10 ZEMAE 20130716 - Kythuatphancung

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Standard TypeDDR3 SO-DIMM B

Layout Note:

Place near JDDR3H

Layout Note:

Place near JDDRH.203 and 204

Close to JDDR3H.1

SO-DIMM VREF

Close to JDDR3H.126

Layout Note: Place these 4 Caps near

Command and Control signals of DIMMB

DDR_AB_D3

DDR_AB_D18

DDR_AB_D27

DDR_B_CLK0#

DDR_AB_D41

DDR_AB_MA7

DDR_AB_RAS#

DDR_AB_D1DDR_AB_D5

DDR_AB_DQS0

DDR_AB_DQS3

DDR_AB_BS2

DDR_AB_D43

DDR_AB_DQS6

DDR_AB_BS0

DDR_AB_D51

DDR_AB_D59

DDR_AB_D37

DDR_AB_D45

DDR_AB_D53

DDR_AB_MA5

DDR_AB_CAS#

DDR_AB_D35

DDR_AB_MA15

DDR_AB_D47

DDR_B_CLK1#

DDR_AB_DM6

DDR_AB_D25

DDR_AB_D49

DDR_AB_D57

DDR_AB_DQS1

DDR_AB_MA4

DDR_B_ODT0

DDR_AB_DQS4

DDR_AB_D29

DDR_AB_MA14

DDR_AB_D61

APU_SDATA0

DDR_AB_D19

DDR_AB_MA10

DDR_AB_D21

DDR_AB_D31

+VREF_DQB

DDR_AB_MA1

DDR_AB_D23

APU_SCLK0

DDR_AB_D13

DDR_AB_D55

DDR_AB_D11

DDR_B_SCS1#

DDR_AB_D17

DDR_AB_DQS2

DDR_AB_D33

DDR_AB_MA0

DDR_AB_D39

DDR_AB_DQS7

DDR_AB_D7

DDR_AB_D15

DDR_AB_DQS#6

DDR_AB_DQS5

DDR_AB_D63

DDR_AB_D9

DDR_B_CKE0

DDR_AB_MA9

DDR_B_CKE1

MEM_MAB_RST#

DDR_AB_D14

DDR_AB_MA11DDR_AB_MA12

DDR_AB_MA8

DDR_AB_D30

DDR_AB_D62

DDR_AB_DQS#0

DDR_AB_DQS#5

DDR_AB_D46

DDR_AB_D28

DDR_AB_D50

DDR_AB_D60

DDR_AB_D40

DDR_AB_D32

DDR_AB_DQS#4

DDR_AB_D34

DDR_AB_DM1

DDR_AB_D8

DDR_AB_MA3

DDR_B_SCS0#

DDR_AB_D22

DDR_AB_D16

DDR_AB_DQS#1

DDR_AB_D10

DDR_AB_D44

DDR_AB_DQS#3

DDR_AB_D12

DDR_AB_D36

DDR_AB_WE#

DDR_AB_MA13

DDR_AB_DM2

DDR_AB_D56

DDR_AB_MA2

DDR_AB_D52

DDR_AB_BS1

DDR_AB_DM7

DDR_B_ODT1

DDR_B_CLK0

DDR_AB_D26

DDR_B_CLK1

DDR_AB_DM4

DDR_AB_D38

DDR_AB_DM3

DDR_AB_D20

DDR_AB_DQS#7

DDR_AB_D4

DDR_AB_D58

DDR_AB_DQS#2

DDR_AB_MA6

DDR_AB_D48

DDR_AB_DM5

DDR_AB_D6

DDR_AB_D42

DDR_AB_D54

DDR_AB_D2

DDR_AB_DM0

DDR_AB_D24

DDR_AB_D0

MEM_MAB_EVENT#

+VREF_CAB+VREF_DQB

+VREF_CAB

DDR_B_CKE1 <5>DDR_B_CKE0<5>

DDR_AB_RAS# <10,5>

DDR_B_ODT1 <5>

DDR_AB_BS0<10,5>

DDR_B_CLK0#<5>

DDR_AB_WE#<10,5>

DDR_AB_BS2<10,5>

APU_SCLK0 <10,23,8>

DDR_B_ODT0 <5>

DDR_AB_BS1 <10,5>

DDR_B_SCS0# <5>DDR_AB_CAS#<10,5>

DDR_B_CLK1 <5>

DDR_B_SCS1#<5>

APU_SDATA0 <10,23,8>

MEM_MAB_RST# <10,5>

DDR_B_CLK1# <5>DDR_B_CLK0<5>

DDR_AB_DQS#[0..7] <10,5>

DDR_AB_DQS[0..7] <10,5>

DDR_AB_D[0..63] <10,5>

DDR_AB_DM[0..7] <10,5>

MEM_MAB_EVENT# <10,5>

DDR_AB_MA[0..15] <10,5>

+1.5V

+3VS

+0.75VS

+1.5V

+0.75VS

+1.5V+0.75VS

+1.5V

+1.5V+1.5V

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-A551P 1.0

DDRIII-SODIMMB

11 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-A551P 1.0

DDRIII-SODIMMB

11 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-A551P 1.0

DDRIII-SODIMMB

11 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

Compal Electronics, Inc.

CD21

0.1

U_0402_16V

7K

CD21

0.1

U_0402_16V

7K

1

2

CD33 10U_0603_6.3V6MCD33 10U_0603_6.3V6M1 2 CD32 1U_0402_6.3V6KCD32 1U_0402_6.3V6K12

CD27 0.1U_0402_16V4ZCD27 0.1U_0402_16V4Z12

RD71K_0402_1%

RD71K_0402_1%

12

CD

40

0.1

U_0402_16V

4Z

CD

40

0.1

U_0402_16V

4Z

1

2

CD222.2

U_0402_6.3

V6M

@

CD222.2

U_0402_6.3

V6M

@1

2

CD38 10U_0603_6.3V6MCD38 10U_0603_6.3V6M1 2

CD28 0.1U_0402_16V4ZCD28 0.1U_0402_16V4Z12

RD51K_0402_1%

RD51K_0402_1%

12

CD31 10U_0603_6.3V6MCD31 10U_0603_6.3V6M1 2

CD23

0.1

U_0402_16V

7K

CD23

0.1

U_0402_16V

7K

1

2

RD81K_0402_1%

RD81K_0402_1%

12

CD25 0.1U_0402_16V4ZCD25 0.1U_0402_16V4Z12

RD61K_0402_1%

RD61K_0402_1%

12

CD242.2

U_0402_6.3

V6M

@

CD242.2

U_0402_6.3

V6M

@1

2

CD30 10U_0603_6.3V6MCD30 10U_0603_6.3V6M1 2

CD36 10U_0603_6.3V6MCD36 10U_0603_6.3V6M1 2

JDDR3H

LCN_DAN06-K4806-0103Conn@

JDDR3H

LCN_DAN06-K4806-0103Conn@

VREF_DQ1

VSS3

DQ05

DQ17

VSS9

DM011

VSS13

DQ215

DQ317

VSS19

DQ821

DQ923

VSS25

DQS1#27

DQS129

VSS31

DQ1033

DQ1135

VSS37

DQ1639

VSS2

DQ44

DQ56

VSS8

DQS0#10

DQS012

VSS14

DQ616

DQ718

VSS20

DQ1222

DQ1324

VSS26

DM128

RESET#30

VSS32

DQ1434

DQ1536

VSS38

DQ2040

DQ1741

VSS43

DQS2#45

DQS247

VSS49

DQ1851

DQ1953

VSS55

DQ2457

DQ2559

VSS61

DM363

VSS65

DQ2667

DQ2769

VSS71

CKE073

VDD75

NC77

BA279

VDD81

A12/BC#83

A985

VDD87

A889

A591

VDD93

A395

A197

VDD99

CK0101

CK0#103

VDD105

A10/AP107

BA0109

VDD111

WE#113

CAS#115

VDD117

A13119

S1#121

VDD123

TEST125

VSS127

DQ32129

DQ33131

VSS133

DQS4#135

DQS4137

VSS139

DQ34141

DQ35143

VSS145

DQ40147

DQ41149

VSS151

DM5153

VSS155

DQ42157

DQ43159

VSS161

DQ48163

DQ49165

VSS167

DQS6#169

DQS6171

VSS173

DQ50175

DQ51177

VSS179

DQ56181

DQ57183

VSS185

DM7187

VSS189

DQ58191

DQ59193

VSS195

SA0197

VDDSPD199

DQ2142

VSS44

DM246

VSS48

DQ2250

DQ2352

VSS54

DQ2856

DQ2958

VSS60

DQS3#62

DQS364

VSS66

DQ3068

DQ3170

VSS72

CKE174

VDD76

A1578

A1480

VDD82

A1184

A786

VDD88

A690

A492

VDD94

A296

A098

VDD100

CK1102

CK1#104

VDD106

BA1108

RAS#110

VDD112

S0#114

ODT0116

VDD118

ODT1120

NC122

VDD124

VREF_CA126

VSS128

DQ36130

DQ37132

VSS134

DM4136

VSS138

DQ38140

DQ39142

VSS144

DQ44146

DQ45148

VSS150

DQS5#152

DQS5154

VSS156

DQ46158

DQ47160

VSS162

DQ52164

DQ53166

VSS168

DM6170

VSS172

DQ54174

DQ55176

VSS178

DQ60180

DQ61182

VSS184

DQS7#186

DQS7188

VSS190

DQ62192

DQ63194

VSS196

EVENT#198

SDA200

SA1201

VTT203

GND1205

SCL202

VTT204

GND2206

BOSS1207

BOSS2208

RD9 10K_0402_5%RD9 10K_0402_5%1 2

CD26 0.1U_0402_16V4ZCD26 0.1U_0402_16V4Z12

CD34 10U_0603_6.3V6MCD34 10U_0603_6.3V6M1 2

CD29 1U_0402_6.3V6KCD29 1U_0402_6.3V6K12

Page 12: LA-A551PR10 ZEMAE 20130716 - Kythuatphancung

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

LVDS Interface

AC Coupling Capacitor

PCIeR Gen1 and Gen2 only: Recommended value is 100 nF 10%.

PCIeR Gen3: Recommended value is 220 nF 10%.

3.3-V tolerant

For MEMCLK 1GHz Brand

skHynix

Samsung

gDDR3-2Gbit

Description

H5TQ2G63DFR-N0C

K4W2G1646E-BC1A

Comment PS_3[3:1] R_pu(ohm) R_pd(ohm)

1.5V/1GHz

1.5V/1GHz

000

111

NC

4750

4750

NC

For MEMCLK 900MHz Brand

skHynix

MicrongDDR3-2Gbit

Description

H5TQ2G63DFR-11C

MT41K128M16JT-107G:K

Comment PS_3[3:1]R_pu(ohm) R_pd(ohm)

1.5V/900MHz

1.35V/900MHz

1.5V/900MHz

000

001

NC

4750

4750

NCSamsung K4W2G1646E-BC11 1.5V/900MHz 111

8450 2000

CLK_PCIE_VGACLK_PCIE_VGA#

PCIE_ATX_C_GRX_P3PCIE_ATX_C_GRX_N3

PCIE_ATX_C_GRX_P2PCIE_ATX_C_GRX_N2

PCIE_ATX_C_GRX_P1PCIE_ATX_C_GRX_N1

PCIE_ATX_C_GRX_P0PCIE_ATX_C_GRX_N0

PCIE_ATX_C_GRX_P[3..0]

PCIE_ATX_C_GRX_N[3..0]

PCIE_GTX_C_ARX_P[3..0]

PCIE_GTX_C_ARX_N[3..0]

VGA_PCIE_CALRN

VGA_PCIE_CALRP

PCIE_GTX_ARX_P0 PCIE_GTX_C_ARX_P0

PCIE_GTX_C_ARX_P1PCIE_GTX_C_ARX_N1

PCIE_GTX_ARX_P2PCIE_GTX_ARX_N2 PCIE_GTX_C_ARX_N2

PCIE_GTX_C_ARX_N0PCIE_GTX_ARX_N0

PCIE_GTX_ARX_P3PCIE_GTX_ARX_N3 PCIE_GTX_C_ARX_N3

GPU_RST#

PCIE_GTX_C_ARX_P3

PCIE_GTX_ARX_N1

PCIE_GTX_C_ARX_P2

GPU_RST#

PCIE_GTX_ARX_P1

CLK_PCIE_VGA<7>CLK_PCIE_VGA#<7>

PCIE_ATX_C_GRX_P[3..0]<5>

PCIE_ATX_C_GRX_N[3..0]<5>

PCIE_GTX_C_ARX_P[3..0] <5>

PCIE_GTX_C_ARX_N[3..0] <5>

PXS_RST#<8>

APU_PCIE_RST#<22,23,8>

+0.95VGS

+0.95VGS

+3VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

1.0

PCIE/LVDS

Custom

12 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

Compal Electronics, Inc.

LA-A551P

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

1.0

PCIE/LVDS

Custom

12 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

Compal Electronics, Inc.

LA-A551P

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

1.0

PCIE/LVDS

Custom

12 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

Compal Electronics, Inc.

LA-A551P

CV4.1U_0402_16V7K

[email protected]_0402_16V7K

VGA@1 2

CV6

.1U_0402_16V7K

VGA@CV6

.1U_0402_16V7K

VGA@1 2

RV2 1K_0402_5%VGA@

RV2 1K_0402_5%VGA@ 12

CV2

.1U_0402_16V7K

VGA@CV2

.1U_0402_16V7K

VGA@1 2

RV3 1K_0402_1%VGA@RV3 1K_0402_1%VGA@1 2

RV212100K_0402_5%

VGA@RV212100K_0402_5%

VGA@

12

CV3.1U_0402_16V7K [email protected]_0402_16V7K VGA@1 2

CV7.1U_0402_16V7K

[email protected]_0402_16V7K

VGA@1 2

CV1.1U_0402_16V7K

[email protected]_0402_16V7K

VGA@1 2

PART 1 0F 9

CALIBRATION

CLOCK

PCI EXPRESS INTERFACE

UV1A

SUN-PRO M2_FCBGA962VGA@

PART 1 0F 9

CALIBRATION

CLOCK

PCI EXPRESS INTERFACE

UV1A

SUN-PRO M2_FCBGA962VGA@

AA30PERSTB

AH16TEST_PG

AA36PCIE_REFCLKN

AB35PCIE_REFCLKP

E37NC

F35NC

F37NC

G38NC

G36NC

H35NC

H37NC

J38NC

J36NC

K35NC

K37NC

L38NC

L36NC

M35NC

M37NC

N38NC

N36PCIE_RX7N

P35PCIE_RX7P

P37PCIE_RX6N

R38PCIE_RX6P

R36PCIE_RX5N

T35PCIE_RX5P

T37PCIE_RX4N

U38PCIE_RX4P

U36PCIE_RX3N

V35PCIE_RX3P

V37PCIE_RX2N

W38PCIE_RX2P

W36PCIE_RX1N

Y35PCIE_RX1P

Y37PCIE_RX0N

AA38PCIE_RX0P

Y29PCIE_CALR_RX

Y30PCIE_CALR_TX

H32NC

H33NC

K29NC

K30NC

J32NC

J33NC

K32NC

K33NC

L29NC

L30NC

L32NC

L33NC

N29NC

N30NC

N32NC

N33NC

P29PCIE_TX7N

P30PCIE_TX7P

P32PCIE_TX6N

P33PCIE_TX6P

T29PCIE_TX5N

T30PCIE_TX5P

T32PCIE_TX4N

T33PCIE_TX4P

U29PCIE_TX3N

U30PCIE_TX3P

U32PCIE_TX2N

U33PCIE_TX2P

W32PCIE_TX1N

W33PCIE_TX1P

Y32PCIE_TX0N

Y33PCIE_TX0P

RV1 1.69K_0402_1%VGA@RV1 1.69K_0402_1%VGA@1 2

CV5.1U_0402_16V7K

[email protected]_0402_16V7K

VGA@1 2

UV13

MC74VHC1G08DFT2G SC70 5P

VGA@

UV13

MC74VHC1G08DFT2G SC70 5P

VGA@

B2

A1 Y

4

P5

G3

PART 7 0F 9

LVDS CONTROL

LVTMDP

UV1D

SUN-PRO M2_FCBGA962VGA@

PART 7 0F 9

LVDS CONTROL

LVTMDP

UV1D

SUN-PRO M2_FCBGA962VGA@

AP37NC

AN36NC

AR35TX2M_DPA0N

AP35TX2P_DPA0P

AU39TX1M_DPA1N

AR37TX1P_DPA1P

AU35TX0M_DPA2N

AW37TX0P_DPA2P

AR34TXCAM_DPA3N

AP34TXCAP_DPA3P

AG36NC#AG36

AF35NC#AF35

AH37TX5M_DPB0N

AG38TX5P_DPB0P

AJ36TX4M_DPB1N

AH35TX4P_DPB1P

AK37TX3M_DPB2N

AJ38TX3P_DPB2P

AL36TXCBM_DPB3N

AK35TXCBP_DPB3P

AJ27RSVD/DIGON

AK27RSVD/VARY_BL

CV8

.1U_0402_16V7K

VGA@CV8

.1U_0402_16V7K

VGA@1 2

Page 13: LA-A551PR10 ZEMAE 20130716 - Kythuatphancung

A

A

B

B

C D

D

E

E

1 1

2 2

3 3

4 4

(1.8V@13mA TSVDD)

0 0 1

0 0 0

CapacitorBits[5:4]

PS_0[5:1] 0 0 1

Bits[3:1]

1 1

1 1

0 0

1 1

PS_1[5:1]

PS_2[5:1]

PS_3[5:1] X X X

NC

NC

NC

680 nF

R_pu R_pd

8.45K

NC

X

8.45K 2K

2K

4.75K

X

MLPS Strap

TSVDD MarsCRB Design

120ohm 1 1

0.1u 1 1

1u 1 1

10u 1 1

MLPS

H

EnableL

GPIO_28_FDO

Disable

PS_3[1]

PS_3[2]

PS_3[3]

BOARD_CONFIG[0]

BOARD_CONFIG[1]

BOARD_CONFIG[2]

Board configuration related strapping (such as memory ID).

PS_0[5]

PS_3[4]

PS_3[5]

AUD_PORT_CONN_

PINSTRAP[0]

AUD_PORT_CONN_

PINSTRAP[1]

AUD_PORT_CONN_

PINSTRAP[2]

Together with PS_0[5] form the three-bit strap option to indicate the number of

audio-capable display outputs. In a given ASIC there are as many endpoints as

there are digital display outputs, though not all outputs are audio capable.

111 = No usable endpoints.

110 = One usable endpoint.

101 = Two usable endpoints.

100 = Three usable endpoints.

011 = Four usable endpoints.

010 = Five usable endpoints.

001 = Six usable endpoints.

000 = All endpoints are usable.

001

1

0

0

1

1

0

0

0

0

0

Base on

VRAM ID

111

Legacy

GPIO[13:11]

GENLK_VSYNC

GPIO_2

GPIO_8

GENLK_CLK

GPIO_0

GPIO_1

N/A

N/A

GPIO_22

GPIO_9

N/A

N/A

N/A

0

ROM_CONFIG[0]

ROM_CONFIG[1]

ROM_CONFIG[2]

If BIOS_ROM_EN = 1, ROM_CONFIG[2:0] define the ROM type. If BIOS_ROM_EN = 0,

ROM_CONFIG[2:0] define the primary memory-aperture size. Refer to current

databooks for details.

MLPS

PS_0[1]

PS_0[2]

PS_0[3]

PS_0[4] N/A

MLPS Bit Strap Name Description Settings

Reserved for internal use only. Must be 1 at reset.

PS_1[1]STRAP_BIF_

GEN3_EN_A

Re-defined strap to indicate PCIe GEN3 capability.

1 = PCIe GEN3 supported.

0 = PCIe GEN3 not supported.

PS_1[2] STRAP_BIF_

CLK_PM_EN

Determines whether or not the PCIe reference clock power

management capability is reported in the PCI configuration space

(otherwise known as CLKREQB).

0 = The CLKREQB power management capability is disabled

1 = The CLKREQB power management capability is enabled

PS_1[3] N/A Reserved for internal use only. Must be 0 at reset.

PS_1[4] TX_PWRS_ENBTransmitter (Tx) power savings enable.

0 = 50% Tx output swing.

1 = Full Tx output swing.

PS_1[5] TX_DEEMPH_ENPCI EXPRESS transmitter, deemphasis enable.

0 = Tx deemphasis disabled.

1 = Tx deemphasis enabled.

PS_2[1]

PS_2[2]

N/A

N/A

Reserved.

Reserved.

PS_2[3] BIOS_ROM_ENTo enable the external BIOS ROM device.

0 = Disable the external BIOS ROM device.

1 = Enable the external BIOS ROM device.

PS_2[4] BIF_VGA_DIS

VGA disable determines whether or not the card will be recognized as the

system's VGA controller.

0 = VGA controller capacity enabled.

1 = The device will not be recognized as the system’s VGA controller.

PS_2[5] N/A Reserved.

Bits[5:1]

xx000

xx001

xx010

xx011

xx100

xx101

xx110

xx111

00xxx

01xxx

10xxx

11xxx

PD(1%) CapPU(1%)

680nF

82nF

10nF

NC

NC 4.75k

8.45k 2.00k

4.53k 2.00k

6.98k 4.99k

4.53k 4.99k

3.24k 5.62k

3.40k 10.0k

4.75k NC

Mars MLPS configuration Size of the Primary

Memory Apertures

ROM_CONFIG [2:0]

000

Primary Memory Aperture Size

Requested at PCI Configuration

128 MB

256 MB

64 MB

Reserved

512 MB

1 GB

2 GB

4 GB Not supported

Not supported

Not supported

Not supported

001

010

011

PX_EN :

High (3.3 V) switches the regulators

off (enter BACO mode).

Low (0 V) switches the regulators

on. (Default)

CHECK VR

IF VR Suport PSI# and DPRSLPVR PU 10K

to +3VGS:

PSI# :Low load current flag

DPRSLPVR : Deeper sleep enable flag

Enable JTAG access

Reserved signal, for normal ASIC operation.

GENERIC_X

Stereo-sync signal.

Indicates left/right frame, or top/bottom field.

Can be left unconnected if not used.

Mapping to VRAM type please refer to page 6

Pin Name

GPIO_0

Type PD/PU Description

GPIO_5_AC_BATT

GPIO_6

GPIO_8_ROMSO

GPIO_9_ROMSI

GPIO_10_ROMSCK

GPIO_15_PWRCNTL_0

GPIO_17_THERMAL_INT

GPIO_19_CTF

GPIO_20_PWRCNTL_1

GPIO_22_ROMCSB

GPIO_21

GPIO_28_FDO

GPIO_30

GPIO_29

PX_EN

CLKREQB

I/O

3.3 V

(VDDR3)

PD-reset

Power-state indicator.

Permits the voltage regulator to activate power-saving

features.

IF VR Suport PSI# and DPRSLPVR PU 10K to +3VGS.

PSI# :Low load current flag

DPRSLPVR : Deeper sleep enable flag

I/O

3.3 V

(VDDR3)

PD-reset

(Optional) An input which allows the system to

request a fastpower reduction by setting

GPIO_5_AC_BATT to low (0 V). The resulting state

transition may disturb the display momentarily.

Power reductions that are less time critical

should use the standard software methods in order

to prevent display disturbances.

I/O

3.3 V

(VDDR3)

PD-reset

Voltage control signals for the core (VDDC and VDDCI).

At reset, these signals will be inputs with weak

internal pulldown resistors.

The VBIOS can define all voltage-control signals to be

either 3.3-V or open-drain outputs (all signals must

be the same type).

The output states (high/low) of these pins are

programmable for each AMD PowerPlay state when they

are used as voltage control signals.

Note: GPIO_29 and GPIO_30 are only available on 28-nm

ASICs, and are NC on earlier generation ASICs.

I

3.3 V

(VDDR3) PD-reset

O

3.3 V

(VDDR3) PD-reset

Serial-ROM output from ROM.

General purpose I/O or open-drain output.

Serial-ROM input to ROM.

General purpose I/O or open-drain output.

Serial-ROM clock to ROM.

General purpose I/O or open-drain output.

BIOS-ROM chip select.

Used to enable the ROM for ROM read and program

operations.

Design: No use external VGA ROM, so use the test

points.

Design: No use external VGA ROM, so use the test point.

Thermal monitor interrupt.

An input from an external temperature sensor (ALERTb).

I/O

3.3 V

(VDDR3)

PD-reset

O

3.3 V

(VDDR3)

PD-reset

Critical temperature fault (CTF) (active high) will

output 3.3 V if the on-die temperature sensor exceeds

a critical temperature so that the motherboard can

protect the ASIC from damage by removing power.

The CTF setpoint is 109 by default, and isprogrammed during ASIC initialization. See the

advisory for AMD PowerPlay states for more details.

(Optional) Voltage control signal for the

memory-voltage regulator.

Note: This signal must be low (0 V) at reset

(failure to do so will prevent booting).

I/O

3.3 V

(VDDR3)

PD-reset

I/O

3.3 V

(VDDR3)

PD-reset

Disable MLPS: PU 10K ohm to 3.3V.

(Do not install for Mars)

Enable MLPS: PD 10K ohm to GND.

(Install for Mars)

OSupports the CLKREQB feature for saving power to turn

on/off the REFCLK clock on the ASIC.

O PD

On/off regulator switch in AMD PowerXpress? (switchable

graphics) BACO mode.

High (3.3 V) switches the regulators off (enter BACO

mode).

Low (0 V) switches the regulators on. (Default)

PX_EN is tri-state before internal TEST_PG is asserted

and PERSTb is deasserted.

+TSVDD

GPU_VID5

PS_0

PS_1

PS_2

PS_3

GPU_GPIO21

JTAG_TDIJTAG_TRSTB

JTAG_TCKJTAG_TMSJTAG_TDO

GPU_GPIO10

GPU_GPIO8GPU_GPIO9

GPU_GPIO22

GPU_VID3

GPU_VID1

GPU_VID2

GPU_VID4

GPIO_28_FDO

TESTEN

PX_EN

JTAG_TRSTBJTAG_TDI

JTAG_TCKJTAG_TMS

PS_2

PS_0PS_1

PS_3

VGA_SMB_DA2

VGA_SMB_CK2

VGA_SMB_CK2VGA_SMB_DA2

GPIO_16

GPU_DPRSLPVR

GPIO_16GPIO_28_FDOVGA_SMB_CK2VGA_SMB_DA2

CLKREQ_PEG#CLKREQ_PEG#<8>

GPU_VID3<37>

GPU_VID1<37>

GPU_VID2<37>

GPU_VID4<37>

GPU_VID5<37>

EC_SMB_DA2 <27,6>

EC_SMB_CK2 <27,6>

GPU_DPRSLPVR<37>

GPU_DOWN#<27>

+1.8VGS

+TSVDD+1.8VGS

+3VGS

+3VGS

+3VGS

+3VGS

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

1.0

Main_MSIC

Custom

13 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

Compal Electronics, Inc.

LA-A551P

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

1.0

Main_MSIC

Custom

13 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

Compal Electronics, Inc.

LA-A551P

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

1.0

Main_MSIC

Custom

13 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

Compal Electronics, Inc.

LA-A551P

CV22

0.0

1U

_0

40

2_

16

V7

K

@CV22

0.0

1U

_0

40

2_

16

V7

K

@ 1

2

RV7

5.11K_0402_5%

@

RV7

5.11K_0402_5%

@

12

TV5TP@TV5TP@

RV12

10K_8P4R_5%@

RV12

10K_8P4R_5%@

1 82 73 64 5

RV684.75K_0402_1%

VGA@RV68

4.75K_0402_1%

VGA@

12

TV3TP@TV3TP@

CV

18

1U

_0

40

2_

6.3

V6

K

VG

A@

CV

18

1U

_0

40

2_

6.3

V6

K

VG

A@

1

2

RV284.75K_0402_1%

VGA@RV28

4.75K_0402_1%

VGA@

12

RV238.45K_0402_1%

VGA@RV23

8.45K_0402_1%

VGA@

12

CV

19

0.1

U_

04

02

_1

6V

4Z

VG

A@

CV

19

0.1

U_

04

02

_1

6V

4Z

VG

A@

1

2

RV228.45K_0402_1%

@RV22

8.45K_0402_1%

@

12

CV200

.01

U_

04

02

_1

6V

7K

@CV20

0.0

1U

_0

40

2_

16

V7

K@ 1

2

QV1BDMN66D0LDW-7 2N_SOT363-6

VGA@QV1BDMN66D0LDW-7 2N_SOT363-6

VGA@

3

5

4

SMBus

PART 2 0F 9

MLPS

BACO

DEBUG

THERMAL

DDC/AUX

DAC1

GENERAL PURPOSE I/O

I2C

MUTI GFX

DPD

DPC

DPB

DPA

UV1B

SUN-PRO M2_FCBGA962VGA@

SMBus

PART 2 0F 9

MLPS

BACO

DEBUG

THERMAL

DDC/AUX

DAC1

GENERAL PURPOSE I/O

I2C

MUTI GFX

DPD

DPC

DPB

DPA

UV1B

SUN-PRO M2_FCBGA962VGA@

AJ33 TSVSS

AJ32 TSVDD

AL31 TS_A

AK32 GPIO_28_FDO

AG29 DMINUS

AF29 DPLUS

AM24 JTAG_TDO

AL24 JTAG_TMS

AK23 JTAG_TCK

AN23 JTAG_TDI

AM23 JTAG_TRSTB

AD28 TESTEN

AL21 PX_EN

AH13 DBG_VREFG

AK24 HPD1

AC30 CEC_1

AH24 GENERICG_HPD6

AH26 GENERICF_HPD5

AJ24 GENERICE_HPD4

AK20 GENERICD

AJ20 GENERICC

AK19 GENERICB

AJ19 GENERICA

AG33 GPIO_30

AG32 GPIO_29

AN13 CLKREQB

AK13 GPIO_22_ROMCSB

AJ14 GPIO_21

AL13 GPIO_20_PWRCNTL_1

AM17 GPIO_19_CTF

AN14 GPIO_18_HPD3

AG30 GPIO_17_THERMAL_INT

AK14 GPIO_16

AM13 GPIO_15_PWRCNTL_0

AM14 GPIO_14_HPD2

AM16 GPIO_13

AL16 GPIO_12

AK16 GPIO_11

AJ16 GPIO_10_ROMSCK

AH15 GPIO_9_ROMSI

AJ13 GPIO_8_ROMSO

AK17 GPIO_7_BLON

AJ17 GPIO_6_TACH

AH17 GPIO_5_AC_BATT

AN16 GPIO_2

AH18 GPIO_1

AH20 GPIO_0

AJ26 SDA

AK26 SCL

AH23 SMBDATA

AJ23 SMBCLK

AP12 DBG_DATA23

AU12 DBG_DATA22

AW12 DBG_DATA21

AR12 DBG_DATA20

AT11 DBG_DATA19

AV11 DBG_DATA18

AP10 DBG_DATA17

AU10 DBG_DATA16

AW10 DBG_DATA15

AR10 DBG_DATA14

AT9 DBG_DATA13

AV9 DBG_DATA12

AN7 DBG_DATA11

AV7 DBG_DATA10

AT7 DBG_DATA9

AU6 DBG_DATA8

AW6 DBG_DATA7

AR6 DBG_DATA6

AU5 DBG_DATA5

AW5 DBG_DATA4

AP6 DBG_DATA3

AW3 DBG_DATA2

AU3 DBG_DATA1

AU1 DBG_DATA0

AR1 NC

AR3 NC

AW8 NC

AP8 DBG_CNTL0

AU8 NC

AR8 NC

AK21 SWAPLOCKB

AJ21 SWAPLOCKA

AC29 GENLK_VSYNC

AD29 GENLK_CLK

AJ31DDCVGADATA

AJ30DDCVGACLK

AK29NC

AK30NC

AM21NC

AN21NC

AM29NC

AL29NC

AM30NC

AL30NC

AM20AUX2N

AN20AUX2P

AL19DDC2DATA

AM19DDC2CLK

AL27AUX1N

AM27AUX1P

AN26DDC1DATA

AM26DDC1CLK

AD33PS_3

AG31PS_2

AD31PS_1

AM34PS_0

AD32NC_SVI2

AD30NC_SVI2

AC31NC_SVI2

AC32NC

AG21NC

AA29NC

AF32NC

AF33NC

U13NC

V13NC

AC34VSS1DI

AC33VDD1DI

AE34AVSSQ

AD34AVDD

AB34RSET

AC38VSYNC

AC36HSYNC

AE38AVSSN

AF37B

AD35AVSSN

AE36G

AD37AVSSN

AD39R

AR22NC

AT23NC

AV21NC

AU22NC

AR20NC

AT21NC

AT19NC

AU20NC

AR16NC

AT17NC

AV15NC

AU16NC

AR14NC

AT15NC

AV13NC

AU14NC

AU32NC

AT33NC

AT31NC

AR32NC

AU30NC

AV31NC

AT29NC

AR30NC

AR26NC

AT27NC

AV25NC

AU26NC

AR24NC

AT25NC

AV23NC

AU24NC

QV1ADMN66D0LDW-7 2N_SOT363-6

VGA@

QV1ADMN66D0LDW-7 2N_SOT363-6

VGA@

61

2

TV4TP@TV4TP@

CV

17

10

U_

06

03

_6

.3V

6M

VG

A@

CV

17

10

U_

06

03

_6

.3V

6M

VG

A@

1

2

TV2TP@TV2TP@

RV8 10K_0402_5%@RV8 10K_0402_5%@1 2

RV218.45K_0402_1%

@RV21

8.45K_0402_1%

@

12

CV23

0.0

1U

_0

40

2_

16

V7

K

@CV23

0.0

1U

_0

40

2_

16

V7

K

@ 1

2

LV3

BLM15BD121SN1D_0402

VGA@ LV3

BLM15BD121SN1D_0402

VGA@1 2

TV7TP@TV7TP@

RV14 10K_0402_5%VGA@RV14 10K_0402_5%VGA@1 2

RV13

10K_8P4R_5%VGA@

RV13

10K_8P4R_5%VGA@

1 82 73 64 5

TV9TP@

TV9TP@

TV1TP@TV1TP@

CV21

0.6

8U

_0

40

2_

10

V6

K

VGA@CV21

0.6

8U

_0

40

2_

10

V6

K

VGA@ 1

2

RV11 10K_0402_5%

VGA@

RV11 10K_0402_5%

VGA@1 2

RV9

1K_0402_5%

VGA@

RV9

1K_0402_5%

VGA@

12

RV302K_0402_1%

VGA@RV30

2K_0402_1%

VGA@

12

RV208.45K_0402_1%

@RV20

8.45K_0402_1%

@

12

RV272K_0402_1%

@RV27

2K_0402_1%

@

12

C

Page 14: LA-A551PR10 ZEMAE 20130716 - Kythuatphancung

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

MPLL_PVDD MarsCRB Design

220ohm 1 1

0.1u 1 1

1u 1 1

2.2u 1 1

(MPLL_PVDD:1.8V@130mA )

(SPLL_PVDD:1.8V@75mA )

(SPLL_VDDC:0.95V@100mA )

SPLL_PVDD MarsCRB Design

120ohm 1 1

0.1u 1 1

1u 1 1

2.2u 1 1

SPLL_VDDC MarsCRB Design

120ohm 1 1

0.1u 1 1

1u 1 1

2.2u 1 1

Debug Only, for clock observation

As short as possible

Vgs=-4.5V,Id=3A,Rds<97mohm

+3VS to +3VGS+0.95VS to +0.95VGS

Vgs=10V,Id=14.5A,Rds=6mohm

XTALIN

XTALOUT

+MPV18

+SPV18

+SPLL_VDDC

XTALOUT

XTALIN

PXS_PWREN#

PXS_PWREN

PXS_PWREN#

QV3_GATE

PXS_PWREN<37,8>

+1.8VGS +MPV18

+1.8VGS +SPV18

+SPLL_VDDC+0.95VGS

+3VGS

+3VS+3VGS

+3VALW

B+

+0.95VALW +0.95VGS

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-A551P 1.0

BACO POWER

Custom

14 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-A551P 1.0

BACO POWER

Custom

14 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-A551P 1.0

BACO POWER

Custom

14 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

Compal Electronics, Inc.

RV31 1M_0402_5%VGA@RV31 1M_0402_5%VGA@1 2

CV

93

1U

_0

40

2_

6.3

V6

KV

GA

@C

V9

31

U_

04

02

_6

.3V

6K

VG

A@

1

2

G

D

S

QV4

AO

34

13

_S

OT

23

VGA@

G

D

S

QV4

AO

34

13

_S

OT

23

VGA@

2

13

RV44100K_0402_5%

VGA@RV44

100K_0402_5%

VGA@

12

QV9B2N7002DW-T/R7_SOT363-6

VGA@QV9B

2N7002DW-T/R7_SOT363-6

VGA@

3

5

4

CV

81

2.2

U_

04

02

_6

.3V

6M

VG

A@

CV

81

2.2

U_

04

02

_6

.3V

6M

VG

A@

1

2

CV

79

1U

_0

40

2_

6.3

V6

K

VG

A@

CV

79

1U

_0

40

2_

6.3

V6

K

VG

A@

1

2

RV4647K_0402_5%

VGA@RV46

47K_0402_5%

VGA@

1 2

RV45

47

0_

08

05

_5

%

VGA@RV45

47

0_

08

05

_5

%

VGA@

12

LV7

BLM15BD121SN1D_0402

VGA@LV7

BLM15BD121SN1D_0402

VGA@1 2

QV8B2N7002DW-T/R7_SOT363-6

VGA@QV8B2N7002DW-T/R7_SOT363-6

VGA@

3

5

4

RV48220K_0402_5%

VGA@

RV48220K_0402_5%

VGA@

1 2

CV

80

0.1

U_

04

02

_1

6V

7K

VG

A@

CV

80

0.1

U_

04

02

_1

6V

7K

VG

A@

1

2

CV1030.1U_0402_16V7K

@CV1030.1U_0402_16V7K

@

1

2

QV9A

2N

70

02

DW

-T/R

7_

SO

T3

63

-6

VGA@QV9A

2N

70

02

DW

-T/R

7_

SO

T3

63

-6

VGA@

61

2

LV9

BLM15BD121SN1D_0402

VGA@LV9

BLM15BD121SN1D_0402

VGA@1 2

CV

10

6

0.1

U_

04

02

_2

5V

6

VG

A@

CV

10

6

0.1

U_

04

02

_2

5V

6

VG

A@

1

2

CV

82

1U

_0

40

2_

6.3

V6

KV

GA

@C

V8

21

U_

04

02

_6

.3V

6K

VG

A@

1

2

CV

78

2.2

U_

04

02

_6

.3V

6M

VG

A@

CV

78

2.2

U_

04

02

_6

.3V

6M

VG

A@

1

2

CV2515P_0402_50V8JVGA@

CV2515P_0402_50V8JVGA@1

2

QV3

FDS6676AS_SO8

VGA@QV3

FDS6676AS_SO8

VGA@

S1

S2

S3

G4

D8

D7

D6

D5

CV

94

0.1

U_

04

02

_1

6V

7K

VG

A@

CV

94

0.1

U_

04

02

_1

6V

7K

VG

A@

1

2

CV

83

0.1

U_

04

02

_1

6V

7K

VG

A@

CV

83

0.1

U_

04

02

_1

6V

7K

VG

A@

1

2

LV8

BLM15BD121SN1D_0402

VGA@LV8

BLM15BD121SN1D_0402

VGA@1 2

CV

92

2.2

U_

04

02

_6

.3V

6M

VG

A@

CV

92

2.2

U_

04

02

_6

.3V

6M

VG

A@

1

2

RV

49

82

0K

_0

40

2_

5%

VG

A@

RV

49

82

0K

_0

40

2_

5%

VG

A@

12

QV8A

2N7002DW-T/R7_SOT363-6

VGA@QV8A

2N7002DW-T/R7_SOT363-6

VGA@

61

2

RV43470_0805_5%

VGA@RV43

470_0805_5%

VGA@

12

CV2415P_0402_50V8J

VGA@

CV2415P_0402_50V8J

VGA@ 1

2

YV1

27MHZ 10PF +-20PPM X3G027000DA1H

VGA@YV1

27MHZ 10PF +-20PPM X3G027000DA1H

VGA@

NC4

OSC1

OSC3

NC2

CV

10

40

.01

U_

04

02

_2

5V

7K

VG

A@

CV

10

40

.01

U_

04

02

_2

5V

7K

VG

A@ 1

2

PART 9 0F 9

PLLS

/XT

AL

UV1C

SUN-PRO M2_FCBGA962VGA@

PART 9 0F 9

PLLS

/XT

AL

UV1C

SUN-PRO M2_FCBGA962VGA@

AF31NC_XTAL_PVSS

AF30NC_XTAL_PVDD

AN10SPLL_PVSS

AN9SPLL_VDDC

AM10SPLL_PVDD

H8MPLL_PVDD

H7MPLL_PVDD

AL10CLKTESTB

AK10CLKTESTA

AW35XO_IN2

AW34XO_IN

AU34XTALOUT

AV33XTALIN

Page 15: LA-A551PR10 ZEMAE 20130716 - Kythuatphancung

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

VIN 5V and 3.3V (VBIAS=5V),IMAX(per channel)=6A,Rds=18mohm

+1.8VALW to +1.8VGS

+1.5V to +1.5VGSOnly for Kabini

+1.8VGS_LS

VGA_PWRGD

+1.5VGS_LS

VGA_PWRGDVGA_PWRGD<37,8>

+1.5V+1.5VGS

+1.8VALW

+5VALW

+1.8VGS

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-A551P 1.0

BACO POWER

Custom

15 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-A551P 1.0

BACO POWER

Custom

15 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-A551P 1.0

BACO POWER

Custom

15 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

Compal Electronics, Inc.

UV3

TPS22966DPUR_SON14_2X3

VGA@UV3

TPS22966DPUR_SON14_2X3

VGA@

GND11

VIN26

VBIAS4

ON25

VOUT29

VIN27

CT112

VOUT114

VOUT28

VOUT113

VIN12

ON13

VIN11

CT210

GPAD15

CV96

1U

_0

40

2_

6.3

V6

K

@CV96

1U

_0

40

2_

6.3

V6

K

@1

2

CV97

0.1

U_

04

02

_1

0V

7K

@ CV97

0.1

U_

04

02

_1

0V

7K

@

1

2

CV98

0.1

U_

04

02

_1

0V

7K

@ CV98

0.1

U_

04

02

_1

0V

7K

@

1

2

CV99 330P_0402_50V7K

VGA@

CV99 330P_0402_50V7K

VGA@1 2

PJ12

PAD-OPEN 4x4m

@PJ12

PAD-OPEN 4x4m

@1 2

CV95 180P_0402_50V8J

VGA@

CV95 180P_0402_50V8J

VGA@

1 2

PJ13

PAD-OPEN 4x4m

@PJ13

PAD-OPEN 4x4m

@1 2

CV100

1U

_0

40

2_

6.3

V6

K

@ CV100

1U

_0

40

2_

6.3

V6

K

@1

2

Page 16: LA-A551PR10 ZEMAE 20130716 - Kythuatphancung

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

(VDD_CT:1.8V@13mA )

PCIE_PVDD MarsCRB Design

1u 2 2

10u 1 1

PCIE_VDDC MarsCRB Design

1u 7 7

10u 2 2

Route as differential pair

(BIF_VDDC: [email protected])

(VDDR3:3.3V@25mA)

(VDDR1:[email protected])

BIF_VDDC Mars check list Design

1u 1 1

10u 1 1

PCIE_VDDC:

0.95 V @ 1.88 A (PCIe Gen 2.0)

0.95 V @ 2.50 A (PCIe Gen 3.0)

Maximum Current on +0.95VGS:

"Sun": ~4.0 A for PCIe GEN 3.0 designs

(estimated)

Maximum Current on +1.8VGS:

"Sun": ~0.5 A

Need check all power current and decoupling capacitors

after got SUN databook and reference schematic.

(PCIE_PVDD: 1.80V@100mA)

VDDR3 Mars check list Design

120ohm 1 1

1u 3 2

10u 1 0

0.1u 0 1

VDD_CT MarsCRB Design

120ohm 1 1

0.1u 1 1

1u 1 1

10u 1 1

VDDR1 MarsCRB Design

0.01u 5 0

0.1u 5 0

2.2u 5 5

10u 3 3

+0.95VGS

+1.8VGS

+VDDR3

+VDDC_CT

+1.5VGS

+0.95VGS

+VGA_CORE

+VGA_CORE

+VGA_CORE

VCC_GPU_SENSE<37>

VSS_GPU_SENSE<37>

+1.8VGS

+1.8VGS +VDDC_CT

+0.95VGS

+1.5VGS

+3VGS

+0.95VGS

+VDDR3

+VGA_CORE

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

1.0

Power

C

16 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

Compal Electronics, Inc.

LA-A551P

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

1.0

Power

C

16 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

Compal Electronics, Inc.

LA-A551P

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

1.0

Power

C

16 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

Compal Electronics, Inc.

LA-A551P

CV

48

1U

_0402_6.3

V6K

VG

A@

CV

48

1U

_0402_6.3

V6K

VG

A@

1

2

LV4

BLM15BD121SN1D_0402

VGA@LV4

BLM15BD121SN1D_0402

VGA@1 2

CV

50

10U

_0603_6.3

V6M

VG

A@

CV

50

10U

_0603_6.3

V6M

VG

A@

1

2

CV

47

1U

_0402_6.3

V6K

VG

A@

CV

47

1U

_0402_6.3

V6K

VG

A@

1

2

CV

53

0.1

U_0402_16V

7K

VG

A@

CV

53

0.1

U_0402_16V

7K

VG

A@

1

2

CV

31

1U

_0402_6.3

V6K

VG

A@

CV

31

1U

_0402_6.3

V6K

VG

A@

1

2

CV

43

1U

_0402_6.3

V6K

VG

A@

CV

43

1U

_0402_6.3

V6K

VG

A@

1

2

CV

38

2.2

U_0402_6.3

V6M

VG

A@

CV

38

2.2

U_0402_6.3

V6M

VG

A@

1

2

CV

32

10U

_0603_6.3

V6M

VG

A@

CV

32

10U

_0603_6.3

V6M

VG

A@

1

2CV

40

2.2

U_0402_6.3

V6M

VG

A@

CV

40

2.2

U_0402_6.3

V6M

VG

A@

1

2

CV

69

10U

_0603_6.3

V6M

@C

V69

10U

_0603_6.3

V6M

@

1

2

CV

36

2.2

U_0402_6.3

V6M

VG

A@

CV

36

2.2

U_0402_6.3

V6M

VG

A@

1

2

CV

46

1U

_0402_6.3

V6K

VG

A@

CV

46

1U

_0402_6.3

V6K

VG

A@

1

2

CV

49

10U

_0603_6.3

V6M

VG

A@

CV

49

10U

_0603_6.3

V6M

VG

A@

1

2

LV5

BLM15BD121SN1D_0402

VGA@LV5

BLM15BD121SN1D_0402

VGA@1 2

CV

68

1U

_0402_6.3

V6K

@C

V68

1U

_0402_6.3

V6K

@

1

2

DVP

PCIE

PART 5 0F 9

BACO

SENESE

VOLTAGE

CORE I/O

ISOLATED

TRANSLATIONLEVEL

I/O

MEM I/O

CORE

UV1E

SUN-PRO M2_FCBGA962VGA@

DVP

PCIE

PART 5 0F 9

BACO

SENESE

VOLTAGE

CORE I/O

ISOLATED

TRANSLATIONLEVEL

I/O

MEM I/O

CORE

UV1E

SUN-PRO M2_FCBGA962VGA@

AH29FB_GND

AG28FB_VDDCI

AF28FB_VDDC

AG15VDDR4

AG13VDDR4

AG11VDDR4

AF15VDDR4

AF13VDDR4

AF12VDDR4

AF11VDDR4

AD12VDDR4

AG24VDDR3

AG23VDDR3

AF24VDDR3

AF23VDDR3

AG27VDD_CT

AG26VDD_CT

AF27VDD_CT

AF26VDD_CT

Y7VDDR1

Y11VDDR1

U7VDDR1

U11VDDR1

R11VDDR1

P7VDDR1

N11VDDR1

M11VDDR1

L7VDDR1

L26VDDR1

L23VDDR1

L21VDDR1

L16VDDR1

L12VDDR1

K8VDDR1

K13VDDR1

K11VDDR1

J9VDDR1

J7VDDR1

H10VDDR1

G29VDDR1

G26VDDR1

G23VDDR1

G20VDDR1

G17VDDR1

G14VDDR1

G11VDDR1

AL9VDDR1

AK8VDDR1

AJ7VDDR1

AG10VDDR1

AF7VDDR1

AD11VDDR1

AC7VDDR1

Y13VDDCI

V15VDDCI

T15VDDCI

T12VDDCI

R16VDDCI

R13VDDCI

R12VDDCI

N22VDDCI

N20VDDCI

N17VDDCI

N15VDDCI

N13VDDCI

M23VDDCI

M18VDDCI

M16VDDCI

M15VDDCI

AD16VDDCI

AD13VDDCI

AC15VDDCI

AC12VDDCI

AB13VDDCI

AA13VDDCI

Y28VDDC

Y26VDDC

Y23VDDC

Y21VDDC

Y18VDDC

Y16VDDC

V27VDDC

V24VDDC

V22VDDC

V20VDDC

V17VDDC

U26VDDC

U23VDDC

U21VDDC

U18VDDC

U16VDDC

T24VDDC

T22VDDC

T20VDDC

T17VDDC

R26VDDC

R23VDDC

R21VDDC

R18VDDC

N24VDDC

M26VDDC

AH28VDDC

AH27VDDC

AH22VDDC

AG18VDDC

AG16VDDC

AF22VDDC

AF20VDDC

AF17VDDC

AD26VDDC

AD23VDDC

AD21VDDC

AD18VDDC

AC27VDDC

AC24VDDC

AC22VDDC

AC20VDDC

AC17VDDC

AB28VDDC

AB26VDDC

AB23VDDC

AB21VDDC

AB18VDDC

AB16VDDC

AA27VDDC

AA24VDDC

AA22VDDC

AA20VDDC

AA17VDDC

AA15VDDC

T27BIF_VDDC

N27BIF_VDDC

U28PCIE_VDDC

T28PCIE_VDDC

R28PCIE_VDDC

N28PCIE_VDDC

M28PCIE_VDDC

L28PCIE_VDDC

J30PCIE_VDDC

J29PCIE_VDDC

H30PCIE_VDDC

H29PCIE_VDDC

G31PCIE_VDDC

G30PCIE_VDDC

AB37PCIE_PVDD

W29NC_BIF_VDDC

V28NC_BIF_VDDC

Y31NC

W30NC

AA34NC

AA33NC

AA32NC

AA31NC

CV

41

1U

_0402_6.3

V6K

VG

A@

CV

41

1U

_0402_6.3

V6K

VG

A@

1

2

CV

39

2.2

U_0402_6.3

V6M

VG

A@

CV

39

2.2

U_0402_6.3

V6M

VG

A@

1

2

CV

54

1U

_0402_6.3

V6K

VG

A@

CV

54

1U

_0402_6.3

V6K

VG

A@

1

2

CV

52

1U

_0402_6.3

V6K

VG

A@

CV

52

1U

_0402_6.3

V6K

VG

A@

1

2

CV

34

10U

_0603_6.3

V6M

VG

A@

CV

34

10U

_0603_6.3

V6M

VG

A@

1

2

CV

67

1U

_0402_6.3

V6K

@C

V67

1U

_0402_6.3

V6K

@

1

2

CV

55

0.1

U_0402_16V

7K

VG

A@

CV

55

0.1

U_0402_16V

7K

VG

A@

1

2

CV

37

2.2

U_0402_6.3

V6M

VG

A@

CV

37

2.2

U_0402_6.3

V6M

VG

A@

1

2

CV

30

1U

_0402_6.3

V6K

VG

A@

CV

30

1U

_0402_6.3

V6K

VG

A@

1

2

CV

42

1U

_0402_6.3

V6K

VG

A@

CV

42

1U

_0402_6.3

V6K

VG

A@

1

2

CV

35

10U

_0603_6.3

V6M

VG

A@

CV

35

10U

_0603_6.3

V6M

VG

A@

1

2

TV44TV44

CV

51

10U

_0603_6.3

V6M

VG

A@

CV

51

10U

_0603_6.3

V6M

VG

A@

1

2

CV

44

1U

_0402_6.3

V6K

VG

A@

CV

44

1U

_0402_6.3

V6K

VG

A@

1

2

CV

33

10U

_0603_6.3

V6M

VG

A@

CV

33

10U

_0603_6.3

V6M

VG

A@

1

2

CV

45

1U

_0402_6.3

V6K

VG

A@

CV

45

1U

_0402_6.3

V6K

VG

A@

1

2

Page 17: LA-A551PR10 ZEMAE 20130716 - Kythuatphancung

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

15mil

Close to pin Y12 and AA12

Place all these components close to GPU (Within 25mm)

and keep all component close to each other

2GB/4pcs

2GB/4pcs

4Gbit

4Gbit

128M*16

128M*16

SA000068U20Samsung

K4W4G1646B-HC11SA000068R20

MT41K256M16HA-107G:ESA000065D30

Samsung

Micron64bit

64bit

SUN PRO-M3

SUN PRO-M4

0 1 0RV20 RV27

1 1 0

RV20 RV27

8.45K 2K

NC

4.53K

10K

2K

3.4K

4.75K

Memory clock 900MHz

GPU Type Memory Bus Width

64bit

64bit

Size per part Configuration Total Memory Size/Qty

2Gbit

128M*16 1GB/4pcs2Gbit

128M*16 1GB/4pcs

Compal P/N Manufacturer P/N X76 P/N

SUN PRO-M2

Samsung

64bit 2Gbit 128M*16 1GB/4pcs

Micron

K4W2G1646E-BC1A

SA00005XB00 MT41K128M16JT-107G:K

SA00005SH00 K4W2G1646E-BC11

0

VRAM Vendor PS_3[ 1]PS_3[ 2 ]PS_3[ 3 ]RV20 RV27R_pu R_pd

NC 4.75K

11 1

100

0 0

SUN PRO-M2

SUN PRO-M2

RV20 RV27

RV20 RV27

R_pu & R_pd resistor:

0402 1% resistors are required.

+MVREFDB_SB

DQMB#[0..7]

QSB[0..7]

QSB#[0..7]

MDB[0..63]MAB[0..15]

MAB14MAB13

MAB15

B_BA2B_BA0B_BA1

MAB0MAB1MAB2MAB3MAB4MAB5MAB6MAB7MAB8MAB9MAB10MAB11

DQMB#0DQMB#1DQMB#2DQMB#3DQMB#4DQMB#5DQMB#6DQMB#7

QSB0QSB1QSB2QSB3QSB4QSB5QSB6QSB7

QSB#0QSB#1QSB#2QSB#3QSB#4QSB#5QSB#6QSB#7

MAB12

ODTB0ODTB1

CLKB0CLKB0#

CLKB1CLKB1#

RASB0#RASB1#

CASB0#CASB1#

CKEB0CKEB1

CSB0#_0

CSB1#_0

WEB0#WEB1#

MDB0MDB1MDB2MDB3MDB4MDB5MDB6MDB7MDB8MDB9MDB10MDB11MDB12MDB13MDB14MDB15MDB16MDB17MDB18MDB19MDB20MDB21MDB22MDB23MDB24MDB25MDB26MDB27MDB28MDB29MDB30MDB31MDB32MDB33MDB34MDB35MDB36MDB37MDB38MDB39MDB40MDB41MDB42MDB43MDB44MDB45MDB46MDB47MDB48MDB49MDB50MDB51MDB52MDB53MDB54MDB55MDB56MDB57MDB58MDB59MDB60MDB61MDB62MDB63

+MVREFDB_SB

DRAM_RST#_R

MDB[0..63]<19>MAB[0..15] <19>

DQMB#[0..7] <19>

QSB[0..7] <19>

QSB#[0..7] <19>

ODTB0 <19>ODTB1 <19>

CLKB0 <19>CLKB0# <19>

CLKB1 <19>CLKB1# <19>

RASB0# <19>RASB1# <19>

CASB1# <19>CASB0# <19>

CKEB0 <19>CKEB1 <19>

WEB1# <19>WEB0# <19>

CSB0#_0 <19>

CSB1#_0 <19>

B_BA0 <19>B_BA1 <19>

B_BA2 <19>

DRAM_RST# <19>

+1.5VGS

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

1.0

MEM Interface

C

17 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

Compal Electronics, Inc.

LA-A551P

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

1.0

MEM Interface

C

17 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

Compal Electronics, Inc.

LA-A551P

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

1.0

MEM Interface

C

17 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

Compal Electronics, Inc.

LA-A551P

ZZZ2

S1G

X76xxxxxLx1

S1G@

ZZZ2

S1G

X76xxxxxLx1

S1G@

PART 3 0F 9

GDDR5/DDR3

MEMORY INTERFACE A

UV1H

SUN-PRO M2_FCBGA962VGA@

PART 3 0F 9

GDDR5/DDR3

MEMORY INTERFACE A

UV1H

SUN-PRO M2_FCBGA962VGA@

AH12NC

M12NC

M27MEM_CALRP0

AG12NC

N12NC

L27NC

L20MVREFSA

L18MVREFDA

A5DQA1_31

E6DQA1_30

C6DQA1_29

A6DQA1_28

E8DQA1_27

C8DQA1_26

A8DQA1_25

G9DQA1_24

K10DQA1_23

K9DQA1_22

G8DQA1_21

G10DQA1_20

H11DQA1_19

J13DQA1_18

H13DQA1_17

G13DQA1_16

C10DQA1_15

A10DQA1_14

F10DQA1_13

D11DQA1_12

A12DQA1_11

F12DQA1_10

D13DQA1_9

F14DQA1_8

E14DQA1_7

D15DQA1_6

F16DQA1_5

A16DQA1_4

D17DQA1_3

F18DQA1_2

A18DQA1_1

C18DQA1_0

E18DQA0_31

D19DQA0_30

F20DQA0_29

A20DQA0_28

D21DQA0_27

F22DQA0_26

A22DQA0_25

C22DQA0_24

E24DQA0_23

A24DQA0_22

C24DQA0_21

F24DQA0_20

A26DQA0_19

C26DQA0_18

F26DQA0_17

D27DQA0_16

E28DQA0_15

A28DQA0_14

C28DQA0_13

F28DQA0_12

A30DQA0_11

C30DQA0_10

F30DQA0_9

D31DQA0_8

E32DQA0_7

F32DQA0_6

D33DQA0_5

G32DQA0_4

E34DQA0_3

A35DQA0_2

C35DQA0_1

C37DQA0_0

M20MAA1_9/RSVD

M21MAA0_9/MAA_15

J19MAA1_8/MAA_14

H23MAA0_8/MAA_13

L15WEA1B

K26WEA0B

J20CKEA1

K21CKEA0

K16CSA1B_1

M13CSA1B_0

K27CSA0B_1

K24CSA0B_0

K17CASA1B

K20CASA0B

K19RASA1B

K23RASA0B

H14CLKA1B

J14CLKA1

G27CLKA0B

H27CLKA0

G19ADBIA1/ODTA1

J21ADBIA0/ODTA0

F8DDBIA1_3/QSA_7B

J11DDBIA1_2/QSA_6B

C12DDBIA1_1/QSA_5B

C16DDBIA1_0/QSA_4B

C20DDBIA0_3/QSA_3B

E26DDBIA0_2/QSA_2B

E30DDBIA0_1/QSA_1B

A34DDBIA0_0/QSA_0B

D7EDCA1_3/QSA_7

J10EDCA1_2/QSA_6

E12EDCA1_1/QSA_5

E16EDCA1_0/QSA_4

E20EDCA0_3/QSA_3

D25EDCA0_2/QSA_2

D29EDCA0_1/QSA_1

C34EDCA0_0/QSA_0

D9WCKA1B_1/DQMA_7

E10WCKA1_1/DQMA_6

A14WCKA1B_0/DQMA_5

C14WCKA1_0/DQMA_4

E22WCKA0B_1/DQMA_3

D23WCKA0_1/DQMA_2

C32WCKA0B_0/DQMA_1

A32WCKA0_0/DQMA_0

H17MAA1_7/MAA_BA1

J17MAA1_6/MAA_BA0

H16MAA1_5/MAA_BA2

J16MAA1_4/MAA_12

G16MAA1_3/MAA_11

L13MAA1_2/MAA_10

H20MAA1_1/MAA_9

H19MAA1_0/MAA_8

G21MAA0_7/MAA_7

H21MAA0_6/MAA_6

J26MAA0_5/MAA_5

H26MAA0_4/MAA_4

J24MAA0_3/MAA_3

H24MAA0_2/MAA_2

J23MAA0_1/MAA_1

G24MAA0_0/MAA_0

RV73100_0402_1%

VGA@

RV73100_0402_1%

VGA@

12

PART 4 0F 9

GDDR5/DDR3

MEMORY INTERFACE B

UV1I

SUN-PRO M2_FCBGA962VGA@

PART 4 0F 9

GDDR5/DDR3

MEMORY INTERFACE B

UV1I

SUN-PRO M2_FCBGA962VGA@

AA12MVREFSB

Y12MVREFDB

AP5DQB1_31

AP1DQB1_30

AP3DQB1_29

AN4DQB1_28

AM1DQB1_27

AM6DQB1_26

AL4DQB1_25

AK1DQB1_24

AM7DQB1_23

AM8DQB1_22

AL7DQB1_21

AK9DQB1_20

AG7DQB1_19

AG8DQB1_18

AF9DQB1_17

AF8DQB1_16

AK3DQB1_15

AJ4DQB1_14

AH6DQB1_13

AH5DQB1_12

AG4DQB1_11

AF6DQB1_10

AF3DQB1_9

AF1DQB1_8

AD5DQB1_7

AD3DQB1_6

AD1DQB1_5

AD6DQB1_4

AB3DQB1_3

AB1DQB1_2

AB6DQB1_1

AA4DQB1_0

Y5DQB0_31

Y3DQB0_30

Y1DQB0_29

Y6DQB0_28

V3DQB0_27

V1DQB0_26

V6DQB0_25

U4DQB0_24

T1DQB0_23

T6DQB0_22

R4DQB0_21

P5DQB0_20

P6DQB0_19

N4DQB0_18

M5DQB0_17

M3DQB0_16

M1DQB0_15

M6DQB0_14

L4DQB0_13

K5DQB0_12

K6DQB0_11

J4DQB0_10

H6DQB0_9

H5DQB0_8

G4DQB0_7

F5DQB0_6

F3DQB0_5

F1DQB0_4

E1DQB0_3

E3DQB0_2

C3DQB0_1

C5DQB0_0

AH11DRAM_RST

V12MAB1_9/RSVD

U12MAB0_9/MAB_15

W8MAB1_8/MAB_14

T8MAB0_8/MAB_13

AB11WEB1B

N10WEB0B

AA11CKEB1

U10CKEB0

AC10CSB1B_1

AD10CSB1B_0

L10CSB0B_1

P10CSB0B_0

AA10CASB1B

W10CASB0B

Y10RASB1B

T10RASB0B

AD7CLKB1B

AD8CLKB1

L8CLKB0B

L9CLKB0

W7ADBIB1/ODTB1

T7ADBIB0/ODTB0

AM3DDBIB1_3/QSB_7B

AJ8DDBIB1_2/QSB_6B

AH3DDBIB1_1/QSB_5B

AC4DDBIB1_0/QSB_4B

W4DDBIB0_3/QSB_3B

P1DDBIB0_2/QSB_2B

K1DDBIB0_1/QSB_1B

G7DDBIB0_0/QSB_0B

AM5EDCB1_3/QSB_7

AJ9EDCB1_2/QSB_6

AH1EDCB1_1/QSB_5

AB5EDCB1_0/QSB_4

V5EDCB0_3/QSB_3

P3EDCB0_2/QSB_2

K3EDCB0_1/QSB_1

F6EDCB0_0/QSB_0

AK5WCKB1B_1/DQMB_7

AK6WCKB1_1/DQMB_6

AF5WCKB1B_0/DQMB_5

AE4WCKB1_0/DQMB_4

T5WCKB0B_1/DQMB_3

T3WCKB0_1/DQMB_2

H1WCKB0B_0/DQMB_1

H3WCKB0_0/DQMB_0

AA9MAB1_7/BA1

Y8MAB1_6/BA0

AA8MAB1_5/BA2

AA7MAB1_4/MAB_12

AC9MAB1_3/MAB_11

AC8MAB1_2/MAB_10

W9MAB1_1/MAB_9

Y9MAB1_0/MAB_8

U8MAB0_7/MAB_7

U9MAB0_6/MAB_6

N9MAB0_5/MAB_5

N8MAB0_4/MAB_4

N7MAB0_3/MAB_3

P9MAB0_2/MAB_2

T9MAB0_1/MAB_1

P8MAB0_0/MAB_0

RV70

51.1_0402_1%

VGA@RV70

51.1_0402_1%

VGA@1 2

ZZZ3

H1G

X76xxxxxLx2

H1G@

ZZZ3

H1G

X76xxxxxLx2

H1G@RV36

10_0402_1%

VGA@RV36

10_0402_1%

VGA@1 2

CV158120P_0402_50V9

VGA@CV158

120P_0402_50V9

VGA@

12

RV7240.2_0402_1%

VGA@

RV7240.2_0402_1%

VGA@

12

RV34 120_0402_1%VGA@RV34 120_0402_1%VGA@1 2

ZZZ5

H2G

X76xxxxxLx4

H2G@

ZZZ5

H2G

X76xxxxxLx4

H2G@

CV1591U_0402_6.3V6KVGA@

CV1591U_0402_6.3V6KVGA@

1

2

ZZZ4

S2G

X76xxxxxLx3

S2G@

ZZZ4

S2G

X76xxxxxLx3

S2G@

RV714.99K_0402_1%

VGA@RV71

4.99K_0402_1%

VGA@

12

Page 18: LA-A551PR10 ZEMAE 20130716 - Kythuatphancung

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

(DP_VDDC: 0.95V@20mA)

(DP_VDDR: 1.8V@20mA)

+0.95VGS

+1.8VGS

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

1.0

PWR_GND

Custom

18 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

Compal Electronics, Inc.

LA-A551P

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

1.0

PWR_GND

Custom

18 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

Compal Electronics, Inc.

LA-A551P

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

1.0

PWR_GND

Custom

18 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

Compal Electronics, Inc.

LA-A551P

PART 8 0F 9

CALIBRATION

DP_VDDR DP_VDDC

DP GND

UV1F

SUN-PRO M2_FCBGA962VGA@

PART 8 0F 9

CALIBRATION

DP_VDDR DP_VDDC

DP GND

UV1F

SUN-PRO M2_FCBGA962VGA@

AM39DP_CALR

AW18NC

AW28NC

AM32DP_VDDR

AL38DP_VDDR

AM37DP_VDDR

AG34DP_VDDR

AF34DP_VDDR

AJ34DP_VDDR

AH34DP_VDDR

AV19NC

AU18NC

AP23NC

AP22NC

AP21NC

AP20NC

AV29NC

AU28NC

AP26NC

AP25NC

AP24NC

AN24NC

AN32DP_VSSR

AM35DP_VSSR

AN38DP_VSSR

AR18DP_VSSR

AV17DP_VSSR

AR28DP_VSSR

AV27DP_VSSR

AL34DP_VSSR

AK39DP_VSSR

AH39DP_VSSR

AF39DP_VSSR

AU37DP_VSSR

AR39DP_VSSR

AP39DP_VSSR

AN34DP_VSSR

AW22DP_VSSR

AW20DP_VSSR

AP19DP_VSSR

AP18DP_VSSR

AN19DP_VSSR

AW16DP_VSSR

AW14DP_VSSR

AP17DP_VSSR

AP16DP_VSSR

AN17DP_VSSR

AW32DP_VSSR

AW30DP_VSSR

AP30DP_VSSR

AP29DP_VSSR

AN29DP_VSSR

AW26DP_VSSR

AW24DP_VSSR

AP28DP_VSSR

AP27DP_VSSR

AN27DP_VSSR

AP15NC

AP14NC

AT13NC

AP13NC

AN31DP_VDDC

AK34DP_VDDC

AK33DP_VDDC

AM33DP_VDDC

AL33DP_VDDC

AP33DP_VDDC

AN33DP_VDDC

AP32DP_VDDC

AP31DP_VDDC

PART 6 0F 9

GND

UV1G

SUN-PRO M2_FCBGA962VGA@

PART 6 0F 9

GND

UV1G

SUN-PRO M2_FCBGA962VGA@

Y27GND

Y24GND

Y22GND

Y20GND

Y17GND

Y15GND

W6GND

W2GND

V26GND

V23GND

V21GND

V18GND

V16GND

V11GND

U6GND

U27GND

U24GND

U22GND

U20GND

U2GND

U17GND

U15GND

T26GND

T23GND

T21GND

T18GND

T16GND

T13GND

T11GND

R6GND

R27GND

R24GND

R22GND

R20GND

R2GND

R17GND

R15GND

N6GND

N26GND

N23GND

N21GND

N2GND

N18GND

N16GND

M24GND

M22GND

M17GND

L6GND

L24GND

L22GND

L2GND

L17GND

L11GND

K7GND

K14GND

J8GND

J6GND

J27GND

J2GND

H9GND

G6GND

G2GND

F9GND

F7GND

F33GND

F31GND

F29GND

F27GND

F25GND

F23GND

F21GND

F19GND

F17GND

F15GND

Y39GND

Y34GND

W34GND

W31GND

V39GND

V34GND

U34GND

U31GND

T39GND

T34GND

T31GND

R34GND

P39GND

P34GND

P31GND

N34GND

N31GND

M39GND

M34GND

L34GND

L31GND

K39GND

K34GND

K31GND

J34GND

J31GND

H39GND

H34GND

H31GND

G34GND

G33GND

F39GND

F34GND

E39GND

AB39GND

AW39VSS_MECH

AW1VSS_MECH

A39VSS_MECH

AG22NC

F13

GND

F11

GND

E5

GND

E35

GND

C39

GND

C1

GND

B9

GND

B7

GND

B33

GND

B31

GND

B29

GND

B27

GND

B25

GND

B23

GND

B21

GND

B19

GND

B17

GND

B15

GND

B13

GND

B11

GND

AR5

GND

AP9

GND

AP7

GND

AP11

GND

AN8

GND

AN6

GND

AN30

GND

AN2

GND

AN11

GND

AM9

GND

AM31

GND

AM11

GND

AL8

GND

AL6

GND

AL32

GND

AL26

GND

AL23

GND

AL20GND

AL2GND

AL17GND

AL14GND

AL11GND

AK7GND

AK31GND

AK11GND

AJ6GND

AJ28GND

AJ2GND

AJ11GND

AJ10GND

AH21GND

AG9GND

AG6GND

AG20GND

AG2GND

AG17GND

AF21GND

AF18GND

AF16GND

AF10GND

AE6GND

AE2GND

AD9GND

AD27GND

AD24GND

AD22GND

AD20GND

AD17GND

AD15GND

AC6GND

AC28GND

AC26GND

AC23GND

AC21GND

AC2GND

AC18GND

AC16GND

AC13GND

AC11GND

AB27GND

AB24GND

AB22GND

AB20GND

AB17GND

AB15GND

AB12GND

AA6GND

AA28GND

AA26GND

AA23GND

AA21GND

AA2GND

AA18GND

AA16GND

A37GND

A3GND

Page 19: LA-A551PR10 ZEMAE 20130716 - Kythuatphancung

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

CHANNEL B: 512MB/1024MB DDR3

15mil 15mil 15mil 15mil

Supported Memory Configurations: Up to 4 Gbit/part for DDR3.

close to UV7 UV8

close to UV9 UV10

close to UV7 UV8close to UV9 UV10

MDB[0..63]

MAB[0..15]

DQMB#[0..7]

QSB#[0..7]

QSB[0..7]

B_BA0 B_BA0 B_BA0B_BA1 B_BA1 B_BA1B_BA2 B_BA2 B_BA2

CASB0# CASB1#

CKEB0 CKEB1

CLKB0

CLKB0

CLKB0#

CLKB0#

CLKB1

CLKB1

CLKB1#

CLKB1#

CSB0#_0 CSB1#_0

DQMB#1 DQMB#0DQMB#3 DQMB#2 DQMB#4

DQMB#7DQMB#6DQMB#5

DRAM_RST# DRAM_RST# DRAM_RST#

MAB0 MAB0 MAB0 MAB0MAB1 MAB1 MAB1 MAB1

MAB10 MAB10 MAB10 MAB10MAB11 MAB11 MAB11 MAB11MAB12 MAB12 MAB12 MAB12MAB13 MAB13 MAB13 MAB13MAB14 MAB14 MAB14 MAB14

MAB2 MAB2 MAB2 MAB2MAB3 MAB3 MAB3 MAB3MAB4 MAB4 MAB4 MAB4MAB5 MAB5 MAB5 MAB5MAB6 MAB6 MAB6 MAB6MAB7 MAB7 MAB7 MAB7MAB8 MAB8 MAB8 MAB8MAB9 MAB9 MAB9 MAB9MDB14

MDB7MDB1

MDB31

MDB27

MDB29MDB28

MDB30

MDB25

MDB18MDB21

MDB22

MDB19

MDB23

MDB32

MDB33

MDB34

MDB35

MDB36

MDB37

MDB38

MDB39

MDB63MDB59

MDB56MDB11

MDB9 MDB5

ODTB0 ODTB1

QSB#1 QSB#0QSB#3 QSB#2 QSB#4

QSB#7QSB#6QSB#5

QSB1 QSB0QSB3 QSB2 QSB4

QSB7QSB6QSB5

RASB0# RASB1#

+VREFC_A1_B +VREFC_A3_B +VREFC_A4_B

WEB0# WEB1#

MDB45

MDB46

MDB52

MDB54

MDB53

MDB55

MDB41

MDB43

MDB40

MDB42

MDB24MDB26

+VREFC_A2_B

MDB10

MDB8

MDB15

MDB13

MDB12

MDB47

MDB44MDB57

MDB58

MDB61

MDB60

MDB62MDB4

MDB6MDB0

MDB2

MDB3

MDB20

MDB16

MDB17

MDB48

MDB49

MDB50

MDB51

MAB15MAB15MAB15MAB15

+VREFC_A1_B +VREFC_A2_B +VREFC_A3_B +VREFC_A4_B

QSB#[0..7]<17>

QSB[0..7]<17>

DQMB#[0..7]<17>

MAB[0..15]<17>

CLKB0<17>

CASB0#<17>

CKEB1<17>

RASB1#<17>

B_BA2<17>

ODTB0<17>

RASB0#<17>

CLKB1#<17>CKEB0<17>

CSB0#_0<17>

CLKB1<17>

WEB1#<17>

B_BA1<17>

CSB1#_0<17>

DRAM_RST#<17>

CLKB0#<17>

WEB0#<17>

ODTB1<17>

CASB1#<17>

B_BA0<17>

MDB[0..63]<17>

+1.5VGS

+1.5VGS

+1.5VGS

+1.5VGS

+1.5VGS

+1.5VGS

+1.5VGS

+1.5VGS

+1.5VGS +1.5VGS+1.5VGS +1.5VGS

+1.5VGS +1.5VGS +1.5VGS +1.5VGS

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

C 1.0

VRAM Channel B

Compal Electronics, Inc.

LA-A551P

2013/05/15 2015/09/27

19 40Tuesday, July 16, 2013

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

C 1.0

VRAM Channel B

Compal Electronics, Inc.

LA-A551P

2013/05/15 2015/09/27

19 40Tuesday, July 16, 2013

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

C 1.0

VRAM Channel B

Compal Electronics, Inc.

LA-A551P

2013/05/15 2015/09/27

19 40Tuesday, July 16, 2013

CV

195

1U

_0402_6.3

V6K

VGA@

CV

195

1U

_0402_6.3

V6K

VGA@

1

2

CV

173

0.1

U_0402_16V

7K

VGA@

CV

173

0.1

U_0402_16V

7K

VGA@

1

2

RV85 40.2_0402_1%

VGA@

RV85 40.2_0402_1%

VGA@1 2

CV

193

1U

_0402_6.3

V6K

VGA@

CV

193

1U

_0402_6.3

V6K

VGA@

1

2

CV

185

1U

_0402_6.3

V6K

VGA@

CV

185

1U

_0402_6.3

V6K

VGA@

1

2

CV1610.01U_0402_16V7K

[email protected]_0402_16V7K

VGA@

12

CV

188

1U

_0402_6.3

V6K

VGA@

CV

188

1U

_0402_6.3

V6K

VGA@

1

2

CV

196

1U

_0402_6.3

V6K

VGA@

CV

196

1U

_0402_6.3

V6K

VGA@

1

2

CV

169

0.1

U_0402_16V

7K

VGA@

CV

169

0.1

U_0402_16V

7K

VGA@

1

2

RV80243_0402_1%

VGA@

RV80243_0402_1%

VGA@

12

CV

166

0.1

U_0402_16V

7K

VGA@

CV

166

0.1

U_0402_16V

7K

VGA@

1

2

RV79 40.2_0402_1%

VGA@

RV79 40.2_0402_1%

VGA@1 2

RV864.99K_0402_1%

VGA@RV86

4.99K_0402_1%

VGA@

12

96-BALLSDRAM DDR3

UV5

K4W1G1646G-BC11_FBGA96@

96-BALLSDRAM DDR3

UV5

K4W1G1646G-BC11_FBGA96@

WEL3

RASJ3

CASK3

CS/CS0L2

CKE/CKE0K9

CKJ7

CKK7

DQSUB7

BA0M2

BA1N8

A2P3

A3N2

A4P8

A5P2

A6R8

A7R2

A8T8

A9R3

A10/APL7

A11R7

DQL0E3

DQL1F7

DQL2F2

DQL3F8

DQL4H3

DQL5H8

DQL6G2

DQL7H7

VSSQD1

VSSA9

VSSE1VSSB3

NC/ODT1J1

VDDB2

VDDD9

VDDQA1

VDDQA8

VDDQC1

VDDQC9

NC/CS1L1

NC/CE1J9

VDDQE9

ZQ/ZQ0L8

RESETT2

DQSLF3

DMUD3 DMLE7

VSSQB1

VSSQB9

VSSQD8

VSSQE2

DQSUC7

VSSQE8

DQSLG3

VDDQF1

VSSQF9

VSSQG1

VDDQH2

VDDQH9

VSSQG9

VREFCAM8

VSSG8

VDDG7

ODT/ODT0K1

A0N3

A1P7

VDDK2

A12N7

VSSJ2

VDDK8

DQU1C3

DQU2C8

DQU3C2

DQU4A7

DQU5A2

DQU6B8

DQU7A3

DQU0D7

A13T3

A14T7

A15/BA3M7

BA2M3

VREFDQH1

NCZQ1L9

VDDN1

VDDN9

VDDR1

VDDR9

VSSJ8

VSSM1

VSSM9

VSSP1

VSSP9

VSST1

VSST9

VDDQD2

RV914.99K_0402_1%

VGA@RV91

4.99K_0402_1%

VGA@

12

CV

165

0.1

U_0402_16V

7K

VGA@

CV

165

0.1

U_0402_16V

7K

VGA@

1

2

RV874.99K_0402_1%

VGA@RV87

4.99K_0402_1%

VGA@1

2

96-BALLSDRAM DDR3

UV7

K4W1G1646G-BC11_FBGA96@

96-BALLSDRAM DDR3

UV7

K4W1G1646G-BC11_FBGA96@

WEL3

RASJ3

CASK3

CS/CS0L2

CKE/CKE0K9

CKJ7

CKK7

DQSUB7

BA0M2

BA1N8

A2P3

A3N2

A4P8

A5P2

A6R8

A7R2

A8T8

A9R3

A10/APL7

A11R7

DQL0E3

DQL1F7

DQL2F2

DQL3F8

DQL4H3

DQL5H8

DQL6G2

DQL7H7

VSSQD1

VSSA9

VSSE1VSSB3

NC/ODT1J1

VDDB2

VDDD9

VDDQA1

VDDQA8

VDDQC1

VDDQC9

NC/CS1L1

NC/CE1J9

VDDQE9

ZQ/ZQ0L8

RESETT2

DQSLF3

DMUD3 DMLE7

VSSQB1

VSSQB9

VSSQD8

VSSQE2

DQSUC7

VSSQE8

DQSLG3

VDDQF1

VSSQF9

VSSQG1

VDDQH2

VDDQH9

VSSQG9

VREFCAM8

VSSG8

VDDG7

ODT/ODT0K1

A0N3

A1P7

VDDK2

A12N7

VSSJ2

VDDK8

DQU1C3

DQU2C8

DQU3C2

DQU4A7

DQU5A2

DQU6B8

DQU7A3

DQU0D7

A13T3

A14T7

A15/BA3M7

BA2M3

VREFDQH1

NCZQ1L9

VDDN1

VDDN9

VDDR1

VDDR9

VSSJ8

VSSM1

VSSM9

VSSP1

VSSP9

VSST1

VSST9

VDDQD2

CV

170

0.1

U_0402_16V

7K

VGA@

CV

170

0.1

U_0402_16V

7K

VGA@

1

2

CV

172

0.1

U_0402_16V

7K

VGA@

CV

172

0.1

U_0402_16V

7K

VGA@

1

2

RV84 40.2_0402_1%

VGA@

RV84 40.2_0402_1%

VGA@1 2

RV884.99K_0402_1%

VGA@RV88

4.99K_0402_1%

VGA@

12

CV

168

0.1

U_0402_16V

7K

VGA@

CV

168

0.1

U_0402_16V

7K

VGA@

1

2C

V179

22U

_0603_6.3

V6M

VGA@

CV

179

22U

_0603_6.3

V6M

VGA@

1

2

RV934.99K_0402_1%

VGA@RV93

4.99K_0402_1%

VGA@

12

96-BALLSDRAM DDR3

UV8

K4W1G1646G-BC11_FBGA96@

96-BALLSDRAM DDR3

UV8

K4W1G1646G-BC11_FBGA96@

WEL3

RASJ3

CASK3

CS/CS0L2

CKE/CKE0K9

CKJ7

CKK7

DQSUB7

BA0M2

BA1N8

A2P3

A3N2

A4P8

A5P2

A6R8

A7R2

A8T8

A9R3

A10/APL7

A11R7

DQL0E3

DQL1F7

DQL2F2

DQL3F8

DQL4H3

DQL5H8

DQL6G2

DQL7H7

VSSQD1

VSSA9

VSSE1VSSB3

NC/ODT1J1

VDDB2

VDDD9

VDDQA1

VDDQA8

VDDQC1

VDDQC9

NC/CS1L1

NC/CE1J9

VDDQE9

ZQ/ZQ0L8

RESETT2

DQSLF3

DMUD3 DMLE7

VSSQB1

VSSQB9

VSSQD8

VSSQE2

DQSUC7

VSSQE8

DQSLG3

VDDQF1

VSSQF9

VSSQG1

VDDQH2

VDDQH9

VSSQG9

VREFCAM8

VSSG8

VDDG7

ODT/ODT0K1

A0N3

A1P7

VDDK2

A12N7

VSSJ2

VDDK8

DQU1C3

DQU2C8

DQU3C2

DQU4A7

DQU5A2

DQU6B8

DQU7A3

DQU0D7

A13T3

A14T7

A15/BA3M7

BA2M3

VREFDQH1

NCZQ1L9

VDDN1

VDDN9

VDDR1

VDDR9

VSSJ8

VSSM1

VSSM9

VSSP1

VSSP9

VSST1

VSST9

VDDQD2

RV78 40.2_0402_1%

VGA@

RV78 40.2_0402_1%

VGA@1 2

CV

194

1U

_0402_6.3

V6K

VGA@

CV

194

1U

_0402_6.3

V6K

VGA@

1

2

CV

171

0.1

U_0402_16V

7K

VGA@

CV

171

0.1

U_0402_16V

7K

VGA@

1

2

CV

163

0.1

U_0402_16V

7K

VGA@

CV

163

0.1

U_0402_16V

7K

VGA@

1

2

RV83243_0402_1%

VGA@

RV83243_0402_1%

VGA@

12

CV

187

1U

_0402_6.3

V6K

VGA@

CV

187

1U

_0402_6.3

V6K

VGA@

1

2

CV

183

1U

_0402_6.3

V6K

VGA@

CV

183

1U

_0402_6.3

V6K

VGA@

1

2

RV894.99K_0402_1%

VGA@RV89

4.99K_0402_1%

VGA@

12

RV924.99K_0402_1%

VGA@RV92

4.99K_0402_1%

VGA@

12

RV82243_0402_1%

VGA@

RV82243_0402_1%

VGA@

12

CV

162

0.1

U_0402_16V

7K

VGA@

CV

162

0.1

U_0402_16V

7K

VGA@

1

2

RV81243_0402_1%

VGA@

RV81243_0402_1%

VGA@

12

CV

197

1U

_0402_6.3

V6K

VGA@

CV

197

1U

_0402_6.3

V6K

VGA@

1

2

CV

186

1U

_0402_6.3

V6K

VGA@

CV

186

1U

_0402_6.3

V6K

VGA@

1

2

CV

167

0.1

U_0402_16V

7K

VGA@

CV

167

0.1

U_0402_16V

7K

VGA@

1

2

96-BALLSDRAM DDR3

UV6

K4W1G1646G-BC11_FBGA96@

96-BALLSDRAM DDR3

UV6

K4W1G1646G-BC11_FBGA96@

WEL3

RASJ3

CASK3

CS/CS0L2

CKE/CKE0K9

CKJ7

CKK7

DQSUB7

BA0M2

BA1N8

A2P3

A3N2

A4P8

A5P2

A6R8

A7R2

A8T8

A9R3

A10/APL7

A11R7

DQL0E3

DQL1F7

DQL2F2

DQL3F8

DQL4H3

DQL5H8

DQL6G2

DQL7H7

VSSQD1

VSSA9

VSSE1VSSB3

NC/ODT1J1

VDDB2

VDDD9

VDDQA1

VDDQA8

VDDQC1

VDDQC9

NC/CS1L1

NC/CE1J9

VDDQE9

ZQ/ZQ0L8

RESETT2

DQSLF3

DMUD3 DMLE7

VSSQB1

VSSQB9

VSSQD8

VSSQE2

DQSUC7

VSSQE8

DQSLG3

VDDQF1

VSSQF9

VSSQG1

VDDQH2

VDDQH9

VSSQG9

VREFCAM8

VSSG8

VDDG7

ODT/ODT0K1

A0N3

A1P7

VDDK2

A12N7

VSSJ2

VDDK8

DQU1C3

DQU2C8

DQU3C2

DQU4A7

DQU5A2

DQU6B8

DQU7A3

DQU0D7

A13T3

A14T7

A15/BA3M7

BA2M3

VREFDQH1

NCZQ1L9

VDDN1

VDDN9

VDDR1

VDDR9

VSSJ8

VSSM1

VSSM9

VSSP1

VSSP9

VSST1

VSST9

VDDQD2

CV

164

0.1

U_0402_16V

7K

VGA@

CV

164

0.1

U_0402_16V

7K

VGA@

1

2

CV

198

1U

_0402_6.3

V6K

VGA@

CV

198

1U

_0402_6.3

V6K

VGA@

1

2

CV

184

1U

_0402_6.3

V6K

VGA@

CV

184

1U

_0402_6.3

V6K

VGA@

1

2

RV904.99K_0402_1%

VGA@RV90

4.99K_0402_1%

VGA@

12

CV1600.01U_0402_16V7K

[email protected]_0402_16V7K

VGA@

12

Page 20: LA-A551PR10 ZEMAE 20130716 - Kythuatphancung

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

If it's EPD, they're become

LCD_TXOUT2+_R = EDP_TX0+

LCD_TXOUT2-_R = EDP_TX0-

LCD_TXOUT1+_R = EDP_TX1+

LCD_TXOUT1-_R = EDP_TX1-

LVDS_CLK = EDP_AUXP

LVDS_DATA = EDP_AUXN

Reserve for EMI request

Carmera & Touch Screen

LCD Control

LCD_INV

LCD_VDD

1.5A

Reserve for eDP panel potential issue

Irush=1.5A 60mils

60mils

20mils

20mils

Irush=1.5A

Reserve for EMI request

pin1-4 Touch function for panelpin5-10 For Webcam with single or dual MICpin11-30 For LVDS or EDP panel

W=60mils

1.5A

W=60mils I rush=1.5A

Need check eDP&LVDS both 3V power rail.

close to LVDS conn.

EDP_LCD_TXOUT0+_R

EDP_LCD_TXOUT0-_R

EDP_LCD_TXOUT1+_R

EDP_LCD_TXOUT1-_R

EDP_LCD_TXOUT2+_R

EDP_LCD_TXOUT2-_R

LCD_TXCLK+

LCD_TXCLK-

USB20_P3_R

USB20_N3_R

LED_PWM

EDP_LVDS_CLK

EDP_LVDS_DATA

BKOFF#BKOFF#_R

LCD_TXCLK-LCD_TXCLK+

EDP_LCD_TXOUT2+_REDP_LCD_TXOUT2-_R

BKOFF#_RLED_PWM

INT_MIC_CLK

USB20_N3_RUSB20_P3_R

USB20_N4_RUSB20_P4_R

+3VS

+LCD_VDD

EDP_LCD_TXOUT0+_REDP_LCD_TXOUT0-_REDP_LVDS_DATAEDP_LVDS_CLK

EDP_LCD_TXOUT1-_REDP_LCD_TXOUT1+_R

+3VS_LVDS_CAM

INT_MIC_DATA

+5VS_LVDS_TOUCH

USB20_N4_R

USB20_P4_R

+LCD_VDD_SS

BKOFF#

INT_MIC_DATA

USB20_N3_R

+LCD_VDD_OUT

USB20_P3_R

INT_MIC_CLK

EDP_LCD_TXOUT0+_R<6>

EDP_LCD_TXOUT0-_R<6>

EDP_LCD_TXOUT1+_R<6>

EDP_LCD_TXOUT1-_R<6>

EDP_LCD_TXOUT2+_R<6>

EDP_LCD_TXOUT2-_R<6>

LCD_TXCLK+<6>

LCD_TXCLK-<6>

USB20_P3<7>

USB20_N3<7>

LCD_INT_PWM<6>

LCD_ENBKL <27,6>

BKOFF# <27>

EDP_LVDS_HPD <6>

INT_MIC_CLK <26>INT_MIC_DATA <26>

USB20_N4<7>

USB20_P4<7>

LCD_ENVDD<6>

EDP_LVDS_CLK<6>

EDP_LVDS_DATA<6>

B+

+3VS

+3VS

+5VS

+LCD_VDD

+LCD_INV

+3VS

+LCD_INV

+LCD_VDD

+3VS

+3VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-A551P 0.2

LVDS/EDP W/ CAMERA

20 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-A551P 0.2

LVDS/EDP W/ CAMERA

20 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-A551P 0.2

LVDS/EDP W/ CAMERA

20 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

Compal Electronics, Inc.

R390 0_0603_5%@

R390 0_0603_5%@1 2

R113

10K_0402_5%

R113

10K_0402_5%

12

L3

WCM-2012-900T_0805

CAM_EMI@ L3

WCM-2012-900T_0805

CAM_EMI@

11

22

33

44

R105 0_0402_5%

@TOUCH_EMI@

R105 0_0402_5%

@TOUCH_EMI@

1 2

L4

WCM-2012-900T_0805

TOUCH_EMI@ L4

WCM-2012-900T_0805

TOUCH_EMI@

11

22

33

44

C170.015u_0402_16V_X7RC170.015u_0402_16V_X7R

12

R106 0_0805_5%

Rshort@

R106 0_0805_5%

Rshort@1 2

D6

RB751V40_SC76-2

D6

RB751V40_SC76-2

12

JLVDS

Conn@

STARC_111H30-000000-G4-R

JLVDS

Conn@

STARC_111H30-000000-G4-R

443322

77

11

6655

88

99

1010

1111

1212

1313

1414

1515

1616

1717

1818

1919

2020

2121

2222

2323

2424

2525

2626

2727

2828

2929

3030

GND31

GND32

GND33

GND34

GND35

R112100K_0402_5%R112100K_0402_5%

12

R131

47K_0402_5%

R131

47K_0402_5%

12

U16

APL3512ABI-TRG_SOT23-5

U16

APL3512ABI-TRG_SOT23-5

VIN5

SS4

VOUT1

EN3

GND2

R389 0_0603_5%

@

R389 0_0603_5%

@1 2

R147 0_0402_5%LVDS@

R147 0_0402_5%LVDS@

1 2

R103 0_0402_5%EDP@

R103 0_0402_5%EDP@1 2

L2

FBMA-L11-201209-221LMA30T_0805

L2

FBMA-L11-201209-221LMA30T_080512

D29

SC300001400

@ESD@D29

SC300001400

@ESD@

11

GND2

33

44

Vbus5

66

U17

SN74AHC1G08DCKR_SC70-5

EDP@U17

SN74AHC1G08DCKR_SC70-5

EDP@

IN11

IN22

G3

O4

P5

R104 0_0402_5%

@TOUCH_EMI@

R104 0_0402_5%

@TOUCH_EMI@1 2

D15 RB751V40_SC76-2

LVDS@

D15 RB751V40_SC76-2

LVDS@

1 2

Page 21: LA-A551PR10 ZEMAE 20130716 - Kythuatphancung

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

OE# A Y

L

L

H

L L

H H

X Z

please manually load

this virtual material to 45@ BOM

RO0000003HMHDMI Royalty

HDMI W/O Logo: RO0000001HM

HDMI W/Logo: RO0000002HM

HDMI W/Logo + HDCP: RO0000003HM

HDMI Connector

VIN = 5V, IOUT = 0.5A , RDS(ON) TYP=95m ; MAX=115m

Current Limit: TYP=0.8A ; MAX=1A

HDMI POWER CIRCUIT

SA00006H000

Main: SCA00000U10

2nd: SCA00001L00

Close to JHDMI

APU_HDMI_DATAHDMI_SCLKHDMI_SDATA

APU_HDMI_CLK

APU_HDMI_DATA HDMI_SDATA

APU_HDMI_CLK HDMI_SCLK

HDMI_HPD_CHDMI_HPD_U

HDMI_HPD

HDMI_HPD_C

HDMI_R_D1-

HDMI_R_D1+

HDMI_R_D2+

HDMI_R_D0+

HDMI_R_D2-

HDMI_R_CK-

HDMI_R_D0-

HDMI_TXD2-

HDMI_TXD2+

HDMI_TXD1+

HDMI_TXD1-

HDMI_TXD0-

HDMI_TXC+

HDMI_R_CK+

HDMI_R_CK+HDMI_R_CK-HDMI_R_D0+HDMI_R_D0-

HDMI_R_D2+HDMI_R_D2-HDMI_R_D1+HDMI_R_D1-

HDMI_HPD

HDMI_SCLKHDMI_SDATA

HDMI_TXC-

HDMI_TXD0+

APU_HDMI_CLK<6>

APU_HDMI_DATA<6>

APU_HDMI_TX0-<6>

APU_HDMI_TX0+<6>

APU_HDMI_TX2+<6>

APU_HDMI_TX2-<6>

APU_HDMI_CLK-<6>

APU_HDMI_CLK+<6>

APU_HDMI_TX1+<6>

APU_HDMI_TX1-<6>

HDMI_HPD <6,8>

+3VS

+HDMI_5V_OUT

+3VS

+HDMI_5V_OUT

+HDMI_5V_OUT

+5VS

+HDMI_5V_OUT

+5VS

+3VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-A551P 1.0

HDMI W/O CEC

21 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-A551P 1.0

HDMI W/O CEC

21 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-A551P 1.0

HDMI W/O CEC

21 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

Compal Electronics, Inc.

LY1

KINGCORE WCM-2012HS-900T

EMI@LY1

KINGCORE WCM-2012HS-900T

EMI@

11

22

33

44

RY5 0_0402_5%@

RY5 0_0402_5%@ 1 2

UY1

74AHCT1G125GW_SOT353-5

UY1

74AHCT1G125GW_SOT353-5

A2

Y4

OE

#1

G3

P5

LY3

KINGCORE WCM-2012HS-900T

EMI@LY3

KINGCORE WCM-2012HS-900T

EMI@

11

22

33

44

RY8 0_0402_5%@

RY8 0_0402_5%@ 1 2

RY7 0_0402_5%@

RY7 0_0402_5%@ 1 2

RPY3

499_8P4R_1%

RPY3

499_8P4R_1%

1 82 73 64 5

LY4

KINGCORE WCM-2012HS-900T

EMI@LY4

KINGCORE WCM-2012HS-900T

EMI@

11

22

33

44

RY1

1K_0402_5%

RY1

1K_0402_5%1 2

UY2

AP2151DWG-7_SOT25-5

UY2

AP2151DWG-7_SOT25-5

IN5

EN4

FLG3

OUT1

GND2

G

D

S

QY3

2N7002KW_SOT323-3

G

D

S

QY3

2N7002KW_SOT323-3

2

13

LY2

KINGCORE WCM-2012HS-900T

EMI@LY2

KINGCORE WCM-2012HS-900T

EMI@

11

22

33

44

CY2 0.1U_0402_16V7KCY2 0.1U_0402_16V7K1 2

DY30

YSLC05CH_SOT23-3

@ESD@DY30

YSLC05CH_SOT23-3

@ESD@

12

3

RPY2

4.7K_8P4R_5%

RPY2

4.7K_8P4R_5%

1 82 73 64 5

JHDMI

ACON_HMR2J-AK120C

Conn@JHDMI

ACON_HMR2J-AK120C

Conn@

HP_DET19

Utility14

D2+1 D2_shield2 D2-3 D1+4 D1_shield5 D1-6 D0+7 D0_shield8 D0-9 CK+

10 CK_shield11 CK-12 CEC13

DDC/CEC_GND17

SCL15 SDA16

+5V18

GND20

GND21

GND22

GND23

CY3 0.1U_0402_16V7KCY3 0.1U_0402_16V7K1 2

RPY4

499_8P4R_1%

RPY4

499_8P4R_1%

1 82 73 64 5

S

G

D

QY2BSH111_SOT23-3

S

G

D

QY2BSH111_SOT23-3

2

3 1

RY4 0_0402_5%@

RY4 0_0402_5%@ 1 2

CY7 0.1U_0402_16V7KCY7 0.1U_0402_16V7K1 2

RY10 0_0402_5%@

RY10 0_0402_5%@ 1 2

RY9 0_0402_5%@

RY9 0_0402_5%@ 1 2

S

G

D

QY1BSH111_SOT23-3

S

G

D

QY1BSH111_SOT23-3

2

3 1

CY6 0.1U_0402_16V7KCY6 0.1U_0402_16V7K1 2

RY6 0_0402_5%@

RY6 0_0402_5%@ 1 2

CY9 0.1U_0402_16V7KCY9 0.1U_0402_16V7K1 2

CY1 0.1U_0402_16V7KCY1 0.1U_0402_16V7K1 2

CY8 0.1U_0402_16V7KCY8 0.1U_0402_16V7K1 2

RY32.2K_0402_5%RY32.2K_0402_5%

12

CY40.1U_0402_16V4ZCY40.1U_0402_16V4Z

1

2

CY5 0.1U_0402_16V7KCY5 0.1U_0402_16V7K1 2

RY11 0_0402_5%@

RY11 0_0402_5%@ 1 2

ZZZ

HDMI W/Logo + HDCP

HDMI45@ZZZ

HDMI W/Logo + HDCP

HDMI45@

CY18

0.1U_0402_10V7K

CY18

0.1U_0402_10V7K

1

2

RY2100K_0402_5%

RY2100K_0402_5%

12

Page 22: LA-A551PR10 ZEMAE 20130716 - Kythuatphancung

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4+3V_LAN rising time (10%~90%) need > 1ms and <100ms.

LAN WOL LAN_EN ISOLATEB S0 Sx S0 Sx

---------------------------------------------- 0 0 0 0 1 1 0 1 0 0 1 1 1 0 1 1 1 1 1 1 1 1 1 0*

*S3: after SUSP# assert low over 100msS4/S5: after SYSON assert low over 100ms

For LAN function

WOL_EN#

Sx Enable

Wake up

LOW

Sx Disable

Wake up

HIGH

+3V_LAN > 40 mil

CL2,CL4 close to pin 8,30 respectivelyCL6 close to pin 30

Keep de-coupling capacitors close to

RTL8106E within 200 mil

CL8 close to Pin32CL20 close to Pin23

For ESD, keep close to RJ45 Connector

Change back to connect to LANGND only

on 20130201

+LAN_VDD10> 40 mil

main: SP050007T002nd: SP050007K003nd: SP050006H00

2013/5/3 EMI request change CL17 BOM structure to EMI@

2013/6/7 ESD request reserve DL14

2013/6/7 ESD request add DL5

ISOLATE#

LAN_MDI0+LAN_MDI1+

LAN_MDI1-

LAN_X2LAN_X1

PCIE_LANTX_C_ARX_P1PCIE_LANTX_C_ARX_N1

ISOLATE#

LAN_X2LAN_X1

LANGND

LANGND

RJ45_GND

RJ45_MIDI1-

RJ45_MIDI0+

RJ45_MIDI0-

RJ45_MIDI1+

LANCLK_REQ#

LAN_MDI0-

LANCLK_REQ#

LANCLK_REQ#

LAN_MDI0- RJ45_MIDI0-RJ45_MIDI0+LAN_MDI0+

LAN_MDI1-LAN_MDI1+

RJ45_MIDI1-RJ45_MIDI1+

LAN_MDI0+

LAN_MDI0- LAN_MDI1-

LAN_MDI1+

LANGND

CLKREQ_LAN#<8>

LAN_EN<8>

PCIE_LANTX_ARX_N1 <5>

WOL_EN# <27>

PCIE_LANTX_ARX_P1 <5>

PCIE_ATX_C_LANRX_P1 <5>PCIE_ATX_C_LANRX_N1 <5>

CLK_LAN<7>CLK_LAN#<7> APU_PCIE_WAKE# <8>

APU_PCIE_RST# <12,23,8>

+3VALW_APU +3V_LAN

+3VS

+3VS

+LAN_VDD10

+3V_LAN

+3V_LAN+LAN_VDD10

+3V_LAN

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-A551P 1.0

PCIe-LAN-RTL8106E

Custom

22 40Tuesday, July 16, 2013

2013/05/15 2015/09/27Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-A551P 1.0

PCIe-LAN-RTL8106E

Custom

22 40Tuesday, July 16, 2013

2013/05/15 2015/09/27Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-A551P 1.0

PCIe-LAN-RTL8106E

Custom

22 40Tuesday, July 16, 2013

2013/05/15 2015/09/27Compal Electronics, Inc.

RL433 0_0402_5%Rshort@RL433 0_0402_5%Rshort@1 2

CL1027P_0402_50V8J

CL1027P_0402_50V8J

1

2

UL1

RTL8106E-CG_QFN32_4X48106E@

UL1

RTL8106E-CG_QFN32_4X48106E@

MDIP01

MDIP14

MDIN02

MDIN15

AVDD108

AVDD1030

AVDD3332

DVDD3323

REFCLK_P15

REFCLK_N16

CLKREQB12

CKXTAL128

CKXTAL229

LED027

LED125

RSET31

GND33

HSOP17

HSON18

HSIP13

HSIN14

PERSTB19

ISOLATEB20

LANWAKEB21

GPO26

NC3

NC6

NC7

NC9

NC10

NC11

NC22

NC24

JRJ45

SANTA_130456-491Conn@

JRJ45

SANTA_130456-491Conn@

PR1-2

PR1+1

PR2+3

PR3+4

PR3-5

PR2-6

PR4+7

PR4-8

GND9

GND10

UL3

10/100M transformer_NS681612A8106E@

SP050007T00UL3

10/100M transformer_NS681612A8106E@

SP050007T00

TD+1

TD-2

CT3

CT6

RD+7

RD-8

RX-9RX+10CT11

CT14TX-15TX+16

NC4

NC5 NC

13

NC12

CL20 0.1U_0402_10V7KCL20 0.1U_0402_10V7K

1 2

RL24 10K_0402_5%RL24 10K_0402_5%12

CL21 0.1U_0402_10V7KCL21 0.1U_0402_10V7K

1 2

DL2

AZC099-04S.R7G_SOT23-6

ESD@DL2

AZC099-04S.R7G_SOT23-6

ESD@

I/O46

VDD5

I/O34

I/O23

GND2

I/O11

PJ77

JUMP_43X39

@PJ77

JUMP_43X39

@

11

22

RL81K_0402_5%

@RL81K_0402_5%

@

12

T103PAD TP@T103PAD TP@

T101 PADTP@T101 PADTP@

CL15

0.1U_0402_25V6

CL15

0.1U_0402_25V6

1

2

DL4@ESD@

CK0402101V05_0402-2

DL4@ESD@

CK0402101V05_0402-2

12

CL927P_0402_50V8JCL927P_0402_50V8J

1

2

YL1 25MHZ_20PF_7V25000016YL1 25MHZ_20PF_7V25000016

GND

2

33

11

GND

4

T102 PADTP@T102 PADTP@

CL17

220P_0603_50V8J

EMI@ CL17

220P_0603_50V8J

EMI@

12

CL16

1000P_1206_2KV7K

CL16

1000P_1206_2KV7K

1 2

RL12.49K_0402_1% RL12.49K_0402_1%

1 2

CL18 0.1U_0402_10V7KCL18 0.1U_0402_10V7K1 2

RL915K_0402_5%RL915K_0402_5%

RL5

75_0603_1%

RL5

75_0603_1%

1 2

CL4 0.1U_0402_10V7KCL4 0.1U_0402_10V7K

1 2

DL5

L03ESDL5V0CG3-2_SOT-523-3

ESD@DL5

L03ESDL5V0CG3-2_SOT-523-3

ESD@

11

22

33

CL8 0.1U_0402_10V7KCL8 0.1U_0402_10V7K

1 2

G

D S

QL53

2N7002KW_SOT323-3

G

D S

QL53

2N7002KW_SOT323-3

2

1 3

DL1

YSLC05CH_SOT23-3

ESD@DL1

YSLC05CH_SOT23-3

ESD@

12

3

CL2 0.1U_0402_10V7KCL2 0.1U_0402_10V7K

1 2

RL6

75_0603_1%

RL6

75_0603_1%

1 2

CL6 1U_0402_6.3V6KCL6 1U_0402_6.3V6K

1 2

Page 23: LA-A551PR10 ZEMAE 20130716 - Kythuatphancung

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Slot 1 Half PCIe Mini Card-WLAN

SATA HDD Conn.

40 mils

Enable Disable

H L

BT

on module

BT

on module

WLAN&BT Combo module circuits

BT_ON

For isolate BT_CTRL and

Compal Debug Card.

From ECBT

Debug card using

Close to JHDD

Place closely JHDD SATA CONN. 1.2A

E51_RXDBT_ON

E51_TXDE51_RXD

BT_CTRL_RBT_ON

SATA_DTX_ARX_P0SATA_DTX_ARX_N0

SATA_ATX_C_DRX_P0SATA_ATX_C_DRX_N0

BT_ON<27>USB20_P1 <7>USB20_N1 <7>

CLKREQ_WLAN#<8>

CLK_WLAN#<7>CLK_WLAN<7>

PCIE_WLANTX_ARX_P2<5>PCIE_WLANTX_ARX_N2<5>

PCIE_ATX_C_WLANRX_N2<5>PCIE_ATX_C_WLANRX_P2<5>

APU_PCIE_RST# <12,22,8>

APU_SCLK0 <10,11,8>APU_SDATA0 <10,11,8>

E51_TXD<27>E51_RXD<27>

WL_OFF# <27>

SATA_DTX_C_ARX_P0 <7>

SATA_ATX_DRX_P0 <7>SATA_ATX_DRX_N0 <7>

SATA_DTX_C_ARX_N0 <7>

+3V_WLAN

+3VS+3V_WLAN

+3V_WLAN

+3V_WLAN

+5VS

+5VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-A551P 1.0

WLAN/SATA HDD&ODD

23 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-A551P 1.0

WLAN/SATA HDD&ODD

23 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-A551P 1.0

WLAN/SATA HDD&ODD

23 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

Compal Electronics, Inc.

RM21K_0402_5%

RM21K_0402_5%1 2

JWLAN

LCN_DAN08-52406-0500Conn@

JWLAN

LCN_DAN08-52406-0500Conn@

11

33

55

77

99

1111

1313

1515

1717

1919

2121

2323

2525

2727

2929

3131

3333

3535

3737

3939

4141

4343

4545

4747

4949

5151

GND153

22

44

66

88

1010

1212

1414

1616

1818

2020

2222

2424

2626

2828

3030

3232

3434

3636

3838

4040

4242

4444

4646

4848

5050

5252

GND254

C18510U_0805_6.3V6MC18510U_0805_6.3V6M

12

C198 0.01U_0402_25V7KC198 0.01U_0402_25V7K1 2

CM1

0.1U_0402_10V7K

CM1

0.1U_0402_10V7K

1

2

C1860.1U_0402_10V7KC1860.1U_0402_10V7K

1

2

C194 0.01U_0402_25V7KC194 0.01U_0402_25V7K1 2

PJ11

JUMP_43X39

@

PJ11

JUMP_43X39

@

2 1

CM2

0.1U_0402_10V7K

CM2

0.1U_0402_10V7K

1

2

JHDD

ACES_50208-00801-003

Conn@JHDD

ACES_50208-00801-003

Conn@

1122334455667788

GND9GND10

RM10_0402_5%@

RM10_0402_5%@

1 2

CM3

4.7

U_0603_6.3

V6K

CM3

4.7

U_0603_6.3

V6K

1

2

C196 0.01U_0402_25V7KC196 0.01U_0402_25V7K1 2

C195 0.01U_0402_25V7KC195 0.01U_0402_25V7K1 2

C1870.1U_0402_10V7KC1870.1U_0402_10V7K

1

2

Page 24: LA-A551PR10 ZEMAE 20130716 - Kythuatphancung

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

W=80mils2.0A

SA00003TV00

SA00003XM00

Change ESD Diode for EMI request

Change ESD Diode for EMI request

USB POWER SWITH

W=80mils

Sleep & Charge Port

USB Sleep & Charge Right side USB 3.0 x 1 W/ Sleep&Charge

W=100mils

W=100mils

W=80mils

W=100milsW=100mils 2.5A

Right side USB 3.0 x 1 W=100mils

Close to UR4 IN/OUT

Mode

Auto/Alternate

SDP

CDP

State table for TPS2546RTER

ILIM_SELCB2 STATUS

Auto-detection charger mode for Apple device(2A,1A).

Resistor dividers are connected to DP/DM. Including DCP

USB pass-through mode.DP/DM are connected to TDP/TDM

USB pass-through mode with CDP emulation.

DP/DM are connected to TDP/TDM

CB1CB0

1

1

1

1

1

0 1 1

1

1

0

1

USB30_RX0N_L

USB30_RX0P_L

USB30_TX0P_C_L

USB30_TX0N_C_L

USB30_RX0N_L

USB30_TX1N_C_L

USB30_TX1P_C_L

USB30_TX0P_C_L

USB30_TX0N_C_L

USB30_RX0P_L

USB30_RX1N_L

USB30_RX1P_L

USB30_TX1N_C_L

USB30_TX1P_C_L

USB30_RX1N_L

USB30_RX1P_L

USB20_DP9 USB20_P9_L

USB20_N9_LUSB20_DN9USB30_RX1N

USB30_TX1P_C

USB30_RX1P USB30_RX1P_L

USB30_RX1N_L

USB30_TX1P_C_L

USB30_TX1N_C_LUSB30_TX1N_CUSB20_P9_LUSB20_N9_L

USB30_TX1N_C_LUSB30_TX1P_C_L

USB30_RX1P_LUSB30_RX1N_L

USB20_N8

USB20_P8 USB20_P8_L

USB20_N8_L

USB30_TX0N_C

USB30_TX0P_C

USB30_RX0P

USB30_RX0N

USB30_RX0P_L

USB30_RX0N_L

USB30_TX0P_C_L

USB30_TX0N_C_L

USB20_P8_LUSB20_N8_L

USB30_TX0N_C_LUSB30_TX0P_C_L

USB30_RX0P_LUSB30_RX0N_L

EC_CHG_CB0EC_CHG_CB1 ILIM_HI

ILIM_LO

EC_CHG_CB2

USB20_DN9USB20_DP9

EC_CHG_CB0EC_CHG_CB1EC_CHG_CB2

USB_EN#0<27>

USB30_TX1P<7>

USB30_RX1P<7>

USB30_TX1N<7>

USB30_RX1N<7>

USB_OC#0 <27,8>

USB20_N8<7>

USB20_P8<7>

USB30_RX0P<7>

USB30_RX0N<7>

USB30_TX0N<7>

USB30_TX0P<7>

USB_CHG_EN<27>

USB_CHG_OC#<27,8>

EC_CHG_CB0<27>EC_CHG_CB1<27>

ILIM_SEL<27>USB20_P9 <7>USB20_N9 <7>

EC_CHG_CB2<27>

+USB_VCCB+5VALW

+USB_VCCB

+USB_VCCA

+USB_VCCA

+USB_VCCB

+5VALW +USB_VCCA

+5VALW

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-A551P 1.0

LUSB/RUSB/S&C

24 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-A551P 1.0

LUSB/RUSB/S&C

24 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-A551P 1.0

LUSB/RUSB/S&C

24 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

Compal Electronics, Inc.

LR2

WCM-2012-900T_0805

EMI@LR2

WCM-2012-900T_0805

EMI@

11

22

33

44

CR16 0.1U_0402_16V7KCR16 0.1U_0402_16V7K1 2

RR520K_0402_1%

RR520K_0402_1%

12

T10 PADTP@T10 PADTP@

CR6

22

U_

06

03

_6

.3V

6M

CR6

22

U_

06

03

_6

.3V

6M

1

2

8

7

65

4

3

2

1

9

10

DR3

YSCLAMP0524P_SLP2510P8-10-9

@ESD@

SC300002800

8

7

65

4

3

2

1

9

10

DR3

YSCLAMP0524P_SLP2510P8-10-9

@ESD@

SC300002800

4

5

1

6

2

7

3

9

8

CR10

22

U_

06

03

_6

.3V

6M

CR10

22

U_

06

03

_6

.3V

6M

1

2

CR9

4.7

U_

06

03

_6

.3V

6K

@CR9

4.7

U_

06

03

_6

.3V

6K

@

1

2

UR4

TPS2544RTER_QFN16_3X3TPS2544@

UR4

TPS2544RTER_QFN16_3X3TPS2544@

T11 PADTP@T11 PADTP@LR1

KINGCORE WCM-2012HS-670T

EMI@LR1

KINGCORE WCM-2012HS-670T

EMI@

11

22

33

44

8

7

65

4

3

2

1

9

10

DR1

YSCLAMP0524P_SLP2510P8-10-9

@ESD@

SC300002800

8

7

65

4

3

2

1

9

10

DR1

YSCLAMP0524P_SLP2510P8-10-9

@ESD@

SC300002800

4

5

1

6

2

7

3

9

8

LR5

WCM-2012-900T_0805

EMI@LR5

WCM-2012-900T_0805

EMI@

11

22

33

44

CR18 0.1U_0402_16V7KCR18 0.1U_0402_16V7K1 2

RR1120K_0402_1%

RR1120K_0402_1%

12

T24 PADTP@T24 PADTP@

CR13

4.7

U_

06

03

_6

.3V

6K

@CR13

4.7

U_

06

03

_6

.3V

6K

@

1

2

CR11

0.1

U_

04

02

_1

0V

7K

CR11

0.1

U_

04

02

_1

0V

7K

1

2

CR7

0.1

U_

04

02

_1

0V

7K

CR7

0.1

U_

04

02

_1

0V

7K

1

2

LR3

KINGCORE WCM-2012HS-670T

EMI@LR3

KINGCORE WCM-2012HS-670T

EMI@

11

22

33

44

LR6

KINGCORE WCM-2012HS-670T

EMI@LR6

KINGCORE WCM-2012HS-670T

EMI@

11

22

33

44

CR17 0.1U_0402_16V7KCR17 0.1U_0402_16V7K1 2

CR8

0.1

U_

04

02

_1

0V

7K@

CR8

0.1

U_

04

02

_1

0V

7K@

1

2

CR4

22

U_

06

03

_6

.3V

6M

CR4

22

U_

06

03

_6

.3V

6M

1

2

CR15 0.1U_0402_16V7KCR15 0.1U_0402_16V7K1 2

CR5

22

U_

06

03

_6

.3V

6M

CR5

22

U_

06

03

_6

.3V

6M

1

2

UR4

TPS2546RTER_QFN16_3X3TPS2546@

UR4

TPS2546RTER_QFN16_3X3TPS2546@

IN1

STATUS#9

FAULT#13

ILIM_SEL4

EN5

CTL16

CTL27

CTL38

OUT12

DP_IN10

DM_IN11

DM_OUT2

DP_OUT3

ILIM_LO15

ILIM_HI16

GND14

T-PAD17

JUSBR

SINGA_2UB3914-000101F

Conn@JUSBR

SINGA_2UB3914-000101F

Conn@

VBUS1

D-2

D+3

GND4

StdA-SSRX-5

StdA-SSRX+6

GND-DRAIN7

StdA-SSTX-8

StdA-SSTX+9

GND10

GND11

GND12

GND13

JUSBF

SINGA_2UB3914-000101F

Conn@JUSBF

SINGA_2UB3914-000101F

Conn@

VBUS1

D-2

D+3

GND4

StdA-SSRX-5

StdA-SSRX+6

GND-DRAIN7

StdA-SSTX-8

StdA-SSTX+9

GND10

GND11

GND12

GND13

LR4

KINGCORE WCM-2012HS-670T

EMI@LR4

KINGCORE WCM-2012HS-670T

EMI@

11

22

33

44

UR2

SY6288DCAC_MSOP8

UR2

SY6288DCAC_MSOP8

GND1

IN2

IN3

EN/ENB4

OCB5

OUT6

OUT7

OUT8

Page 25: LA-A551PR10 ZEMAE 20130716 - Kythuatphancung

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Left USB 2.0 x 1

SA00003TV00SA00003XM00

W=80mils

2.0A

SPK Conn.

Small board Conn

Close to JSB5

TP_I2CSDA1TP_I2CSCL1

EXT_MIC_LNBA_PLUG

LID_SW#BATT_FULL_LED#

PWR_SUSP_LED#WL_BT_LED#

BATT_CHG_LOW_LED#

TP_DATATP_CLK

TP_I2CSDA1TP_I2CSCL1

USB20_N2_RUSB20_N2USB20_P2_RUSB20_P2 USB20_P2_R5

USB20_N2_R5

TP_I2CSCL1

TP_I2CSDA1

USB20_N0 USB20_N0_RUSB20_P0_RUSB20_P0

USB20_N0_R5USB20_P0_R5

PLPR

USB20_N2USB20_P2

USB20_N0USB20_P0

USB_OC#2 <27,8>USB_EN#2<27>

SPK_R1<26>SPK_R2<26>

SPK_L1<26>SPK_L2<26>

NBA_PLUG<26>

BATT_FULL_LED#<27>BATT_CHG_LOW_LED#<27>

PWR_SUSP_LED#<27>WL_BT_LED#<27>

LID_SW#<27>

TP_DATA<27>TP_CLK<27>

EXT_MIC_L<26>

USB20_P2<7>USB20_N2<7>

APU_SCLK1 <8>

APU_SDATA1 <8>

USB20_P0<7>USB20_N0<7>

PR<26>PL<26>

+USB_VCCC+5VALW

+USB_VCCC

+5VALW +5VALW

+USB_VCCC

+3VS

+3VS

+3VL

+3VS

+3VL

+3VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-A551P 1.0

USB-CardReader Genesys GL834L

Custom

25 40Tuesday, July 16, 2013

2013/05/15 2015/09/27Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-A551P 1.0

USB-CardReader Genesys GL834L

Custom

25 40Tuesday, July 16, 2013

2013/05/15 2015/09/27Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-A551P 1.0

USB-CardReader Genesys GL834L

Custom

25 40Tuesday, July 16, 2013

2013/05/15 2015/09/27Compal Electronics, Inc.

R2984.7K_0402_5%

R2984.7K_0402_5%

12

LR7

WCM-2012-900T_0805

14_EMI@LR7

WCM-2012-900T_0805

14_EMI@

11

22

33

44

R2994.7K_0402_5%R2994.7K_0402_5%

12

LR9

WCM-2012-900T_0805

15_EMI@LR9

WCM-2012-900T_0805

15_EMI@

11

22

33

44

UR3

SY6288DCAC_MSOP8

UR3

SY6288DCAC_MSOP8

GND1

IN2

IN3

EN/ENB4

OCB5

OUT6

OUT7

OUT8

C18 0.1U_0402_10V7K

15_EMI@

C18 0.1U_0402_10V7K

15_EMI@

1 2

JSPK

E&T_3802-F04N-01RConn@

JSPK

E&T_3802-F04N-01RConn@

11

22

33

44

G15

G26

LR10

WCM-2012-900T_0805

15_EMI@LR10

WCM-2012-900T_0805

15_EMI@

11

22

33

44

LR8

WCM-2012-900T_0805

14_EMI@LR8

WCM-2012-900T_0805

14_EMI@

11

22

33

44

JSB5

ACES_51522-03001-P01

Conn@JSB5

ACES_51522-03001-P01

Conn@

GND31

11

22

33

44

55

66

77

88

99

1010

1111

1212

1313

1414

1515

1616

1717

1818

1919

2020

2121

2222

2323

2424

2525

2626

2727

2828

2929

3030

GND32

Q8BDMN66D0LDW-7 2N_SOT363-6

Q8BDMN66D0LDW-7 2N_SOT363-6

3

5

4

JSB4

ACES_51522-03001-P01

Conn@JSB4

ACES_51522-03001-P01

Conn@

GND31

11 22 33 44 55 66 77 88 99 10

10 1111 1212 1313 1414 1515 1616 1717 1818 1919 2020 2121 2222 2323 2424 2525 2626 2727 2828 2929 3030

GND32

Q8ADMN66D0LDW-7 2N_SOT363-6

Q8ADMN66D0LDW-7 2N_SOT363-6

61

2

Page 26: LA-A551PR10 ZEMAE 20130716 - Kythuatphancung

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

For EMI reserve

Ext. MIC

Function

Headphone out

10K

SENSE A

5.1K

20K

39.2K

10K

20K

39.2K

Sense Pin

PORT-H (PIN 20)

Impedance

(PIN 48)

PORT-C (PIN 23, 24)

PORT-E (PIN 14, 15)

PORT-F (PIN 16, 17)SENSE B

PORT-B (PIN 21, 22)

PORT-I (PIN 32, 33)

Codec Signals

1W 8ohm =20mil2W 4ohm =40mil

For EMI reserve close to codec

close to pin19

close to pin 25 close to pin 38

Beep sound

PCI Beep

EC_MUTE#HightLOW

Internal AMP

EnableDisable

SPK

AGND

35mA for 3.3V level

close to pin39

close to pin 28

DGND

close to pin46

For EMI reserveclose to codec

60 mil

40 mil20 mil650mA for 5V level

close to pin1

10 mil

For better soundby customer request

HDALink is 1.5V

close to pin9

Combo Jack

place close to chip

INT_MIC_CLK_R

SPKR+

SPKL-

SPKL+

SPKR-

LDO_CAP

MIC1_LINE1_R_L

AC_VREF

+AVDD

+AVDD

INT_MIC_CLK_R

AZ_SDIN0_HD_R

+DVDD

AC_JDREF

MIC1_LINE1_R_C_R+DVDD_IO

MONO_IN

CBN

MONO_IN

+PVDD

MIC1_LINE1_R_R

+AVDD

SPKL-SPKL+

SPKR-SPKR+

HPOUT_RHPOUT_L

SENSE_A

CPVEE

AZ_BITCLK_HD

+PVDD

MIC1_LINE1_R_C_L

SENSE_B

AZ_BITCLK_HD

+PVDD

+DVDD

CBP

+DVDD_IO

EXT_MIC

MIC1_LINE1_R_L

HP_L

HP_R

MIC1_LINE1_R_R

SENSE_A

COMBO_GPI

COMBO_GPI

HP_RHP_L

APU_SPKR<8>

EC_MUTE#<27>

INT_MIC_DATA<20>

AZ_BITCLK_HD <8>

AZ_SDOUT_HD <8>

AZ_SDIN0_HD <8>

AZ_SYNC_HD<8>

AZ_RST_HD#<8>

SPK_L1 <25>

SPK_L2 <25>

SPK_R1 <25>

INT_MIC_CLK<20>

SPK_R2 <25>

EC_MUTE_INT<27>

EXT_MIC_L <25>

PR <25>

PL <25>

NBA_PLUG<25>

+3VS

+MIC1_VREFO_L

+1.5VS

+MIC1_VREFO_L

+5VS

+5VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

1.0

Cover Sheet

Custom

26 40Tuesday, July 16, 2013

2013/05/15 2015/09/27Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

1.0

Cover Sheet

Custom

26 40Tuesday, July 16, 2013

2013/05/15 2015/09/27Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

1.0

Cover Sheet

Custom

26 40Tuesday, July 16, 2013

2013/05/15 2015/09/27Compal Electronics, Inc.

CA584.7U_0603_6.3V6K CA584.7U_0603_6.3V6K

CA330.1U_0402_10V7K

CA330.1U_0402_10V7K

1

2

LA8MURATA BLM18KG601SN1D 0603

EMI@LA8MURATA BLM18KG601SN1D 0603

EMI@1 2

CA54 2.2U_0402_6.3V6MCA54 2.2U_0402_6.3V6M

1 2

RA34 20K_0402_1%@

RA34 20K_0402_1%@ 12

RA7 MURATA BLM18EG221SN1D 0603

EMI@

RA7 MURATA BLM18EG221SN1D 0603

EMI@1 2

UA1

ALC259-VC2-CG_MQFN48_6X6259@

UA1

ALC259-VC2-CG_MQFN48_6X6259@

LINE2_L14 LINE2_R15

MIC2_R17

MIC2_L16

LINE1_R24LINE1_L23

SENSE_B18

MONO_OUT20

JDREF19

MIC1_L21 MIC1_R22

SENSE_A13

PCBEEP12

CBN35

CBP36

AVSS237

RESET#11

SYNC10

BCLK6

SDATA_OUT5

SDATA_IN8

GPIO0/DMIC_DATA2

GPIO1/DMIC_CLK3

MIC2_VREFO29 MIC1_VREFO_R30

LDO_CAP28

VREF27

DVDD1

DVDD_IO9

AVDD125

AVDD238

HPOUT_L32

PVDD246

EAPD47

NC48

PD#4

DVSS7

MIC1_VREFO_L31

HPOUT_R33

CPVEE34

PVSS243

SPK_OUT_R-44SPK_OUT_R+45

SPK_OUT_L+40

AVSS126

PVSS142

PVDD139

SPK_OUT_L-41

Thermal Pad49

CA36

1000P_0402_50V7K

@EMI@

CA36

1000P_0402_50V7K

@EMI@

1

2

CA50

0.1U_0402_10V7K

CA50

0.1U_0402_10V7K

1

2

CA550.1U_0402_10V7KCA550.1U_0402_10V7K

1

2

CA60 10U_0603_6.3V6MCA60 10U_0603_6.3V6M

1 2

CA51

10P_0402_50V8J

@EMI@CA51

10P_0402_50V8J

@EMI@1 2

CA3510U_0603_6.3V6MCA3510U_0603_6.3V6M1

2

CA42

10U_0603_6.3V6M

CA42

10U_0603_6.3V6M 1

2

RA1 0_0402_5%

Rshort@

RA1 0_0402_5%

Rshort@1 2

CA650.01U_0402_25V7K

@ESD@

CA650.01U_0402_25V7K

@ESD@

1 2

CA320.1U_0402_10V7K

CA320.1U_0402_10V7K

1

2

CA27100P_0402_50V8J

CA27100P_0402_50V8J

RA42FBMA-10-100505-301T

CAM_EMI@

RA42FBMA-10-100505-301T

CAM_EMI@

CA74

10

0P

_0

40

2_

50

V8

J

@EMI@

CA74

10

0P

_0

40

2_

50

V8

J

@EMI@

1

2

CA47

0.1U_0402_10V7K

CA47

0.1U_0402_10V7K

1

2

CA75

10

0P

_0

40

2_

50

V8

J

@EMI@

CA75

10

0P

_0

40

2_

50

V8

J

@EMI@

1

2

CA45

0.1U_0402_16V4Z

CA45

0.1U_0402_16V4Z

1

2

RA45 0_0603_5%@

RA45 0_0603_5%@1 2

RA35 1K_0402_5%RA35 1K_0402_5%

1 2

CA70

0.1U_0402_10V7K

CA70

0.1U_0402_10V7K

1 2

RA61 39.2K_0402_1%RA61 39.2K_0402_1%

RA46 0_0603_5%@

RA46 0_0603_5%@1 2

RA23 33_0402_5%RA23 33_0402_5%

12

CA

69

10

0P

_0

40

2_

50

V8

J

CA

69

10

0P

_0

40

2_

50

V8

J

1

2

CA252.2U_0603_10V6K

CA252.2U_0603_10V6K

12

RA4110_0402_5%@EMI@

RA4110_0402_5%@EMI@ 12

RA31 0_0603_5%@EMI@RA31 0_0603_5%@EMI@

1 2

CA53 2.2U_0402_6.3V6MCA53 2.2U_0402_6.3V6M

1 2

RA8 MURATA BLM18EG221SN1D 0603

EMI@

RA8 MURATA BLM18EG221SN1D 0603

EMI@1 2

RA21 0_0603_5%

Rshort@

RA21 0_0603_5%

Rshort@1 2

RA9 MURATA BLM18EG221SN1D 0603

EMI@

RA9 MURATA BLM18EG221SN1D 0603

EMI@1 2

LA7MURATA BLM18KG601SN1D 0603

EMI@LA7MURATA BLM18KG601SN1D 0603

EMI@1 2

RA10 MURATA BLM18EG221SN1D 0603

EMI@

RA10 MURATA BLM18EG221SN1D 0603

EMI@1 2

RA1975_0402_1%

RA1975_0402_1%

CA30

1000P_0402_50V7K

@EMI@

CA30

1000P_0402_50V7K

@EMI@

1

2

RA52

47K_0402_5%

RA52

47K_0402_5%

1 2

RA49

4.7K_0402_5%

RA49

4.7K_0402_5%

12

CA574.7U_0603_6.3V6K CA574.7U_0603_6.3V6KRA22 0_0402_5%

Rshort@

RA22 0_0402_5%

Rshort@1 2

CA34

1000P_0402_50V7K

@EMI@

CA34

1000P_0402_50V7K

@EMI@

1

2

CA37

10U_0603_6.3V6M

CA37

10U_0603_6.3V6M

1

2

CA31

1000P_0402_50V7K

@EMI@

CA31

1000P_0402_50V7K

@EMI@

1

2

RA2075_0402_1%

RA2075_0402_1%

RA69 2.2K_0402_5%RA69 2.2K_0402_5%1 2

RA30 20K_0402_1%RA30 20K_0402_1%

12

RA71

22K_0402_5%

RA71

22K_0402_5%

1 2

CA48

10U_0603_6.3V6M

CA48

10U_0603_6.3V6M

1

2

RA

70

22

K_

04

02

_5

%RA

70

22

K_

04

02

_5

%

12

RA43 0_0603_5%@

RA43 0_0603_5%@1 2

LA6MURATA BLM18KG601SN1D 0603

EMI@LA6MURATA BLM18KG601SN1D 0603

EMI@1 2

RA38 0_0603_5%@EMI@RA38 0_0603_5%@EMI@

1 2

CA40.1U_0402_16V4Z

CA40.1U_0402_16V4Z

1

2CA32.2U_0402_6.3V6MCA32.2U_0402_6.3V6M

1

2

RA25 0_0603_5%

Rshort@

RA25 0_0603_5%

Rshort@1 2

Page 27: LA-A551PR10 ZEMAE 20130716 - Kythuatphancung

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Compal Electronics, Inc.

For EMI

Close to EC

VCIN0_PH connect to

power portion (9012 only)

VCOUT0_PH connect to power portion (9012 only)

For KB9012 EC_ON low pulse work around

Voltage Comparator Pins FOR 9012 A3

VCIN0 pin109

VCIN1 pin102

LOW

>1.2V <1.2V

HIGH

VCOUT0 pin104

VCOUT1 pin103 LOW

HIGH

High Active

Low Active (+3.3V)

Nuvoton EC share ROM

EC SMBus2 for S0 , SMBus1 for S5

SMBUS1->BATT, Smart Charger

SMBUS2->G-Sensor,GPU Thermal Sensor,

APU Thermal Sensor

P.32_SYS_PWRGD OD/L

for 1.8V PU APU

PBTN_OUT#

H/L, no PU/PD

H_PROCHOT_EC

H/L, no PU/PD

close to APU

20130417 Note. 2013 ENE EC change version

A3 (SA00004OB20) to A4 (SA00004OB30)

CLK_PCI_EC

EC_RST#

EC_SMB_DA1EC_SMB_CK1

SYSON

TP_DATATP_CLK

EC_RST#

KSO2

KSO4KSO5

KSO0KSO1

KSO8

KSO10

KSO12

KSO3

KSO6

KSO9

KSO15KSO14KSO13

KSO7

KSO11

E51_TXD

KSI5

KSI2

KSI4

KSI0KSI1

KSI3

KSI7KSI6

EC_SMB_DA2

EC_SMB_CK1EC_SMB_DA1EC_SMB_CK2

KSI[0..7]

KSO[0..17]

EC_SMB_CK2EC_SMB_DA2

+EC_V18R

SUSP#

VR_ON

E51_TXD

SUSP#

SUSP#

XCLKO

H_PROCHOT_ECVCOUT0_PH_L

EC_ON_R

LID_SW#

VCOUT0_PH_L

LID_SW#

APU_PROCHOT#

H_PROCHOT_EC

EC_MUTE_INT_R

885_EC_ON

EC_ON_R

885_EC_ON

VR_ONSYSONTP_DATATP_CLK

1.8_0.95VALW_PWREN

EC_MUTE_INT_R

APU_PROCHOT#

SYS_PWRGD

1.8_0.95VALW_PWREN

ILIM_SEL

ILIM_SEL

KSO16KSO17

ACIN <32>

GATEA20<8>

LPC_AD2<7>LPC_AD1<7>LPC_AD0<7>

LPC_FRAME#<7,8>

KB_RST#<8>

LPC_AD3<7>

LPC_RST#<8>

BATT_FULL_LED# <25>

BKOFF# <20>

TP_DATA <25>TP_CLK <25>

SYSON <29,34>

CLK_PCI_EC<7,8>

EC_SMB_DA1<31,32>EC_SMB_CK1<31,32>

EC_SMI#<8>

EC_SCI#<8>

EC_SMB_DA2<13,6>EC_SMB_CK2<13,6>

SLP_S3#<8>

E51_TXD<23>

BATT_PRES <31>

KSI[0..7]<28>

KSO[0..17]<28>

ADP_I <31,32>

SERIRQ<7>

E51_RXD<23>

EC_RSMRST# <8>EC_LID_OUT# <8>

SUSP# <29,34>

VR_ON <36>

EC_MUTE# <26>

RTC_CLK<8>

BATT_CHG_LOW_LED# <25>

VS_ON <33>

PBTN_OUT# <8>

VCIN0_PH <31>

ON/OFFBTN# <28>LID_SW# <25>

SLP_S5#<8>

FAN_SPEED1<5>

APU_PROCHOT# <36,6>

WL_BT_LED# <25>

USB_EN#2<25>

WL_OFF#<23>

USB_CHG_EN<24>

CAPS_LED# <28>PWR_SUSP_LED# <25>

LCD_ENBKL <20,6>

KB_LED<28>

USB_CHG_OC#<24,8>

ADP_V <32>

SYS_PWRGD<8>

EC_SPICS# <7>EC_SPICLK <7>

EC_SPIDI <7>EC_SPIDO <7>

VGATE <36>

USB_OC#2<25,8>

USB_OC#0 <24,8>

EC_PXCONTROL <8>

EC_ON <33>

WOL_EN# <22>

BT_ON<23>

PROCHOT_IN <31>

0.95VS_PWREN#<29>

USB_EN#0 <24>

GPU_DOWN# <13>

EC_MUTE_INT<26>

EC_CHG_CB0 <24>EC_CHG_CB1 <24>

POK <33>

1.8_0.95VALW_PWREN <35>

3VALW_APU_PWREN <29,33>

DFAN1 <5>

ILIM_SEL <24>

NUM_LED#<28>

EC_CHG_CB2 <24>

+3VL

+3VL

+3VL

+3VL

+3VS

+3VL

+3VL

+3VS

+3VALW_APU

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-A551P 1.0

LPC-EC-KB9012

27 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-A551P 1.0

LPC-EC-KB9012

27 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-A551P 1.0

LPC-EC-KB9012

27 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

Compal Electronics, Inc.

RB20 0_0402_5%Rshort@

RB20 0_0402_5%Rshort@1 2

CB30.1U_0402_10V7K

CB30.1U_0402_10V7K1 2

RB22100K_0402_5%

RB22100K_0402_5%

12

RB26 10K_0402_5%RB26 10K_0402_5%

1 2

RB36 0_0402_5%

9012@

RB36 0_0402_5%

9012@1 2

RB35 47K_0402_5%RB35 47K_0402_5%

1 2

DB1

@ESD@

SCV00001K00

DB1

@ESD@

SCV00001K00

12

RB284.7K_0402_5%

RB284.7K_0402_5%

1 2

CB10.1U_0402_10V7K

CB10.1U_0402_10V7K

1

2

RB25 0_0402_5%Rshort@

RB25 0_0402_5%Rshort@1 2

CB154.7U_0805_10V4ZCB154.7U_0805_10V4Z

1

2

CB5

0.1U_0402_10V7K

CB5

0.1U_0402_10V7K

1

2

CB50

1U_0402_6.3V6K

@CB50

1U_0402_6.3V6K

@

1

2

CB4

0.1U_0402_10V7K

CB4

0.1U_0402_10V7K

1

2

RB2310K_0402_5%@

RB2310K_0402_5%@ 12

LPC & MISC

Int. K/B Matrix

SM Bus

GPIO

GPIO

AD Input

PWM Output

DA Output

PS2 Interface

SPI Device Interface

SPI Flash ROM

GPO

GPI

UB1

KB9012QF-A4_LQFP128_14X14

LPC & MISC

Int. K/B Matrix

SM Bus

GPIO

GPIO

AD Input

PWM Output

DA Output

PS2 Interface

SPI Device Interface

SPI Flash ROM

GPO

GPI

UB1

KB9012QF-A4_LQFP128_14X14

GATEA20/GPIO001

KBRST#/GPIO012

SERIRQ3

LPC_FRAME#4

LPC_AD35

PM_SLP_S3#/GPIO046

LPC_AD27

LPC_AD18

EC

_V

DD

/VC

C9

LPC_AD010

GN

D/G

ND

11

CLK_PCI_EC12

PCIRST#/GPIO0513

PM_SLP_S5#/GPIO0714

EC_SMI#/GPIO0815

GPIO0A16

GPIO0B17

GPIO0C18

GPIO0D19

EC_SCII#/GPIO0E20

GPIO0F21

EC

_V

DD

/VC

C2

2

BEEP#/GPIO1023

GN

D/G

ND

24

EC_INVT_PWM/GPIO1125

GPIO1226

ACOFF/GPIO1327

FAN_SPEED1/GPIO1428

EC_PME#/GPIO1529

EC_TX/GPIO1630

EC_RX/GPIO1731

PCH_PWROK/GPIO1832

EC

_V

DD

/VC

C3

3

SUSP_LED#/GPIO1934

GN

D/G

ND

35

NUM_LED#/GPIO1A36

EC_RST#37

GPIO1D38

KSO0/GPIO2039

KSO1/GPIO2140

KSO2/GPIO2241

KSO3/GPIO2342

KSO4/GPIO2443

KSO5/GPIO2544

KSO6/GPIO2645

KSO7/GPIO2746

KSO8/GPIO2847

KSO9/GPIO2948

KSO10/GPIO2A49

KSO11/GPIO2B50

KSO12/GPIO2C51

KSO13/GPIO2D52

KSO14/GPIO2E53

KSO15/GPIO2F54

KSI0/GPIO3055

KSI1/GPIO3156

KSI2/GPIO3257

KSI3/GPIO3358

KSI4/GPIO3459

KSI5/GPIO3560

KSI6/GPIO3661

KSI7/GPIO3762

BATT_TEMP/GPIO3863

GPIO3964

ADP_I/GPIO3A65

GPIO3B66

EC

_V

DD

/AV

CC

67

DAC_BRIG/GPIO3C68

AG

ND

/AG

ND

69

EN_DFAN1/GPIO3D70

IREF/GPIO3E71

CHGVADJ/GPIO3F72

ENBKL/GPIO4073

PECI_KB930/GPIO4174

GPIO4275

IMON/GPIO4376

EC_SMB_CK1/GPIO4477

EC_SMB_DA1/GPIO4578

EC_SMB_CK2/GPIO4679

EC_SMB_DA2/GPIO4780

KSO16/GPIO4881

KSO17/GPIO4982

EC_MUTE#/GPIO4A83

USB_EN#/GPIO4B84

CAP_INT#/GPIO4C85

EAPD/GPIO4D86

TP_CLK/GPIO4E87

TP_DATA/GPIO4F88

FSTCHG/GPIO5089

BATT_CHG_LED#/GPIO5290

CAPS_LED#/GPIO5391

PWR_LED#/GPIO5492

BATT_LOW_LED#/GPIO5593

GN

D/G

ND

94

SYSON/GPIO5695

EC

_V

DD

/VC

C9

6

CPU1.5V_S3_GATE/GPXIOA0097

WOL_EN/GPXIOA0198

ME_EN/GPXIOA0299

EC_RSMRST#/GPXIOA03100

EC_LID_OUT#/GPXIOA04101

PROCHOT_IN/GPXIOA05102

H_PROCHOT#_EC/GPXIOA06103

VCOUT0_PH/GPXIOA07104

BKOFF#/GPXIOA08105

PBTN_OUT#/GPXIOA09106

PCH_APWROK/GPXIOA10107

SA_PGOOD/GPXIOA11108

VCIN0_PH/GPXIOD00109

AC_IN/GPXIOD01110

EC

_V

DD

01

11

EC_ON/GPXIOD02112

GN

D0

11

3

ON/OFF/GPXIOD03114

LID_SW#/GPXIOD04115

SUSP#/GPXIOD05116

GPXIOD06117

PECI_KB9012/GPXIOD07118

SPIDI/GPIO5B119

SPIDO/GPIO5C120

VR_ON/GPIO57121

XCLKI/GPIO5D122

XCLKO/GPIO5E123

V18R124

EC

_V

DD

/VC

C1

25

SPICLK/GPIO58126

PM_SLP_S4#/GPIO59127

SPICS#/GPIO5A128

RB27100K_0402_5%

RB27100K_0402_5%

1 2

RB247K_0402_5%

RB247K_0402_5%1 2

RB24

10K_0402_5%

885@

RB24

10K_0402_5%

885@

12

CB1620P_0402_50V8CB1620P_0402_50V8

1

2

CB12 0.1U_0402_10V7KCB12 0.1U_0402_10V7K

1 2

CB6 0.1U_0402_10V7K

ESD@

CB6 0.1U_0402_10V7K

ESD@ 1 2

RPB2

4.7K_0804_8P4R_5%

RPB2

4.7K_0804_8P4R_5%

1 82 73 64 5

RPB1

2.2K_0804_8P4R_5%

RPB1

2.2K_0804_8P4R_5%

1 82 73 64 5

G

D S

QB2

2N7002KW_SOT323-3885@

G

D S

QB2

2N7002KW_SOT323-3885@

2

1 3

RB34 0_0402_5%Rshort@

RB34 0_0402_5%Rshort@1 2

CB1122P_0402_50V8J

@EMI@

CB1122P_0402_50V8J

@EMI@

1

2

RB21 10K_0402_5%RB21 10K_0402_5%

1 2

CB2

0.1U_0402_10V7K

CB2

0.1U_0402_10V7K

1

2

CB14 180P_0402_50V8J

@ESD@

CB14 180P_0402_50V8J

@ESD@ 1 2

G

D

S

QB1

2N7002KW_SOT323-3G

D

S

QB1

2N7002KW_SOT323-32

13

RB19 330K_0402_5%

885@

RB19 330K_0402_5%

885@12

RB310_0402_5%

@EMI@

RB310_0402_5%

@EMI@1

2

Page 28: LA-A551PR10 ZEMAE 20130716 - Kythuatphancung

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

ISPD

Power Button

Keyboard LED

APU PR sample

POWER LED

VGA

PCB Fedical Mark PAD

CPUWLAN standoff

Screw Hole

15" KEYBOARD CONN.

14" KEYBOARD CONN.

Battery Reset

PTH NPTH

D31 close between JKB4&JKB5

Add for ESD request

ON/OFFBTN#

KSO2KSO1KSO0KSO4KSO3KSO5KSO14KSO6KSO7KSO13KSO8KSO9KSO10KSO11KSO12KSO15KSI7KSI2KSI3KSI4KSI0KSI5KSI6KSI1+3VS_KB

KSO[0..17]

KSI[0..7]

KSO17

KSO16

KSO2KSO1KSO0KSO4KSO3KSO5KSO14KSO6KSO7KSO13KSO8KSO9KSO10KSO11KSO12KSO15KSI7KSI2KSI3KSI4KSI0KSI5KSI6KSI1+3VS_KB

CAPS_LED#CAPS_LED#

+3VS_NUM

ON/OFFBTN# <27>

KB_LED<27>

KSI[0..7] <27>

KSO[0..17] <27>

CAPS_LED#<27>

ENLDO<33>

NUM_LED#<27>

+3VL

+5VS

+5VS_LED

+5VS_LED

+5VS

+3VS

+3VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-A551P 1.0

KB/TP/LED/LID/DEBUG/ISPD

28 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-A551P 1.0

KB/TP/LED/LID/DEBUG/ISPD

28 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-A551P 1.0

KB/TP/LED/LID/DEBUG/ISPD

28 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

Compal Electronics, Inc.

H7H_3P0@

H7H_3P0@

1

D32

CK0402101V05_0402-2

ESD@

D32

CK0402101V05_0402-2

ESD@

12

H2H_4P6x4P2@

H2H_4P6x4P2@

1

H11H_6P5@

H11H_6P5@

1

D8

HT-F196BP5_WHITE

D8

HT-F196BP5_WHITE

2 1

UC1

CPU A6-5200 25W 4C

SA00006R310

A6R1@UC1

CPU A6-5200 25W 4C

SA00006R310

A6R1@

FD3

@

FD3

@

1

H8H_5P2@

H8H_5P2@

1

R5390_0402_5%

15@R5390_0402_5%

15@

1 2

D31

CK0402101V05_0402-2

ESD@D31

CK0402101V05_0402-2

ESD@1 2

FD2

@

FD2

@

1

R9390_0402_5%R9390_0402_5%1 2

G

D

S

Q10

2N7002KW_SOT323-3

KBL@

G

D

S

Q10

2N7002KW_SOT323-3

KBL@

2

13

H19H_3P5x3P0N@

H19H_3P5x3P0N@

1

R7390_0402_5%

14@R7390_0402_5%

14@

1 2

H20H_2P7N@

H20H_2P7N@

1

G

DS

Q9

AO3413_SOT23

KBL@

G

DS

Q9

AO3413_SOT23

KBL@

2

13

JKB5

CVILU_CF17341U0R0-NHConn@

JKB5

CVILU_CF17341U0R0-NHConn@

11

22

33

44

55

66

77

88

99

1010

1111

1212

1313

1414

1515

1616

1717

1818

1919

2020

2121

2222

2323

2424

2525

2626

2727

2828

2929

3030

3131

3232

3333

3434

GND135

GND236

D7

HT-F196BP5_WHITE

14@D7

HT-F196BP5_WHITE

14@2 1

UC1

CPU A4-5000 15W 4C

SA00006R410

A4R1@UC1

CPU A4-5000 15W 4C

SA00006R410

A4R1@

H9H_4P1@

H9H_4P1@

1

SW4TJG-533-V-T/R_6PSW4TJG-533-V-T/R_6P

3

2

1

4

5 6

R4 300_0402_5%R4 300_0402_5%12

D9

HT-F196BP5_WHITE

15@D9

HT-F196BP5_WHITE

15@2 1

H5H_3P2@

H5H_3P2@

1

H29H_3P3@

H29H_3P3@

1

H6H_3P0@

H6H_3P0@

1

H3H_4P2@

H3H_4P2@

1

H10H_6P5@

H10H_6P5@

1

JBLG Conn@

ACES_50578-0040N-001

JBLG Conn@

ACES_50578-0040N-001

11

22

33

44

GND5

GND6

H13H_3P5@

H13H_3P5@

1

R480 300_0402_5%R480 300_0402_5%12

FD1

@

FD1

@

1

R202100K_0402_5%R202100K_0402_5%

12

H18H_3P0x2P5N@

H18H_3P0x2P5N@

1

SW3

TJG-533-V-T/R_6P

14@

SW3

TJG-533-V-T/R_6P

14@

3

2

1

4

5 6

ZZZ1

PCB LA-A551P

DA60011V000

ZZZ1

PCB LA-A551P

DA60011V000

H1H_4P6@

H1H_4P6@

1

SW2

TJG-533-V-T/R_6P

15@

SW2

TJG-533-V-T/R_6P

15@

3

2

1

4

5 6

FD4

@

FD4

@

1

H4H_3P2@

H4H_3P2@

1

H17H_2P5N@

H17H_2P5N@

1

JKB4

CVILU_CF17341U0R0-NHConn@

JKB4

CVILU_CF17341U0R0-NHConn@

11

22

33

44

55

66

77

88

99

1010

1111

1212

1313

1414

1515

1616

1717

1818

1919

2020

2121

2222

2323

2424

2525

2626

2727

2828

2929

3030

3131

3232

3333

3434

GND135

GND236

R20410K_0402_5%

KBL@

R20410K_0402_5%

KBL@

12

Page 29: LA-A551PR10 ZEMAE 20130716 - Kythuatphancung

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

+5VALW TO +5VS

+3VALW TO +3VS

Load switch

Vgs=-4.5V,Id=3A,Rds<97mohm

+0.95VALW to +0.95VS

Vgs=10V,Id=14.5A,Rds=6mohm

+3VALW to +3VALW_FCH

VIN 5V and 3.3V (VBIAS=5V),IMAX(per channel)=6A,Rds=18mohm

+1.8VALW TO +1.8VS

+1.5V TO +1.5VS

Load switch

VIN 5V and 3.3V (VBIAS=5V),IMAX(per channel)=6A,Rds=18mohm

SYSON#SUSP

SUSP#

SUSP

SYSON#

Q11_GATE

+3VS_LS

SUSP#

SUSP#

+5VS_LS

3VALW_APU_PWREN

+1.8VS_LS

+1.5VS_LS

SUSP#

3VALW_APU_PWREN

SUSP#

SYSONSUSP#

3VALW_APU_PWREN

0.95VS_PWREN#

+3VALW

+3VALW_APU

+0.75VS

+5VALW+5VALW

+1.5V

+3VALW

B+

+0.95VALW +0.95VS

+5VALW

+3VALW

+5VS

+3VS

+5VALW

+3VL

+1.5V+1.5VS

+1.8VALW

+5VALW

+1.8VS

+3VALW_APU

+5VALW

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-A551P 1.0

DC TO DC INTERFACE

29 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-A551P 1.0

DC TO DC INTERFACE

29 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-A551P 1.0

DC TO DC INTERFACE

29 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

Compal Electronics, Inc.

C11 330P_0402_50V7KC11 330P_0402_50V7K1 2

Q3B

2N7002KDWH_SOT363-6

Q3B

2N7002KDWH_SOT363-6

34

5

R217820K_0402_5%R217820K_0402_5%

12

PJ8

JUMP_43X79

@PJ8

JUMP_43X79

@

1 2

Q3A

2N7002KDWH_SOT363-6

Q3A

2N7002KDWH_SOT363-6

61

2

U1

TPS22966DPUR_SON14_2X3

U1

TPS22966DPUR_SON14_2X3

GND11

VIN26

VBIAS4

ON25

VOUT29

VIN27

CT112

VOUT114

VOUT28

VOUT113

VIN12

ON13

VIN11

CT210

GPAD15

R215100K_0402_5%R215100K_0402_5%

12

R214

470_0805_5%

R214

470_0805_5%

12

C10

1U

_0402_6.3

V6K

@ C10

1U

_0402_6.3

V6K

@1

2

Q4B

2N7002KDWH_SOT363-6

Q4B

2N7002KDWH_SOT363-6

34

5

R211470_0805_5%R211470_0805_5%

12

R220 47K_0402_5%

@

R220 47K_0402_5%

@1 2

PJ9

JUMP_43X79

@PJ9

JUMP_43X79

@

1 2

Q4A 2N7002KDWH_SOT363-6Q4A 2N7002KDWH_SOT363-6

61

2

C6

1U

_0402_6.3

V6K

@C6

1U

_0402_6.3

V6K

@1

2

R22410K_0402_5%

885@

R22410K_0402_5%

885@1

2

G

D

S

Q12AO3413_SOT23

@

G

D

S

Q12AO3413_SOT23

@

2

13

C13

1U

_0402_6.3

V6K

@ C13

1U

_0402_6.3

V6K

@1

2

C7

0.1

U_0402_10V

7K

@ C7

0.1

U_0402_10V

7K

@

1

2

C12 180P_0402_50V8JC12 180P_0402_50V8J1 2

R212100K_0402_5%

R212100K_0402_5%

12

Q2A

2N7002DW-T/R7_SOT363-6

Q2A

2N7002DW-T/R7_SOT363-6

61

2

C252

0.01U_0402_25V7K

@C252

0.01U_0402_25V7K

@

1

2

R213470_0805_5%R213470_0805_5%

12

Q2B2N7002DW-T/R7_SOT363-6Q2B2N7002DW-T/R7_SOT363-6

3

5

4

C8

0.1

U_0402_10V

7K

@ C8

0.1

U_0402_10V

7K

@

1

2

C251

0.1U_0402_10V7K

@ C251

0.1U_0402_10V7K

@

1

2

Q11

FDS6676AS_SO8

Q11

FDS6676AS_SO8

S1

S2

S3

G4

D8

D7

D6

D5

R219100K_0402_5%R219100K_0402_5%

12

R223100K_0402_5%9012@

R223100K_0402_5%9012@

12

R216220K_0402_5%

R216220K_0402_5%1 2

U2

TPS22966DPUR_SON14_2X3

U2

TPS22966DPUR_SON14_2X3

GND11

VIN26

VBIAS4

ON25

VOUT29

VIN27

CT112

VOUT114

VOUT28

VOUT113

VIN12

ON13

VIN11

CT210

GPAD15

R221470_0805_5%R221470_0805_5%

12

PJ4

JUMP_43X39

@

PJ4

JUMP_43X39

@

21

C9 330P_0402_50V7KC9 330P_0402_50V7K1 2

C250

0.1

U_0402_25V

6

C250

0.1

U_0402_25V

6

1

2

C14

1U

_0402_6.3

V6K

@C14

1U

_0402_6.3

V6K

@1

2

C5 180P_0402_50V8JC5 180P_0402_50V8J1 2

C15

0.1

U_0402_10V

7K

@ C15

0.1

U_0402_10V

7K

@

1

2

PJ6

JUMP_43X118

@PJ6

JUMP_43X118

@

1 2

C16

0.1

U_0402_10V

7K

@ C16

0.1

U_0402_10V

7K

@

1

2

Q5B

2N7002KDWH_SOT363-6

Q5B

2N7002KDWH_SOT363-6

34

5

PJ7

JUMP_43X118

@PJ7

JUMP_43X118

@

1 2

QC1B

2N7002KDWH_SOT363-6

@QC1B

2N7002KDWH_SOT363-6

@

34

5

Q5A

2N7002KDWH_SOT363-6

Q5A

2N7002KDWH_SOT363-6

61

2

R21810K_0402_5%

@

R21810K_0402_5%

@

12

Page 30: LA-A551PR10 ZEMAE 20130716 - Kythuatphancung

A

A

B C

BnC

D

D

1 1

2 2

3 3

4 4

EMI Part (47.1)

- +

For ML1220 RTC (38.2)

A51 need add fuse

Other component (37.1)

For RTC (38.2)

DC_IN_S1

+RTC_R

VIN

+RTC

+RTC_APU_R

+RTC

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.1

DCIN/PRECHARGECustom

30 40

2012/09/27 2015/09/27

Compal Electronics, Inc.

LA-A551P

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.1

DCIN/PRECHARGECustom

30 40

2012/09/27 2015/09/27

Compal Electronics, Inc.

LA-A551P

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.1

DCIN/PRECHARGECustom

30 40

2012/09/27 2015/09/27

Compal Electronics, Inc.

LA-A551P

PC1021000P_0603_50V7K

EMI@PC1021000P_0603_50V7K

EMI@

12

PL3HCB2012KF-121T50_0805

EMI@ PL3HCB2012KF-121T50_0805

EMI@

1 2

PC

10

1U

_0402_6.3

V6K

PC

10

1U

_0402_6.3

V6K

12

PC101100P_0603_50V8

EMI@PC101100P_0603_50V8

EMI@

12

PL1HCB2012KF-121T50_0805

EMI@ PL1HCB2012KF-121T50_0805

EMI@

1 2

PC

91U

_0402_6.3

V6K

PC

91U

_0402_6.3

V6K

12

PU1

AP2138N-1.5TRG1_SOT23-3

PU1

AP2138N-1.5TRG1_SOT23-3

Vin1Vout

3

GND2

PF1

7A_32V_S1206-H-7.0A

PF1

7A_32V_S1206-H-7.0A

21

PC103100P_0603_50V8

EMI@PC103100P_0603_50V8

EMI@

12

PR102

560_0603_5%

PR102

560_0603_5%

1 2

PBJ101 @

ML1220T13RE

PBJ101 @

ML1220T13RE

12

PJP1

ACES_50299-00401-001

@PJP1

ACES_50299-00401-001

@

11

33

44

22

PC1041000P_0603_50V7K

EMI@PC1041000P_0603_50V7K

EMI@

12

PR101560_0603_5%

PR101560_0603_5%

1 2

Page 31: LA-A551PR10 ZEMAE 20130716 - Kythuatphancung

A

A

B

B

C

C

D

D

1 1

2 2

3 3

4 4

OTP (39.7)

Other component (37.1)EMI Part (47.1)

BATT_S1

BATT_P5

EC_SMCAEC_SMDA

ADP_I<27,32>

PROCHOT_IN<27> VCIN0_PH<27>

EC_SMB_DA1 <27,32>

BATT_PRES <27>

EC_SMB_CK1 <27,32>

+3VL

+3VL

BATT+

VMB

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.1

BATTERY CONN / OTP

Custom

31 40

2012/09/27 2015/09/27

Compal Electronics, Inc.

LA-A551P

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.1

BATTERY CONN / OTP

Custom

31 40

2012/09/27 2015/09/27

Compal Electronics, Inc.

LA-A551P

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.1

BATTERY CONN / OTP

Custom

31 40

2012/09/27 2015/09/27

Compal Electronics, Inc.

LA-A551P

PR21

100_0402_1%

PR21

100_0402_1%

21

PR141K_0402_1%PR141K_0402_1%

12

PR

41

2.1

K_

04

02

_1

%P

R4

12

.1K

_0

40

2_

1%1

2

PF210A_125V_TR2/6125FF10-R

PF210A_125V_TR2/6125FF10-R

21

PR16

6.49K_0402_1%

PR16

6.49K_0402_1%

12

PR50_0402_5%

@PR50_0402_5%

@

1 2

PC71000P_0402_50V7KEMI@ PC71000P_0402_50V7KEMI@

12

PC110.1U_0402_10V7K

@PC110.1U_0402_10V7K

@

12

PJP2

ACES_50458-00801-001

@PJP2

ACES_50458-00801-001

@

11

3344

22

55667788GND9GND10

PH

11

00

K_

04

02

_1

%_

TS

M0

B1

04

F4

25

1R

ZP

H1

10

0K

_0

40

2_

1%

_T

SM

0B

10

4F

42

51

RZ

12PR19

1K_0402_1%

PR19

1K_0402_1%

12

PL2FBMA-L11-201209-121LMA50T_0805

EMI@ PL2FBMA-L11-201209-121LMA50T_0805

EMI@

1 2

PR20

100_0402_1%

PR20

100_0402_1%

21

PR

32

0K

_0

40

2_

1%

PR

32

0K

_0

40

2_

1%

12

PL4FBMA-L11-201209-121LMA50T_0805

EMI@ PL4FBMA-L11-201209-121LMA50T_0805

EMI@

1 2

PC80.01U_0402_25V7KEMI@ PC80.01U_0402_25V7KEMI@

12

PR

11

K_

04

02

_1

%P

R1

1K

_0

40

2_

1%

12

PR20_0402_5%

@PR20_0402_5%

@

1 2

Page 32: LA-A551PR10 ZEMAE 20130716 - Kythuatphancung

A

A

B

B

C

C

D

D

1 1

2 2

3 3

4 4

Charger controller (40.1), Support component (40.2)

EMI Part (47.1)

EMI Part (35.33)

For A51 ADP_V function

for reverse input protection

Min. Typ Max.H-->L 17.23V L--> H 17.63V

Vin Dectector

ILIM and external DPM

3.97A

Please locate the RCNear EC chip2011-02-22

BQ24725_ACOK

BQ24725_ACDRV

BQ

24

72

5_

AC

N

BQ

24

72

5_

AC

P

BQ24725_BATDRV

BQ24725_BATDRV

BQ24725_CMSRC

BQ

24

72

5_

LX

CHG

CS

ON

1

CS

OP

1

DH

_C

HG

DL_CHG

BQ24725_ACDRV_1BQ24725_BATDRV_1

BQ

24

72

5_

AC

DE

T

BQ24725_ILIM

BQ

24

72

5_

RE

GN

BQ

24

72

5_

VC

C

CSON1

CSOP1SRP

SRN

BQ

24

72

5_

BS

T

BQ24725_LX

DH_CHG

ADP_I <27,31>

EC_SMB_CK1 <27,31>

EC_SMB_DA1 <27,31>

ACIN<27>

ADP_V <27>

P2P1 B+VIN

+5VALW

VIN

BATT+

VIN

+3VL

VIN

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.1

CHARGER

Custom

32 40

2012/09/27 2015/09/27

Compal Electronics, Inc.

LA-A551P

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.1

CHARGER

Custom

32 40

2012/09/27 2015/09/27

Compal Electronics, Inc.

LA-A551P

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.1

CHARGER

Custom

32 40

2012/09/27 2015/09/27

Compal Electronics, Inc.

LA-A551P

PQ202

AON7406L

PQ202

AON7406L4

5

123

PR

24

44

22

K_

04

02

_1

%P

R2

44

42

2K

_0

40

2_

1%

12

PC2420.1U_0603_16V7K

PC2420.1U_0603_16V7K

12

PC

21

11

0U

_0

80

5_

25

V6

KP

C2

11

10

U_

08

05

_2

5V

6K

12PQ203

TPCA 8057

PQ203

TPCA 8057

4

5

123

PC2470.1U_0402_10V7K

@PC2470.1U_0402_10V7K

@

12

PR

22

92

.2_

06

03

_5

%P

R2

29

2.2

_0

60

3_

5%

12

PC2360.1U_0402_25V6

PC2360.1U_0402_25V6

1 2

PR2100_0603_5%

PR2100_0603_5%1 2

PR2270.01_1206_1%

PR2270.01_1206_1%

1

3

4

2

PC

23

40

.01

U_

04

02

_5

0V

7K

PC

23

40

.01

U_

04

02

_5

0V

7K

12

PC

24

00

.1U

_0

40

2_

25

V6

PC

24

00

.1U

_0

40

2_

25

V6

12

PL2024.7UH_ETQP3W4R7WFN_5.5A_20%

PL2024.7UH_ETQP3W4R7WFN_5.5A_20%

1 2

PC

21

31

0U

_0

80

5_

25

V6

KP

C2

13

10

U_

08

05

_2

5V

6K

12

PC245

100P_0402_50V8J

PC245

100P_0402_50V8J

12

PC

24

40

.1U

_0

40

2_

25

V6

PC

24

40

.1U

_0

40

2_

25

V6

12

G

D

S

PQ2092N7002FU_SOT23G

D

S

PQ2092N7002FU_SOT23

2

13

PC205

1U_0603_25V6K

PC205

1U_0603_25V6K

1 2

PC

24

10

.1U

_0

40

2_

25

V6

PC

24

10

.1U

_0

40

2_

25

V6

12

PL2011UH_NRS4018T1R0NDGJ_3.2A_30%

EMI@ PL2011UH_NRS4018T1R0NDGJ_3.2A_30%

EMI@

1 2

PD230

BAS40CW_SOT323-3

PD230

BAS40CW_SOT323-3

123

PC237

0.047U_0402_25V7K

PC237

0.047U_0402_25V7K

1 2

PR239 10K_0402_1%PR239 10K_0402_1%

1 2

PR241590K_0402_1%

PR241590K_0402_1%

1 2

PR249

47K_0402_1%

PR249

47K_0402_1%

12

PC

21

42

20

0P

_0

40

2_

25

V7

K

@E

MI@

PC

21

42

20

0P

_0

40

2_

25

V7

K

@E

MI@

12

PR2110.01_1206_1%

PR2110.01_1206_1%

1

3

4

2

PC

22

31

0U

_0

80

5_

25

V6

KP

C2

23

10

U_

08

05

_2

5V

6K

12

PR2376.8_0603_5%

PR2376.8_0603_5%1 2

PQ201AON7408LPQ201AON7408L

4

5

123

PR226

3M_0402_5%

PR226

3M_0402_5%

1 2

PC

23

50

.1U

_0

40

2_

25

V6

PC

23

50

.1U

_0

40

2_

25

V6

12

PC

20

66

80

P_

06

03

_5

0V

8J

@E

MI@

PC

20

66

80

P_

06

03

_5

0V

8J

@E

MI@

12

PR2460_0402_5%@PR2460_0402_5%@

1 2

PR

22

81

0_

12

06

_1

%P

R2

28

10

_1

20

6_

1%

12 PD231

RB751V-40_SOD323-2

PD231

RB751V-40_SOD323-2

12

PC

23

02

20

0P

_0

40

2_

50

V7

KP

C2

30

22

00

P_

04

02

_5

0V

7K

12

PU200

BQ24725RGRR_QFN20_3P5X3P5

PU200

BQ24725RGRR_QFN20_3P5X3P5

ACN1

ACP2

CMSRC3

ACDRV4

ACOK5

AC

DE

T6

IOU

T7

SD

A8

SC

L9

ILIM

10

BATDRV11

SRN12

SRP13

GND14

LODRV15

RE

GN

16

BT

ST

17

HID

RV

18

PH

AS

E1

9

VC

C2

0

PAD21

PR247

309K_0402_1%

PR247

309K_0402_1%

12

PR

20

64

.7_

12

06

_5

%@

EM

I@P

R2

06

4.7

_1

20

6_

5%

@E

MI@

12

PC

23

10

.1U

_0

40

2_

25

V6

PC

23

10

.1U

_0

40

2_

25

V6

12

PR

24

56

6.5

K_

04

02

_1

%P

R2

45

66

.5K

_0

40

2_

1%1

2

PQ207

S TR SI7716ADN

PQ207

S TR SI7716ADN

4

5

123

PC

22

21

0U

_0

80

5_

25

V6

KP

C2

22

10

U_

08

05

_2

5V

6K

12

PQ205

SI7716ADN-T1-GE3_POWERPAK8-5

PQ205

SI7716ADN-T1-GE3_POWERPAK8-5

4

5

123

PR225

1M_0402_5%

PR225

1M_0402_5%

1 2

PR

23

44

.12

K_

06

03

_1

%P

R2

34

4.1

2K

_0

60

3_

1%1

2

PR

23

54

.12

K_

06

03

_1

%P

R2

35

4.1

2K

_0

60

3_

1%1

2

PC239

1U_0603_25V6K

PC239

1U_0603_25V6K

1 2

PC2460.1U_0402_10V7K

@PC2460.1U_0402_10V7K

@

12

PR23610_0603_1%

PR23610_0603_1%1 2

PR2334.12K_0603_1%

PR2334.12K_0603_1%

1 2

PC

23

8

0.1

U_

04

02

_2

5V

6

PC

23

8

0.1

U_

04

02

_2

5V

6

12

PR

24

21

00

K_

04

02

_1

%P

R2

42

10

0K

_0

40

2_

1%

12

PC

24

30

.01

U_

04

02

_2

5V

7K

PC

24

30

.01

U_

04

02

_2

5V

7K

12

Page 33: LA-A551PR10 ZEMAE 20130716 - Kythuatphancung

A

A

B

B

C

C

D

D

1 1

2 2

3 3

4 4

3/5VALW controller (35.1), Support component (35.2)

EMI Part (47.1)

EMI Part (47.1)

EMI Part (35.33)

3.3VPeak Current 5.78AOCP current 6.5ADelta I=1.160A ,ripple=1.160 x17m=19.27mVFSW=455kHzESR 20mohm

TYP MAXH/S Rds(on) :27mohm , 34mohmL/S Rds(on) :19mohm , 23.5mohm

5VPeak Current 9AOCP current 11.05AFSW=390kHzDelta I=2.791A,ripple=2.791*15m=41.865mVESR 20mohm

TYP MAXH/S Rds(on) ::27mohm , 34mohmL/S Rds(on) :10.8mohm , 13.6mohm

LA-A551P

UG_3V

LX_3V

BST1_5V

LG_3V

LX_5V

BST_5VBST1_3V

FB_5V

UG_5V

BST_3V

LG_5V

SN

UB

_3

V

SN

UB

_5

V

FB_3V

EC_ON<27>

VS_ON<27>

ENLDO<28>

3VALW_APU_PWREN<27,29>

POK<27>

+3VALWP +3VALW

+5VALWP +5VALW

+3VALWP+5VALWP

3/5V_B+B+

3/5V_B+

3/5V_B+

+3VLP

+3VLP +3VL

+3VL

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.1

3VALW/5VALW

Custom

33 40

2011/06/24 2012/07/12

Compal Electronics, Inc.LA-A551P

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.1

3VALW/5VALW

Custom

33 40

2011/06/24 2012/07/12

Compal Electronics, Inc.LA-A551P

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.1

3VALW/5VALW

Custom

33 40

2011/06/24 2012/07/12

Compal Electronics, Inc.LA-A551P

PJ351

JUMP_43X118

@ PJ351

JUMP_43X118

@

11

22

PC

34

01

0U

_0

80

5_

25

V6

KP

C3

40

10

U_

08

05

_2

5V

6K

12

+

PC

35

41

00

U_

D2

_6

.3V

M_

R1

7M

+

PC

35

41

00

U_

D2

_6

.3V

M_

R1

7M 1

2

PJ332

JUMP_43X39

@ PJ332

JUMP_43X39

@

11

22

PR35030K_0402_1%

PR35030K_0402_1%1 2

PC

36

11

0U

_0

80

5_

25

V6

KP

C3

61

10

U_

08

05

_2

5V

6K

12

PJ331

JUMP_43X118

@ PJ331

JUMP_43X118

@

11

22

PQ351

AON7408L

PQ351

AON7408L

35

2

4

1

PR35119.1K_0402_1%

PR35119.1K_0402_1%1 2

PR

34

25

6K

_0

40

2_

1%

PR

34

25

6K

_0

40

2_

1%

12

PC3350.1U_0402_10V7K

PC3350.1U_0402_10V7K

1 2

PC

34

21

U_

06

03

_1

0V

6K

PC

34

21

U_

06

03

_1

0V

6K

12

PL3324.7UH_ETQP3W4R7WFN_5.5A_20%

PL3324.7UH_ETQP3W4R7WFN_5.5A_20%

12

PQ352

FDMC7692S_MLP8-5

PQ352

FDMC7692S_MLP8-5

4

5

123

PR3410_0402_5%@PR3410_0402_5%@

1 2

PL3522.2UH_MMD-06CZ-2R2M-V1_8A_20%

PL3522.2UH_MMD-06CZ-2R2M-V1_8A_20%

1 2

PQ

33

1A

ON

74

08

LP

Q3

31

AO

N7

40

8L

4

5

1 2 3

PR

33

90

_0

40

2_

5%

@

PR

33

90

_0

40

2_

5%

@12

PC

33

92

20

0P

_0

40

2_

50

V7

K

@E

MI@

PC

33

92

20

0P

_0

40

2_

50

V7

K

@E

MI@

12

PC

35

66

80

P_

06

03

_5

0V

8J

@E

MI@

PC

35

66

80

P_

06

03

_5

0V

8J

@E

MI@

12

PC

33

66

80

P_

06

03

_5

0V

8J

@E

MI@

PC

33

66

80

P_

06

03

_5

0V

8J

@E

MI@

12

PC3550.1U_0402_10V7K

PC3550.1U_0402_10V7K

1 2

PR

33

64

.7_

12

06

_5

%

@E

MI@

PR

33

64

.7_

12

06

_5

%

@E

MI@

12

PC

36

00

.1U

_0

60

3_

25

V7

KP

C3

60

0.1

U_

06

03

_2

5V

7K

12

PR

33

51

00

K_

04

02

_1

%P

R3

35

10

0K

_0

40

2_

1%

12

PR3550_0402_5%

PR3550_0402_5%1 2

PC3444.7U_0603_10V6K

PC3444.7U_0603_10V6K

12

+

PC

35

31

50

U_

D2

_6

.3V

Y_

R1

5M

+

PC

35

31

50

U_

D2

_6

.3V

Y_

R1

5M 1

2

PR

33

71

54

K_

04

02

_1

%P

R3

37

15

4K

_0

40

2_

1%

12

PR

33

81

00

K_

04

02

_1

%P

R3

38

10

0K

_0

40

2_

1%

12

G

D

SPQ3332N7002FU_SOT23 G

D

SPQ3332N7002FU_SOT23

2

13

RT8243AZQW_WQFN20_3X3PU330RT8243AZQW_WQFN20_3X3PU330

FB

11

EN

TR

IP1

2

TO

N3

EN

TR

IP2

4

FB

25

PGOOD6

BOOT27

UGATE28

PHASE29

LGATE210

VIN

11

EN

LD

O1

2

SE

CF

B1

3

LD

O5

14

LD

O3

15

LGATE116

PHASE117

UGATE118

BOOT119

BYP120

PAD21

PR33120K_0402_1%

PR33120K_0402_1%1 2

PR

33

21

00

K_

04

02

_5

%@

PR

33

21

00

K_

04

02

_5

%@1

2

PL331HCB2012KF-121T50_0805

EMI@ PL331HCB2012KF-121T50_0805

EMI@

1 2

PR

35

64

.7_

12

06

_5

%@

EM

I@P

R3

56

4.7

_1

20

6_

5%

@E

MI@

12

PR3330_0402_5%

PR3330_0402_5%1 2

PC3414.7U_0603_10V6K

PC3414.7U_0603_10V6K

12

PC

34

34

.7U

_0

80

5_

25

V6

-KP

C3

43

4.7

U_

08

05

_2

5V

6-K

12

PR334499K_0402_1%

PR334499K_0402_1%

1 2

PR3402.2K_0402_1%

PR3402.2K_0402_1%1 2

PR

35

71

50

K_

04

02

_1

%P

R3

57

15

0K

_0

40

2_

1%

12

PQ332

AON7406L

PQ332

AON7406L

4

5

1 2 3

PR33014K_0402_1%

PR33014K_0402_1%

1 2

Page 34: LA-A551PR10 ZEMAE 20130716 - Kythuatphancung

A

A

1 1

Note: S3 - sleep ; S5 - power off

STATE S3 S5 1.5VP VTT_REFP 0.75VSP

S0

S3

S4/S5

Hi Hi

HiLo

Lo Lo

On

On

On

On

On

Off

(Hi-Z)

Off

(Discharge)

Off

(Discharge)

Off

(Discharge)

DDR controller (35.3), Support component (35.4)

EMI Part (47.1)

1.5VPeak Current 8.1AOCP current 9.63AFSW=500kHzDCR 8.3 ~ 10mohm

TYP MAXH/S Rds(on) :27mohm , 34mohmL/S Rds(on) :10.8mohm , 13.6mohm

TO

N_

1.5

V

BST_1.5V

1.5V_B+

1.5V_B+

SN

UB

_+

1.5

VP

SW_1.5V

CS_1.5V

DL_1.5V

BST_1.5V-1

VDD_1.5V

EN_1.5V

EN

_0

.75

VS

P

FB_1.5V

VTTREF_1.5V

DH_1.5V

SUSP#<27,29>

SYSON<27,29>

B+

+1.5VP

+5VALW

+5VALW

+1.5VP

+0.75VSP

+1.5V

+1.5VP

+0.75VS+0.75VSP +1.5VP +1.5V

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.1

1.5VP/0.75VSP/1.8VSP

Custom

34 40

2011/06/24 2012/07/12

Compal Electronics, Inc.

LA-A551P

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.1

1.5VP/0.75VSP/1.8VSP

Custom

34 40

2011/06/24 2012/07/12

Compal Electronics, Inc.

LA-A551P

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.1

1.5VP/0.75VSP/1.8VSP

Custom

34 40

2011/06/24 2012/07/12

Compal Electronics, Inc.

LA-A551P

PC1641U_0603_10V6K

PC1641U_0603_10V6K

12

PR1630_0402_5%@PR1630_0402_5%@

1 2

PR162

10K_0402_1%

PR162

10K_0402_1%

12

PR1550_0603_5%

PR1550_0603_5%1 2

PQ

15

2F

DM

C7

69

2S

_M

LP

8-5

PQ

15

2F

DM

C7

69

2S

_M

LP

8-5

4

5

1 2 3

+

PC

15

7

22

0U

_D

2_

2V

Y_

R1

7M

+

PC

15

7

22

0U

_D

2_

2V

Y_

R1

7M1

2

PL1521UH_PCMB063T-1R0MS_12A_20%

PL1521UH_PCMB063T-1R0MS_12A_20%

12

PU150

RT8207MZQW_WQFN20_3X3

PU150

RT8207MZQW_WQFN20_3X3

VTTSNS2

FB

6

S5

8

PG

OO

D1

0

VDDP12

PH

AS

E1

6

BO

OT

18

VTTREF4

PGND14

VTTGND1

GND3

VDDQ5

S3

7

TO

N9

VDD11

CS13

LGATE15 U

GA

TE

17

VT

T2

0

VL

DO

IN1

9

PAD21

PC1660.1U_0402_10V7K

@PC1660.1U_0402_10V7K

@

12

PC

15

41

0U

_0

80

5_

25

V6

KP

C1

54

10

U_

08

05

_2

5V

6K

12

PC1621U_0603_10V6K

PC1621U_0603_10V6K

1 2PR159

5.1_0603_5%PR159

5.1_0603_5%1 2

PJ750

JUMP_43X79

@ PJ750

JUMP_43X79

@

11

22

PR1564.7_1206_5%

@[email protected]_1206_5%

@EMI@1

2

PR161825K_0402_1%

PR161825K_0402_1%

1 2

PC1630.033U_0402_16V7KPC1630.033U_0402_16V7K

12

PC

15

22

20

0P

_0

40

2_

50

V7

K

@E

MI@

PC

15

22

20

0P

_0

40

2_

50

V7

K

@E

MI@

12

PC

15

91

0U

_0

60

3_

6.3

V6

MP

C1

59

10

U_

06

03

_6

.3V

6M

12 P

C1

60

10

U_

06

03

_6

.3V

6M

PC

16

01

0U

_0

60

3_

6.3

V6

M

12

PC156680P_0402_50V7K

@EMI@PC156680P_0402_50V7K

@EMI@

12

PJ152

JUMP_43X118

@ PJ152

JUMP_43X118

@

11

22

PL151HCB2012KF-121T50_0805

EMI@ PL151HCB2012KF-121T50_0805

EMI@

1 2

PJ151

JUMP_43X118

@ PJ151

JUMP_43X118

@

11

22

PR1640_0402_5%

PR1640_0402_5%

12

PC

15

50

.1U

_0

60

3_

25

V7

KP

C1

55

0.1

U_

06

03

_2

5V

7K

12

PR15813K_0402_1%

PR15813K_0402_1%

1 2

PQ

15

1A

ON

74

08

LP

Q1

51

AO

N7

40

8L

4

5

1 2 3

PR16010.2K_0402_1%

PR16010.2K_0402_1%

12

PC1670.1U_0402_10V7K

@ PC1670.1U_0402_10V7K

@

12

Page 35: LA-A551PR10 ZEMAE 20130716 - Kythuatphancung

A

A

B

B

C

C

D

D

1 1

2 2

3 3

4 4

ZRMAE

+1.8VALWP/+0.95VALWP

(2.5A,100mils ,Via NO.=5)

1.8V controller (35.15), Support component (35.16)

Note:Iload(max)=3A

FB=0.6V

Need create Symbol.

0.95V controller (35.27), Support component (35.28)

FB=0.6V

EMI Part (47.1)

EMI Part (47.1)

1.8V

Peak Current 2.5A

OCP current 3.5A

FSW=800kHz

H/S Rds(on) :100mohm ,

L/S Rds(on) :80mohm ,

0.95V

Peak Current 7.1A

OCP current 16A

FSW=800kHz

H/S Rds(on) :22mohm

L/S Rds(on) :11mohm

+1.8_EN

SNB_0.95V

B+_0.95V

1.8_0.95VALW_PWREN

LX_0.953V

1.8_0.95VALW_PWREN<27>

+1.8VALW+1.8VALWP

+3VALW

+1.8VALWP

+0.95VALWP +0.95VALW

+3VALW

B+

+0.95VALWP

+3VALW

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.1Custom

35 40Tuesday, July 16, 2013

2012/09/27 2015/09/27

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.1Custom

35 40Tuesday, July 16, 2013

2012/09/27 2015/09/27

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.1Custom

35 40Tuesday, July 16, 2013

2012/09/27 2015/09/27

Compal Electronics, Inc.

PR

40

26

6.5

K_

04

02

_1

%P

R4

02

66

.5K

_0

40

2_

1%1

2

PR451100K_0402_1%

PR451100K_0402_1%

12

PC

40

62

2U

_0

60

3_

6.3

V6

MP

C4

06

22

U_

06

03

_6

.3V

6M

12

PR4040_0402_5%

PR4040_0402_5%

12

PC

41

22

2U

_0

60

3_

6.3

V6

MP

C4

12

22

U_

06

03

_6

.3V

6M

12

PC

40

4

22

00

P_

04

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7K

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PC

40

4

22

00

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12

PC

45

82

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MP

C4

58

22

U_

06

03

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6M

12

PL402

HCB2012KF-121T50_0805

EMI@PL402

HCB2012KF-121T50_0805

EMI@

12

PL4511UH_NRS4018T1R0NDGJ_3.2A_30%

PL4511UH_NRS4018T1R0NDGJ_3.2A_30%

1 2

PC454

0.01U_0402_16V7K

@PC454

0.01U_0402_16V7K

@

12

PC

41

12

.2U

_0

60

3_

6.3

V6

KP

C4

11

2.2

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06

03

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6K1

2PC403

680P_0603_50V7K

@EMI@PC403680P_0603_50V7K

@EMI@

1 2

PC

45

12

2U

_0

60

3_

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V6

MP

C4

51

22

U_

06

03

_6

.3V

6M

12

PJ451

JUMP_43X79

@ PJ451

JUMP_43X79

@

11

22

PU400

SY8208DQNC_QFN10_3X3

PU400

SY8208DQNC_QFN10_3X3

IN8

BYP7

PG2

ILMT3

LX10

FB4

LDO5

GND9

EN1

BS6

PR4014.7_1206_5%

@EMI@ PR4014.7_1206_5%

@EMI@

1 2

PC

40

94

70

0P

_0

40

2_

50

V7

KP

C4

09

47

00

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04

02

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12

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JUMP_43X118

@ PJ1

JUMP_43X118

@

11

22

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45

22

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3_

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MP

C4

52

22

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06

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12

PC

40

12

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60

3_

6.3

V6

MP

C4

01

22

U_

06

03

_6

.3V

6M

12

PR45349.9K_0402_1%

PR45349.9K_0402_1%

12

PC4530.1U_0402_16V7K

@ PC4530.1U_0402_16V7K

@

12

PC

40

82

2U

_0

60

3_

6.3

V6

MP

C4

08

22

U_

06

03

_6

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6M

12

PC4050.1U_0603_25V7K

PC4050.1U_0603_25V7K

1 2

PR

40

3

1K

_0

40

2_

1%

PR

40

3

1K

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40

2_

1%

12

PR4520_0402_5%

PR4520_0402_5%

12

PC

41

01

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80

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V6

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C4

10

10

U_

08

05

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5V

6K

12

PU450

SY8032ABC_SOT23-6

PU450

SY8032ABC_SOT23-6

IN4

PG5

LX3

FB6

EN1

GND2

PC

40

72

2U

_0

60

3_

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V6

MP

C4

07

22

U_

06

03

_6

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6M

12

PC

40

24

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_0

60

3_

6.3

V6

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C4

02

4.7

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06

03

_6

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6K

12

PC

45

02

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_0

40

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50

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JP

C4

50

22

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04

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8J

12

PL4011UH_PCMB063T-1R0MS_12A_20%

PL4011UH_PCMB063T-1R0MS_12A_20%

1 2

PR406

100K_0402_1%

PR406

100K_0402_1%

12

Page 36: LA-A551PR10 ZEMAE 20130716 - Kythuatphancung

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

LA-A551P

CPU controller (36.1),Driver (36.2) Support component (36.3)

APU_CORE_NBTDC 13A(A) 12A(B)Peak Current 17A(A) 15A(B)OCP current > 21.39ALoad line -4mV/AFSW=400kHzDCR 0.98mohm +/-5%

TYP MAXH/S Rds(on) :11.2mohm , 14mohmL/S Rds(on) :3.8mohm , 4.8mohm

APU_coreTDC 15A(A) 13A(B)Peak Current 21A(A) 18A(B)OCP current > 26.58ALoad line -4mV/AFSW=400kHzDCR 0.98mohm +/-5%

TYP MAXH/S Rds(on) :11.2mohm , 14mohmL/S Rds(on) :3.8mohm , 4.8mohm

EMI Part (47.1)

EMI Part (47.1)

NTC near CPU_CORE H/S mos

NTC near phase 1 choke

BOOT_NB1

VSUM-

BOOT1-1

PHASE1

UGATE1

SNB_APU

BOOT1

ISE

NA

1N

-1

UGATE_NB1

PHASE_NB1

BOOT_NB1-1

VSUMN_NB

SNB_APU_NB

VSUMP_NB

APU_B+

LGATE1

VSUMN_NB

VSUMP_NB

ENABLE

BOOT_NB1

PWROK

SVD

LGATE1

PHASE1

UGATE1

ISEN1

BOOT1

VSUM-

SVT

UGATE_NB1

PHASE_NB1

LGATE_NB1

VDDIO

VSUM+

SVC

ISEN2

VSUM+

LGATE_NB1

APU_SVD<6>

APU_PWRGD<6>

VR_ON<27>

APU_SVC<6>

APU_SVT<6>

VGATE <27>

APU_PROCHOT#<27,6>

APU_VDDNB_SEN_H<6>

APU_VDD_SEN_L <6>

APU_VDD_SEN_H <6>

B+

+APU_CORE

APU_B+

+APU_CORE_NB

+5VS

+5VS

+3VS

+APU_CORE

+APU_CORE_NB

+1.8VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

1.0

+CPU_CORE/VDDNBP

Custom

36 40Tuesday, July 16, 2013

2012/09/27Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

1.0

+CPU_CORE/VDDNBP

Custom

36 40Tuesday, July 16, 2013

2012/09/27Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

1.0

+CPU_CORE/VDDNBP

Custom

36 40Tuesday, July 16, 2013

2012/09/27Compal Electronics, Inc.

PR5702.2_0603_5%

PR5702.2_0603_5%1 2

PC5371000P_0402_50V7K

PC5371000P_0402_50V7K

12

PC

52

76

80

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PR5712K_0402_1%

PR5712K_0402_1%

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PR50932.4K_0402_1%

@PR50932.4K_0402_1%

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PR597 27.4K_0402_1%PR597 27.4K_0402_1%12

PR

57

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57

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PC

54

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1_0603_5%

PR590

1_0603_5%

12

PR

51

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17

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PR5760_0402_5%

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PC5390.01U_0402_50V7K

PC5390.01U_0402_50V7K

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PC5511000P_0402_50V7K

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12

PC554390P_0402_50V7K

PC554390P_0402_50V7K

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PC559820P_0402_50V7K

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PC552100P_0402_50V8J

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12

PR541

3.65K_0402_1%

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3.65K_0402_1%

12

PR57541.2K_0402_1%

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12

PL5030.22UH_MMD-06DZNR22EO1L_25A_20%

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1

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PC543

220P_0402_50V7K@PC543

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50

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10

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50

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PR586 0_0402_5%PR586 0_0402_5%1 2

PC5491000P_0402_50V7KPC5491000P_0402_50V7K

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54

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PC538100P_0402_50V8J

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12

PR5042K_0402_1%

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12

PR584 0_0402_5%PR584 0_0402_5%1 2

PC5580.1U_0603_50V7K

PC5580.1U_0603_50V7K

12

PR598

10.5K_0402_1%

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10.5K_0402_1%

1 2

PR5731.5K_0402_1%

PR5731.5K_0402_1%

12

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50

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PC

A8

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56

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4

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123

PU500

ISL62771HRTZ-T_TQFN40_5X5

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ISL62771HRTZ-T_TQFN40_5X5

IMON_NB2

SVC3

NTC_NB1

VR_HOT_L4

SVD5

SVT7

RT

N1

7

ISU

MN

15

ISE

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13

CO

MP

19

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MP

14

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12

NT

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VDDIO6

PWROK9

FB

18

PG

OO

D2

0

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EN

16

ENABLE8

BOOT121

UGATE122

PHASE123

LGATE124

VDD25

VDDP26

LGATE227

PHASE228

UGATE229

BOOT230B

OO

T_

NB

31

UG

AT

E_

NB

32

PH

AS

E_

NB

33

LG

AT

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NB

34

PG

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NB

35

CO

MP

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6

FB

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7

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8

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9

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MP

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0

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41

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50

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PC

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1 2

PR57210_0402_5%

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12

PC

54

81

U_

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54

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PH502470K_0402_5%_TSM0B474J4702RE

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12

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EMI@

1 2

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12

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@

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1 2

PC

51

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68

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10

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PR5081.87K_0402_1%

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PR589 0_0402_5%PR589 0_0402_5%1 2

+

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25

V_

M

1

2

PL5020.22UH_MMD-06DZNR22EO1L_25A_20%

PL5020.22UH_MMD-06DZNR22EO1L_25A_20%

1

3

4

2

PC557330P_0402_50V7K

PC557330P_0402_50V7K

12

PR5220_0402_5%

PR5220_0402_5%1 2

PC

54

50

.1U

_0

40

2_

25

V6

PC

54

50

.1U

_0

40

2_

25

V6

12

PC

53

42

20

0P

_0

40

2_

50

V7

K@

EM

I@P

C5

34

22

00

P_

04

02

_5

0V

7K

@E

MI@

12

PR580301_0402_1%

PR580301_0402_1%

12

PR51110K_0402_1%

PR51110K_0402_1%

12

PC544 1000P_0402_50V7KPC544 1000P_0402_50V7K12

PR5880_0402_5%

PR5880_0402_5%

1 2

PC

52

01

0U

_0

80

5_

25

V6

KP

C5

20

10

U_

08

05

_2

5V

6K

12

PL504HCB2012KF-121T50_0805

EMI@PL504HCB2012KF-121T50_0805

EMI@

1 2

PR595133K_0402_1%

PR595133K_0402_1%1 2

PR

57

82

.61

K_

04

02

_1

%P

R5

78

2.6

1K

_0

40

2_

1%

12

PR599

0_0402_5%

PR599

0_0402_5%

1 2

PC

55

60

.1U

_0

40

2_

25

V6

PC

55

60

.1U

_0

40

2_

25

V6

12

PC535

330P_0402_50V7K

PC535

330P_0402_50V7K12

Page 37: LA-A551PR10 ZEMAE 20130716 - Kythuatphancung

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

147K for CPU

47K for GPU

Layout Note:

Place near Choke

Rds(on):2.7mΩ~3.3mΩ

B value:4250K±2%

11 000

1.125V1110

VID5

GPIO6

11 0.775V

1

1

1

1

10

1

1

1

1

1

1

1

1

1

0

GPIO15

10

0

VID3VID4

1

0

0

1

VID1

1

0

0

VID2

0

0

VDDC

1

0

0 0

1

0

1.100V

1

0

0

1

0

1

1

0

1.075V

1

0

1.025V

1

0

1.050V

Default

1.000V

10

0.975V

1

0.950V

1

110

0.925V

0

0.875V

1

0

0.900V

0.825V

GPIO29

0

0.850V

GPIO30

1

0.800V

GPIO20

1

1 0 1 0 0

1.15V00 1 1 1

VGA controller (43.1),Driver (43.2) Support component (43.3)

EMI Part (47.1)

+VGA_CORETDC 21AEDC 31.5AOCP current ??AFSW=??kHzDCR 1.4m ohm +-5%

TYP MAXH/S Rds(on) :11.7mohm , 14mohmL/S Rds(on) :2.7mohm , 3.3mohm

LA-A551P

GPU_ISUM-

GPU_ISUM+

GPU_ISUM+

DL_GPU

LX_GPU

BST_GPU

GPU_ISUM-

GPU_B+

DH_GPU

GP

U_V

ID1

<13>

GP

U_V

ID2

<13>

GP

U_V

ID3

<13>

GP

U_V

ID4

<13>

GP

U_V

ID5

<13>

PX

S_P

WR

EN

<14,8

>VGA_PWRGD<15,8>

GP

U_D

PR

SLP

VR

<13>

VCC_GPU_SENSE<16>

VSS_GPU_SENSE<16>

+5VALW

B+

+VGA_CORE

+5VALW

+3VGS

+3VS

+5VALW

+VGA_CORE

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.1

+VPU_COREP

C

37 40Tuesday, July 16, 2013

2012/09/27 2015/09/27

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.1

+VPU_COREP

C

37 40Tuesday, July 16, 2013

2012/09/27 2015/09/27

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.1

+VPU_COREP

C

37 40Tuesday, July 16, 2013

2012/09/27 2015/09/27

Compal Electronics, Inc.

PC8200.047U_0402_16V7K

PC8200.047U_0402_16V7K

1 2

PR

839

10K

_0402_1%

@

PR

839

10K

_0402_1%

@

12

PR813226K_0402_1%

PR813226K_0402_1%

1 2

PC81956P_0402_50V8

PC81956P_0402_50V8

1 2

PR8141_0603_5%

PR8141_0603_5%

12

PR8221.2K_0402_1%

PR8221.2K_0402_1%

12

PR8052.2_0603_5%

PR8052.2_0603_5%

12

PR81811K_0402_1%

PR81811K_0402_1%

1 2

PC811330P_0402_50V7K

PC811330P_0402_50V7K

12

PC814390P_0402_50V7K

PC814390P_0402_50V7K

1 2

PR

828

47K

_0402_1%

PR

828

47K

_0402_1%

12

PH7

10KB_0402_5%_ERTJ1VR103J

PH7

10KB_0402_5%_ERTJ1VR103J

1 2

PQ

802

S T

R T

PC

A8059-H

1N

PP

AK

56-8

PQ

802

S T

R T

PC

A8059-H

1N

PP

AK

56-8

4

5

123

PC8151000P_0402_50V7K

PC8151000P_0402_50V7K

12

PQ

801

S T

R T

PC

A8065-H

1N

PP

AK

56-8

PQ

801

S T

R T

PC

A8065-H

1N

PP

AK

56-8

4

5

123

PC816

680P_0603_50V7K

@EMI@

PC816

680P_0603_50V7K

@EMI@

12

PR835

120K_0402_1%

@ PR835

120K_0402_1%

@

12

PC8210.1U_0402_16V7K

PC8210.1U_0402_16V7K

1 2

PR7181.8K_0402_1%

PR7181.8K_0402_1%

12

PR8103.65K_0805_1%

PR8103.65K_0805_1%

12

PC8100.1U_0603_25V7K

PC8100.1U_0603_25V7K

12

PC8091000P_0402_50V7K

PC8091000P_0402_50V7K

12

PR8084.7_1206_5%

@EMI@

PR8084.7_1206_5%

@EMI@

12

PL801HCB2012KF-121T50_0805

EMI@PL801HCB2012KF-121T50_0805

EMI@

1 2

PR80410_0402_5%

PR80410_0402_5%

12

PR

825

0_0402_5%

@

PR

825

0_0402_5%

@

12

PR

830

10K

_0402_1%

@P

R830

10K

_0402_1%

@1

2

PQ

803

S T

R T

PC

A8059-H

1N

PP

AK

56-8

PQ

803

S T

R T

PC

A8059-H

1N

PP

AK

56-8

4

5

123

PR

824

0_0402_5%

@

PR

824

0_0402_5%

@

12

PL8020.36UH_PDME064T-R36MS_24A_20%PL8020.36UH_PDME064T-R36MS_24A_20%

1

3

4

2

PR8110_0402_5%@ PR8110_0402_5%@

12

PC

822

0.1

U_0402_16V

7K

PC

822

0.1

U_0402_16V

7K

12

PR

821

0_0402_5%

@

PR

821

0_0402_5%

@

12

PR80610_0402_5%

PR80610_0402_5%

1 2

PC

803

10U

_0805_25V

6K

PC

803

10U

_0805_25V

6K

12

+

PC

899

560U

_D

2_2V

M_R

4.5

M

+

PC

899

560U

_D

2_2V

M_R

4.5

M1

2

PR

838

10K

_0402_1%

@P

R838

10K

_0402_1%

@1

2

PR815

2.61K_0402_1%

PR815

2.61K_0402_1%

1 2

PR29

0_0402_5%

PR29

0_0402_5%

12

PR

832

10K

_0402_1%

PR

832

10K

_0402_1%

12

PR

833

10K

_0402_1%

@P

R833

10K

_0402_1%

@1

2

PC

807

0.2

2U

_0603_25V

7K

PC

807

0.2

2U

_0603_25V

7K

12

+

PC

900

330U

_D

2_2V

_Y

+

PC

900

330U

_D

2_2V

_Y1

2

PR816715_0402_1%

PR816715_0402_1%

1 2

PC8172.2U_0603_6.3V6K

PC8172.2U_0603_6.3V6K

12

PR

836

10K

_0402_1%

@P

R836

10K

_0402_1%

@1

2

PR8021_0603_5%

PR8021_0603_5%

12

PC8061U_0603_6.3V6M

PC8061U_0603_6.3V6M

12

PR8122.37K_0402_1%

PR8122.37K_0402_1%1 2

PR

837

10K

_0402_1%

PR

837

10K

_0402_1%

12

PC8181000P_0402_50V7K

PC8181000P_0402_50V7K

1 2

PR8178.06K_0402_1%

PR8178.06K_0402_1%

12

PU801ISL62881CHRTZ-T_TQFN28_4X4

PU801ISL62881CHRTZ-T_TQFN28_4X4

FB6

CLK_EN#1

PGOOD2

ISU

M+

10

ISU

M-

9

VID

525

VID121

LGATE18

VSSP17

VID

222

UGATE15

RT

N8

RBIAS3

VW4

COMP5

VID020

VCCP19

VID

323

VID

424

VID

626

VR

_O

N27

DP

RS

LP

VR

28

VSEN7

VD

D11

VIN

12

IMO

N13

BO

OT

14

PHASE16

AG

ND

29

PR841

0_0402_1%

PR841

0_0402_1%

12

PC812330P_0402_50V7K

PC812330P_0402_50V7K

12

PR

827

0_0402_5%

@

PR

827

0_0402_5%

@

12

PR

826

0_0402_5%

@

PR

826

0_0402_5%

@

12

PC

802

2200P

_0402_50V

7K

@E

MI@

PC

802

2200P

_0402_50V

7K

@E

MI@

12

PR

831

10K

_0402_1%

PR

831

10K

_0402_1%

12

PR80947K_0402_1%

PR80947K_0402_1%

12

PC

823

0.1

U_0402_16V

7K

PC

823

0.1

U_0402_16V

7K

12

PR8011_0603_5%

PR8011_0603_5%1 2P

C804

10U

_0805_25V

6K

PC

804

10U

_0805_25V

6K

12

PR

823

10K

_0402_1%

PR

823

10K

_0402_1%

12

PR

840

10K

_0402_1%

PR

840

10K

_0402_1%

12

Page 38: LA-A551PR10 ZEMAE 20130716 - Kythuatphancung

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

+APU_CORE +APU_CORE_NB

+VGA_CORE

+VDDC

LA-A551P

180P(0402)

1

kABINI 560uF*4.5m 10uF(0603)

1u(0402)

VDD

VDD_NB

1

1

1

2 9

12 1

CPU_Core output CAP (Including MLCC) 36.4

GFX output CAP (Including MLCC) 36.5

VGA_Core output CAP (Including MLCC 43.9)

330uF

1

22uF(0603)

2

2

+APU_CORE

+APU_CORE

+APU_CORE_NB+APU_CORE_NB

+VGA_CORE

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.1

PROCESSOR DECOUPLINGA3

38 40Tuesday, July 16, 2013

2012/09/27Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.1

PROCESSOR DECOUPLINGA3

38 40Tuesday, July 16, 2013

2012/09/27Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.1

PROCESSOR DECOUPLINGA3

38 40Tuesday, July 16, 2013

2012/09/27Compal Electronics, Inc.

PC

1042

10U

_0603_6.3

V6M

VGA@

PC

1042

10U

_0603_6.3

V6M

VGA@

12

PC

1016

1U

_0402_6.3

V6K

PC

1016

1U

_0402_6.3

V6K

12

PC

1057

1U

_0402_6.3

V6K

VGA@

PC

1057

1U

_0402_6.3

V6K

VGA@

12

PC

1001

22U

_0603_6.3

V6M

PC

1001

22U

_0603_6.3

V6M

12

PC

1008

10U

_0603_6.3

V6M

PC

1008

10U

_0603_6.3

V6M

12

PC

1019

180P

_0402_50V

8J

PC

1019

180P

_0402_50V

8J

12

+

PC

1100

560U

_D

2_2V

M_R

4.5

M

+

PC

1100

560U

_D

2_2V

M_R

4.5

M1

2

PC

1002

22U

_0603_6.3

V6M

PC

1002

22U

_0603_6.3

V6M

12

PC

1011

1U

_0402_6.3

V6K

PC

1011

1U

_0402_6.3

V6K

12

PC

1044

1U

_0402_6.3

V6K

VGA@

PC

1044

1U

_0402_6.3

V6K

VGA@

12

PC

1015

1U

_0402_6.3

V6K

PC

1015

1U

_0402_6.3

V6K

12

PC

1012

1U

_0402_6.3

V6K

PC

1012

1U

_0402_6.3

V6K

12

+

PC

1033

330U

_D

2_2V

_Y

@

+

PC

1033

330U

_D

2_2V

_Y

@

1

2

+

PC

1032

560U

_D

2_2V

M_R

4.5

M

+

PC

1032

560U

_D

2_2V

M_R

4.5

M

1

2

PC

1048

1U

_0402_6.3

V6K

VGA@

PC

1048

1U

_0402_6.3

V6K

VGA@

12PC

1078

1U

_0402_6.3

V6K

VGA@

PC

1078

1U

_0402_6.3

V6K

VGA@

12

PC

1051

1U

_0402_6.3

V6K

VGA@

PC

1051

1U

_0402_6.3

V6K

VGA@

12 PC

1052

1U

_0402_6.3

V6K

VGA@

PC

1052

1U

_0402_6.3

V6K

VGA@

12

+

PC

1101

330U

_D

2_2V

_Y

+

PC

1101

330U

_D

2_2V

_Y1

2

PC

1056

1U

_0402_6.3

V6K

VGA@

PC

1056

1U

_0402_6.3

V6K

VGA@

12

PC

1018

1U

_0402_6.3

V6K

PC

1018

1U

_0402_6.3

V6K

12

PC

1061

1U

_0402_6.3

V6K

VGA@

PC

1061

1U

_0402_6.3

V6K

VGA@

12

PC

1010

1U

_0402_6.3

V6K

PC

1010

1U

_0402_6.3

V6K

12

PC

1053

1U

_0402_6.3

V6K

VGA@

PC

1053

1U

_0402_6.3

V6K

VGA@

12

PC

1003

1U

_0402_6.3

V6K

PC

1003

1U

_0402_6.3

V6K

12

PC

1069

1U

_0402_6.3

V6K

VGA@

PC

1069

1U

_0402_6.3

V6K

VGA@

12

PC

1027

1U

_0402_6.3

V6K

PC

1027

1U

_0402_6.3

V6K

12

PC

1006

1U

_0402_6.3

V6K

PC

1006

1U

_0402_6.3

V6K

12

PC

1045

1U

_0402_6.3

V6K

VGA@

PC

1045

1U

_0402_6.3

V6K

VGA@1

2

PC

1024

1U

_0402_6.3

V6K

PC

1024

1U

_0402_6.3

V6K

12

PC

1058

1U

_0402_6.3

V6K

VGA@

PC

1058

1U

_0402_6.3

V6K

VGA@

12

PC

1017

1U

_0402_6.3

V6K

PC

1017

1U

_0402_6.3

V6K

12

PC

1007

22U

_0603_6.3

V6M

PC

1007

22U

_0603_6.3

V6M

12

PC

1043

10U

_0603_6.3

V6M

VGA@

PC

1043

10U

_0603_6.3

V6M

VGA@

12

PC

1054

1U

_0402_6.3

V6K

VGA@

PC

1054

1U

_0402_6.3

V6K

VGA@

12

PC

1004

1U

_0402_6.3

V6K

PC

1004

1U

_0402_6.3

V6K

12

PC

1062

1U

_0402_6.3

V6K

VGA@

PC

1062

1U

_0402_6.3

V6K

VGA@

12 PC

1066

1U

_0402_6.3

V6K

VGA@

PC

1066

1U

_0402_6.3

V6K

VGA@

12

PC

1000

10U

_0603_6.3

V6M

PC

1000

10U

_0603_6.3

V6M

12

PC

1040

10U

_0603_6.3

V6M

VGA@

PC

1040

10U

_0603_6.3

V6M

VGA@1

2

PC

1028

1U

_0402_6.3

V6K

PC

1028

1U

_0402_6.3

V6K

12

PC

1023

1U

_0402_6.3

V6K

PC

1023

1U

_0402_6.3

V6K

12

PC

1049

1U

_0402_6.3

V6K

VGA@

PC

1049

1U

_0402_6.3

V6K

VGA@

12

PC

1065

1U

_0402_6.3

V6K

VGA@

PC

1065

1U

_0402_6.3

V6K

VGA@

12

PC

1041

10U

_0603_6.3

V6M

VGA@

PC

1041

10U

_0603_6.3

V6M

VGA@

12

PC

1046

1U

_0402_6.3

V6K

VGA@

PC

1046

1U

_0402_6.3

V6K

VGA@

12

PC

1055

1U

_0402_6.3

V6K

VGA@

PC

1055

1U

_0402_6.3

V6K

VGA@

12

PC

1064

1U

_0402_6.3

V6K

VGA@

PC

1064

1U

_0402_6.3

V6K

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12 PC

1067

1U

_0402_6.3

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VGA@P

C1067

1U

_0402_6.3

V6K

VGA@

12

PC

1021

1U

_0402_6.3

V6K

PC

1021

1U

_0402_6.3

V6K

12

PC

1029

1U

_0402_6.3

V6K@

PC

1029

1U

_0402_6.3

V6K@

12

PC

1013

1U

_0402_6.3

V6K

PC

1013

1U

_0402_6.3

V6K

12

PC

1050

1U

_0402_6.3

V6K

VGA@

PC

1050

1U

_0402_6.3

V6K

VGA@

12

PC

1047

1U

_0402_6.3

V6K

VGA@

PC

1047

1U

_0402_6.3

V6K

VGA@

12PC

1076

1U

_0402_6.3

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PC

1076

1U

_0402_6.3

V6K

VGA@

12

PC

1060

1U

_0402_6.3

V6K

VGA@

PC

1060

1U

_0402_6.3

V6K

VGA@

12

PC

1005

22U

_0603_6.3

V6M

PC

1005

22U

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1077

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_0402_6.3

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1077

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1022

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1022

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PC

1025

1U

_0402_6.3

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1025

1U

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12 P

C1026

1U

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1026

1U

_0402_6.3

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PC

1009

10U

_0603_6.3

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PC

1009

10U

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PC

1059

1U

_0402_6.3

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VGA@

PC

1059

1U

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V6K

VGA@

12

PC

1079

1U

_0402_6.3

V6K

VGA@

PC

1079

1U

_0402_6.3

V6K

VGA@

12

PC

1063

1U

_0402_6.3

V6K

VGA@

PC

1063

1U

_0402_6.3

V6K

VGA@

12PC

1068

1U

_0402_6.3

V6K

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1068

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12

PC

1020

1U

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1020

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1036

180P

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1036

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12

Page 39: LA-A551PR10 ZEMAE 20130716 - Kythuatphancung

5

5

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2

2

1

1

D D

C C

B B

A A

Ite m Tim e (W he n) Page (W he re ) L ocat ion / Discr ipt ion ( How / W hat) Re que st (W ho) for de sign change

1 DV T--2 0 1 3 /0 5 / 0 3 P3 2 -PW R-CHARGER PR2 4 8 /Re m ove 1 0 K PW R double count for parts

2 DV T--2 0 1 3 /0 5 / 0 3 P3 3 -PW R-3 V AL W /5 V AL W PR3 3 7 PR3 5 7 /change to 1 0 7 K 1 5 0 K PW R For 3 /5 V O CP Se tt ing

3 DV T--2 0 1 3 /0 5 / 0 3 P3 4 -PW R-+1 .5 V P/0 .7 5 V SP PR1 5 8 / change to 1 5 K PW R For 1 .5 V O CP Se tt ing

4 DV T--2 0 1 3 /0 5 / 0 3 P3 4 -PW R-+1 .5 V P/0 .7 5 V SP PC1 5 7 / change to 2 2 0 U PW R for de sign change

5 DV T--2 0 1 3 /0 5 / 0 3 P3 4 -PW R-+1 .5 V P/0 .7 5 V SP PL 1 5 2 / change PN PW R Com m on w ith PL 4 0 1 (1 UH)

6 DV T--2 0 1 3 /0 5 / 0 3 P3 5 -PW R_+1 .8 V A L W P/+0 .9 5 V AL W P PR4 0 5 /Re m ove 1 0 K PW R EC pull low 1 0 k

7 DV T--2 0 1 3 /0 5 / 0 3 P3 6 -PW R-CPU_CO RE/V DDN BP PQ 5 0 4 PQ 5 0 8 / Re m ove TPCA8 0 5 9 PW R For 1 5 W APU

8 DV T--2 0 1 3 /0 5 / 0 7 P3 8 -PW R-PRO CESSO R DECO UPL IN G

PC1 0 4 4 ,PC1 0 4 5 ,PC1 0 4 6 ,PC1 0 4 7 ,PC1 0 4 8 ,

PC1 0 4 9 ,PC1 0 5 0 ,PC1 0 5 1 ,PC1 0 5 2 ,PC1 0 5 3 ,

PC1 0 5 4 ,PC1 0 5 5 ,PC1 0 5 6 ,PC1 0 5 7 ,PC1 0 5 8 ,

PC1 0 5 9 ,PC1 0 6 0 ,PC1 0 6 1 ,PC1 0 6 2 ,PC1 0 6 3 ,

PC1 0 6 4 ,PC1 0 6 5 ,PC1 0 6 6 ,PC1 0 6 7 ,PC1 0 6 8 ,

PC1 0 6 9 , PC1 0 7 6 , PC1 0 7 7 ,PC1 0 7 8 ,PC1 0 7 9

PW R Re m ove V GA M L CC

9 DV T--2 0 1 3 /0 5 / 0 7 P3 8 -PW R-PRO CESSO R DECO UPL IN G PC1 0 4 0 ,PC1 0 4 1 ,PC1 0 4 2 ,PC1 0 4 3 PW R Re m ove V GA M L CC

1 0 PV T--2 0 1 3 /0 6 /1 0 P3 8 -PW R-PRO CESSO R DECO UPL IN G PC1 0 0 6 / add 1 U PW R for APU Transie nt te st

1 1 PV T--2 0 1 3 /0 6 /1 0 P3 8 -PW R-PRO CESSO R DECO UPL IN G PC1 0 0 1 ,PC1 0 0 2 / change 2 2 U PW R for APU Transie nt te st

1 2 PV T--2 0 1 3 /0 6 /1 0 P3 8 -PW R-PRO CESSO R DECO UPL IN G PC1 1 0 1 / change 3 3 0 U PW R for APU Transie nt te st

1 3 PV T--2 0 1 3 /0 6 /1 0 P3 5 -PW R_+1 .8 V A L W P/+0 .9 5 V AL W P PC4 1 2 /add 2 2 U PW R for 0 .9 5 v Ripple

1 4 PV T--2 0 1 3 /0 6 /1 0 P3 3 -PW R-3 V AL W /5 V AL W PC3 5 3 / change to 1 5 0 U PW R for 3 /5 V de sign change

1 5 PV T--2 0 1 3 /0 6 /1 0 P3 3 -PW R-3 V AL W /5 V AL W PC3 5 4 / change to 1 0 0 U PW R for 3 /5 V de sign change

1 6 PV T--2 0 1 3 /0 6 /1 0 P3 3 -PW R-3 V AL W /5 V AL W PC3 4 3 / add 4 .7 U PW R for 3 /5 V de sign change

1 7 PV T--2 0 1 3 /0 6 /1 0 P3 6 -PW R-CPU_CO RE/V DDN BP PC5 4 0 PC5 5 5 / change to 0 .1 U PW R for APU Transie nt te st

1 8 PV T--2 0 1 3 /0 6 /1 7 P3 3 -PW R-3 V AL W /5 V AL W PR3 3 7 /change to 1 5 4 K PW R for 3 V O CP Se tt ing

1 9 PV T--2 0 1 3 /0 6 /1 7 P3 6 -PW R-CPU_CO RE/V DDN BP PC5 3 8 ,PC5 5 2 / change to SE0 7 1 1 0 1 J8 0 PW R SE0 6 8 1 0 1 K8 0 - X1 Code

2 0 Pre M P--2 0 1 3 /0 7 /1 5 P3 8 -PW R-PRO CESSO R DECO UPL IN G PC1 0 0 5 PC1 0 0 7 / change 2 2 U PW R for APU_N B Transie nt te st

Version change list (P.I.R. List) Page 1 of 1 for PWR

Reason for change PG# Modify List Date PhaseItem

ZRMAE

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

1.0

PIR (PWR)

Custom

39 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

1.0

PIR (PWR)

Custom

39 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

Compal Electronics, Inc.Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

1.0

PIR (PWR)

Custom

39 40Tuesday, July 16, 2013

2013/05/15 2015/09/27

Compal Electronics, Inc.

Page 40: LA-A551PR10 ZEMAE 20130716 - Kythuatphancung

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C C

B B

A A

HW PIR (Product Improve Record)ZEMAE LA-A551P SCHEMATIC CHANGE

LIST

REVISION CHANGE: 0.1 to 0.2

---------------------------------------------------------------------------------------------------------------------------------

NO. DATE PAGE MODIFICATION LIST PURPOSE

---------------------------------------------------------------------------------------------------------------------------------

1. 05/29 P24. Delete RR2,RR3,RR7,RR6,RR12,RB7 for USB trace. Part conut reduce

2. 05/29 P24. Change CR13 to 0603. HW4 Common design

3. 05/29 P24. Delete SLP_CHG_CB0 & SLLP_CHG_CB1 from APU. Reduce reserve

4. 05/29 P24,27,28. EC_CHG_CB2(GPIO1A) move to GPIO12、、、、ADD NUM_LED#(JKB5.1 to JUB1.36) Design change

5. 05/30 P08. Add QC2 and connect HDMI_HDP_N to HDMI_HDP. For HDMI utility

6. 05/30 P08. Delete T24,T25,T27 For RTC issue

7. 05/30 P08. Add RC3 15K pull down and reserve RC12,RC16,RC17 pull +3VALW_APU and RC5,RC11 pull gnd. For RTC issue

8. 06/03 P24. Change CR3&CR2 47u 0805 to CR6&CR10 and CR4&CR5 22u 0603 For hight limit

9. 06/03 P10. Change CD43 from 47u 0805 to CD43&CD44 22u*2 0603 For hight limit

10. 06/03 P09. Change CC14 from 47u 0805 to CC14&CC16 22u*2 0603 For hight limit

11. 06/07 P22. Reserve varistor DL14 for LANGND to DGND For ESD request

12. 06/07 P22. Add diode DL5 for LANGND to DGND For ESD request

13. 06/07 P26. Remove RA18 and RA24 Remove reserve 0 ohm

14. 06/07 P25. Add C18 0.1uF 0402 on +USB_VCCC close to JSB5 For EMI request

15. 06/10 P20. Change C17 form 1500P to 0.015uF For LCD sequence

16. 06/10 P25. Remove 0ohm for 14 and 15 and add LR10 and LR9 For part count reduce

17. 06/11 P26. Change LA7 and LA6 form 0402 to 0603 size For EMI request

18. 06/11 P25. Swap LR7/LR8 pin1&4 and pin3&2 For layout smooth

19. 06/11 P24. Add test point for S&C IC T10&T11&T24 For NPI debug

20. 06/13 P28. Change H4&H5 form H_3P3 to H_3P2 For ME limite

21. 06/14 P21. Colay RY4,RY5,RY6,RY7,RY8,RY9,RY10,RY11 with HDMI chock For EMI request

ZEMAE LA-A551P SCHEMATIC CHANGE

LIST

REVISION CHANGE: 0.2 to 1.0

---------------------------------------------------------------------------------------------------------------------------------

NO. DATE PAGE MODIFICATION LIST PURPOSE

---------------------------------------------------------------------------------------------------------------------------------

1. 07/05 All Change R2,R130,RC116,RC117,RC119,RC120,R106,RA22,RA25,RA1,RA21,LA8 to shortpad MP Part reduce

2. 07/05 P28 Delete SW5 Remove debug part

3. 07/05 P29 Reserve QC1B Remove non-used part

4. 07/05 P06 Add APU_CRT_R/G/B pull 75ohm to GND For disable CRT

5. 07/05 P08 Change CC31 form 10P to 8PF XTRAL PPM fine tune

6. 07/08 P28 Change H20 screw hole to 2.7mm from 2.8mm ME change

7. 07/08 P08 Add RC11 15K pull GND AMD request

8. 07/08 P26 Change LA8 shortpad form 0402 to 0603 EMI request

9. 07/11 P28 Change C24 100pF cap to D32 100p varistor ESD request

10. 07/15 P24 Update PCB footprint DFB request

Title

Size Document Number Rev

Date: Sheet of

LA-A551P 1.0

HW PIR

B

40 40Tuesday, July 16, 2013

Title

Size Document Number Rev

Date: Sheet of

LA-A551P 1.0

HW PIR

B

40 40Tuesday, July 16, 2013

Title

Size Document Number Rev

Date: Sheet of

LA-A551P 1.0

HW PIR

B

40 40Tuesday, July 16, 2013