l1 Crystal Structure Growth

8/3/2019 l1 Crystal Structure Growth

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CRYSTAL STRUCTURES


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Basic Crystal Structures


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Atomic Order

Crystal Structure Amorphous Structure


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Miller Indices of Crystal Planes

Z

X

Y

(100)

Z

X

Y

(110)

Z

X

Y

(111)


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Silicon has the basic diamond crystal structure

two merged FCC cells offset by a/4 in x, y and z.

Silicon Crystal Structure


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Basic FCC Cell Merged FCC Cells

Omitting atoms

outside Cell Bonding of Atoms


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Various types of defects can exist in a crystal (or can

be created by processing steps). In general, these

cause electrical leakage and results in poorer device

qualities.

(Extra plane of atoms)


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Point Defects

Vacancy defect

Interstitial defect Frenkel defect


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Line Defect

1 dimensional

Edge dislocation missingrow of atoms (or extra half-plane of atoms)

Caused by thermal stresseswithin crystal or due toexcess interstitials

Damages electrical

properties

need to beavoided during thermalprocessing

Extra half

plane


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Area defect: 2 Dimensional. Stacking faults.

Volume Defect: 3 Dimensional. Precipitate.


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CRYSTAL

GROWTH


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Czochralski growth

Technique for producing crystals from whichsemiconductor wafers are cut.

Developed by Czochralski in 1918. Main process: solidification of a crystal from

a melt.

Material used: Electronic GradePolycrystalline Silicon.


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Electronic Grade Silicon

Step1: Metallurgical grade Si from SiO2 (quartzite)Quartzite is heated with coke, charcoal, etc in an electric

arc furnace to give 98% pure Si SiO2 (s) + 2C (s) = Si (l) + 2CO

6 to 8hr process (2350C)

Step 2: Si is treated with anhydrous HCl at 300C to form tri-chloro Silane (SiHCl3)

Si + 3HCl = SiHCl3 + H2

Step 3: Fractional distillation of SiHCl3 to remove unwantedimpurities SiHCl3 is a liquid at room temperature with a boiling point of

32C


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Step 4: Reduction of SiHCl3 in Hydrogen to formElectronic Grade Si (EGS)

SiHCl3 + H2 = Si + 3HCl

Impurity in ppb range.

Polycrystalline Si obtained.

99.999999% pure.


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Czochralski Growth

Heat EGS around 15000C.

Insert single crystal seed.

Rotate and pull the seed.

Pull rate initially fast. Thenslowed down.

Atom layer with sameorientation as that of seed isdeveloped.

Diameter vary with speed ofpulling.


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Pure Si ingots


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Solidification: by reduction in temperature Increased pull rate: material cannot solidify

as heat will not be conducted away.

Material near melt has higher density of pointdefects.

Hence cool quickly to prevent agglomerationof defects.

Point defects agglomerate and form mostcommonly dislocation loops.


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During the process

Considerable O2 is released from silica. 95% escape from surface as SiO. Reduction of O2 concentration: grow boule

under magnetic confinement. Field directed along the length of boule. Creates Lorentz force (qvB) which will change

the motion of ionized impurities in the melt insuch a manner so as to keep them away fromliquid-solid interface.


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Dopant addition

Dopant may be introduced in the melt.Wafer with desired resistivity.

Boron and Phosphorous commonly for Si Complicated since impurities tend to

segregate at solid-liquid interface. Segregation co-efficient, k = CS/CLCS,CL impurity concentration at solid &

liquid sides


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Impurity concentration in the solid(Cs) at any point can be obtained asa function of initial liquidconcentration Co, distributioncoefficient k as:

where X is the fraction of liquidsolidified.

This assumes well-mixed liquid.However, in reality, the liquid isnot well mixed due to existence ofre-circulation cells.


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The ends of the boule are richer in impuritiesbecause of segregation effects.

When the final amount of liquid solidifies, allthe remaining impurities are trapped.


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Float-Zone Process/Zone refining

Makes use of thesegregation effectintentionally.

Basic principle: A moltenmetal when gradually cooled,crystallizes into ultra puremetal. The impuritiescontinue to be in the moltenstate and flow away fromthe crystallized metal.


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Zone refining consistsof repeated passesthrough the solid by aliquid zone. When thefinal amount of liquid

solidifies, all theremaining impurities aretrapped.

After each pass theimpurity levels in the

front end of the rodkeeps reducing whilethat of the finalsolidifying part keepsincreasing.


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Seed crystal isinjected into the top

of the molten rod. RF coil passed along

the length.

Molten silicon retainedby surface tension andsupported by the solidpart.

Since no crucible isused, contaminationfrom crucible isavoided.

RF

Gas inlet (inert)

Molten zone

Travel

ing RF

coil

Polysilicon

rod

Seed crystal

Inert gas outChuck

Chuck


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Disadvantage: difficult to introduce uniformconcentration of dopants.

Thin neck: ~3 mm diameterand 10-20 mm long is pulled.

Pull rate and temperaturelowered to shoulder thecrystal to larger diameter.

Can be used for boules with

less weight (molten regionshould support the weight ofentire rod).


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Challenges associated with growth of GaAs:

Vapor pressure of Ga is 0.001atm while that of As is~ 10atm at melting point (1238C).Arsenic evaporates and maintaining stoichiometry

will be difficult. The thermal conductivity of GaAs (0.07W/cm-K) is

1/3rd of that of silicon (0.21W/cm-K)Heat dissipation is more difficult

Critical resolved shear stress for creating dislocationis very small (1/4th of silicon) at mp

Very easy to create dislocations in GaAs


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GaAs is typically grown by LEC or Bridgmanmethods

Bridgman technique : widely used LEC for larger diameter ingots.


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Liquid encapsulated Czochralski

A sealant material such as B2O3 isused on top of GaAs to preventout diffusion of Arsenic.

B2O3 melts at ~400C and seals

GaAs. Seed crystal is inserted through

sealant on to GaAs.

Crystal growth occurs usually at~20atm (high pressure LEC).

Graphite crucible used.

Segregation coefficient similar tothat of Si.


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Liquid encapsulated Czochralski

Sealant should have following properties: Impervious to As diffusion Chemical resistance to GaAs

Optically transparent Lower density than molten GaAs (1.5gm/cc to 5.7gm/cc for

GaAs) B2O3, CaCl2, BaCl2

Less Ox contamination; but B gets incorporated As B2O3 increases heat transfer, increased chances

for defects Annealing or alloying with Indium reduces defects


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Bridgman technique

Solid Ga and As are fusedinto a graphite ampoule,which is later sealed.

Separate As chamber

sometimes included in quartztube with small orifice tomaintain stoichiometry

Tube furnace is made to passthrough trough containing

ampoule (ampoule keptstationary to minimizedisturbance). Smaller temperature

gradients result in lowerdislocation densities


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Wafer Finishing

Boule characterized for resistivity andcrystal perfection

Mechanically trimmed into proper diameter Flats are introduced over the entire length of

the boule

Etching in HF-HNO3 to remove damage fromgrinding


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Wafer finishing

Wafer slicing: critical step determines flatness Lapping (using Al2O3 + glycerin slurry) grind both

sides, flatness ~2-3 mm

Edge profiling Chemical etching to remove surface damaged layer Polishing chemical-mechanical polish, SiO2/NaOH

slurry

cleaning and inspection

l1 Crystal Structure Growth

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