5 5 4 4 3 3 2 2 1 1 D D C C B B A A KITPF7100FRDMEVM 1 TITLE, TOC & REV 3 Table of Contents 2 BLOCK DIAGRAM PMIC Revisions Rev Description Initial schematic Date X1 17-JAN-2019 B2 Wenhua Chen Kate Fan Wenhua Chen KL25, CONNECTOR, AMUX 4 APPENDIX JUMPER/DNP/SWITCH 5 A Release A085 4-MAR-2019 B 1.Solved the J1 mirror problem. 2. Changed J27.3,J26.3,R103.1,R78.1,R85.1 pin nets from VIN_PIN to VIN. 3. Changed FSOB and PWRON pull up resistors from 470K to 100K. 31-MAY-2019 B1 Update the board name. 15-Aug-2019 B2 Update U1 part number to PPF7100AVBA0ES. 25-Sep-2019 Drawing Title: Size Document Number Rev Date: Sheet of Page Title: Designer: Drawn by: Approved: Analog Sensor Product Group 6501 William Cannon Drive West Austin, TX 78735-8598 This document contains information proprietary to NXP and shall not be used for engineering design, procurement or manufacture in whole or in part without the express written permission of NXP Semiconductors. ICAP Classification: CP: IUO: PUBI: SCH-45772 PDF: SPF-45772 KITPF7100FRDMEVM C Wednesday, September 25, 2019 TITLE 1 5 X ____ ____ Drawing Title: Size Document Number Rev Date: Sheet of Page Title: Designer: Drawn by: Approved: Analog Sensor Product Group 6501 William Cannon Drive West Austin, TX 78735-8598 This document contains information proprietary to NXP and shall not be used for engineering design, procurement or manufacture in whole or in part without the express written permission of NXP Semiconductors. ICAP Classification: CP: IUO: PUBI: SCH-45772 PDF: SPF-45772 KITPF7100FRDMEVM C Wednesday, September 25, 2019 TITLE 1 5 X ____ ____ Drawing Title: Size Document Number Rev Date: Sheet of Page Title: Designer: Drawn by: Approved: Analog Sensor Product Group 6501 William Cannon Drive West Austin, TX 78735-8598 This document contains information proprietary to NXP and shall not be used for engineering design, procurement or manufacture in whole or in part without the express written permission of NXP Semiconductors. ICAP Classification: CP: IUO: PUBI: SCH-45772 PDF: SPF-45772 KITPF7100FRDMEVM C Wednesday, September 25, 2019 TITLE 1 5 X ____ ____
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5
5
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1
D D
C C
B B
A A
KITPF7100FRDMEVM
1 TITLE, TOC & REV
3
Table of Contents
2 BLOCK DIAGRAMPMIC
Revisions
Rev Description
Initial schematic
Date
X1 17-JAN-2019
B2
Wenhua Chen
Kate Fan
Wenhua Chen
KL25, CONNECTOR, AMUX4APPENDIX JUMPER/DNP/SWITCH5 A Release A085 4-MAR-2019
B1.Solved the J1 mirror problem.2. Changed J27.3,J26.3,R103.1,R78.1,R85.1 pin nets from VIN_PIN to VIN.3. Changed FSOB and PWRON pull up resistors from 470K to 100K.
31-MAY-2019
B1 Update the board name. 15-Aug-2019
B2 Update U1 part number to PPF7100AVBA0ES. 25-Sep-2019
Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
Designer:
Drawn by:
Approved:
Analog Sensor Product Group6501 William Cannon Drive WestAustin, TX 78735-8598
This document contains information proprietary to NXP and shall not be used for engineering design,procurement or manufacture in whole or in part without the express written permission of NXP Semiconductors.
ICAP Classification: CP: IUO: PUBI:
SCH-45772 PDF: SPF-45772
KITPF7100FRDMEVM
C
Wednesday, September 25, 2019
TITLE
1 5
X________Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
Designer:
Drawn by:
Approved:
Analog Sensor Product Group6501 William Cannon Drive WestAustin, TX 78735-8598
This document contains information proprietary to NXP and shall not be used for engineering design,procurement or manufacture in whole or in part without the express written permission of NXP Semiconductors.
ICAP Classification: CP: IUO: PUBI:
SCH-45772 PDF: SPF-45772
KITPF7100FRDMEVM
C
Wednesday, September 25, 2019
TITLE
1 5
X________Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
Designer:
Drawn by:
Approved:
Analog Sensor Product Group6501 William Cannon Drive WestAustin, TX 78735-8598
This document contains information proprietary to NXP and shall not be used for engineering design,procurement or manufacture in whole or in part without the express written permission of NXP Semiconductors.
ICAP Classification: CP: IUO: PUBI:
SCH-45772 PDF: SPF-45772
KITPF7100FRDMEVM
C
Wednesday, September 25, 2019
TITLE
1 5
X________
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BLOCK DIAGRAM
Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: CP: IUO: PUBI:
SCH-45772 PDF: SPF-45772 B2
KITPF7100FRDMEVM
C
Wednesday, September 25, 2019
BLOCK DIAGRAM
2 5
___ X Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: CP: IUO: PUBI:
SCH-45772 PDF: SPF-45772 B2
KITPF7100FRDMEVM
C
Wednesday, September 25, 2019
BLOCK DIAGRAM
2 5
___ X Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: CP: IUO: PUBI:
SCH-45772 PDF: SPF-45772 B2
KITPF7100FRDMEVM
C
Wednesday, September 25, 2019
BLOCK DIAGRAM
2 5
___ X
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
NOTE:VDDOTP = GND, the device loadsthe configuration from the OTPFuses
VDDOTP = V1P5D, the device loadsthe configuration from thedefault hardwire configuration.
Vout =1.242V*(R2/R1+1)
TBBEN
NOTE:TBBEN = GND, the deviceoperates in normal mode (fullfunctionality)
TBBEN = V1P5D, the deviceenters TBB configuration andlimited functionality. TBBregisters can be set and thenwill be loaded after PWRONevent.
VSELECT
LDO2EN
SW1 and SW2 single phase modeOperation mode
SW1/SW2/SW3/SW4 Quad phase mode
SW3/SW4 Dual phase modeSW3 and SW4 single phase mode
NOTE: Use single 12 Row connector to connectSlave side from primary EVB to Master side of 2ndEVB. Resistors can be configured on primary boardfor specific configurations.
Master/Slave Connector
Populate the following connectors on the Freedom board (female with long pins, low insertion):SSQ-106-23-G-D / 210-80515SSQ-110-23-G-D / 210-80513SSQ-108-23-G-D (x2) / 210-80247
AMUX 1I2C Address: 0b10010000x48
AMUX 2I2C Address: 0b10010010x49
��� ���� � NOTE: Secondary AMUX is intended for Softwarepurposes. GUI can use this to enable livemonitoring instead of using AMUX on PF8100/8200AMUX uses the best of supply from P3V3 Freedomsupply and VIN.
SECONDARY AMUX
��������������
P3V3_FRDM
P5V_USB
P3V3_FRDM
VIN
VIN_AMUX
VIN_AMUX
VIN_AMUX
VIN_AMUX
VIN_AMUX
VIN_AMUX
VIN_AMUX2V5_ADC
VIN_AMUX
SCL13SDA13
INTB3WDI3
PGOOD3TBBEN3
EWARN3
PWRON3
STANDBY3
RESETBMCU3VSELECT3
LDO2EN3XINTB3
AMUX 3
XFAILB3
SW1OUT3SW2OUT3SW3OUT3SW4OUT3
VSNVS23
VIN_PIN3
VSNVS13
SW5OUT3
LDO1OUT3
LDO2OUT3
SYNCIN3SYNCOUT3
FSOB 3
Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: CP: IUO: PUBI:
SCH-45772 PDF: SPF-45772
KITPF7100FRDMEVM
C
Wednesday, September 25, 2019
KL25Z I/O, Connector, AMUX
4 5
___ X Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: CP: IUO: PUBI:
SCH-45772 PDF: SPF-45772
KITPF7100FRDMEVM
C
Wednesday, September 25, 2019
KL25Z I/O, Connector, AMUX
4 5
___ X Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: CP: IUO: PUBI:
SCH-45772 PDF: SPF-45772
KITPF7100FRDMEVM
C
Wednesday, September 25, 2019
KL25Z I/O, Connector, AMUX
4 5
___ X
R20 0
R31 0
R26 100K
-
+
U5AAD8606ARMZ-R7
3
21
R35 4.7K
J6
SKT_2X8
1 23 4
657 89 10
11 1213 1415 16
C881uF
R3 0
R11 0DNP
R19 0
J5
SKT_2X6
1 23 4
657 89 10
11 12
R6 0
R13 0
J2
CON_2X10
1234
6 57891011121314151617181920
R22 0
TP13
J1
SKT_2X8
1234
6 578910111213141516
R30 0
J3
HDR_2x12
1 23 4
657 89 10
11 1213 1415 1617 1819 2021 2223 24
R8 0
J33HDR1X2JUMPER[DEFAULT] = 1-2
12R17 100K
-
+V-
V+
U5BAD8606ARMZ-R7
5
67
48
R18 0
R34100K
R24 0
ADG715
U3
SCL1
SDA3
S15
S27
S39
S411
S514
S616
S718
S820
A122
RESET23
A024
D16
D28
D310
D412
D513
D615
D717
D819
VD
D2
GN
D4
VS
S21
R43100K
R29 0
D6 CMDSH2-3A C
R9 0
R32 100K
R4 0
C890.1uF R42 100K
R39100K
C860.1uF
R16 0
ADR3425ARJZ
U6
VOUT_SENSE5
VIN4
ENABLE3
VOUT_FORCE6
GND_SENSE2
GND_FORCE1
C850.1uF
R38 100K
R41100K
R21 0
R12 0
TP17
R40 100K
J32HDR1X2JUMPER[DEFAULT] = 1-2
12
R33 0
R27100K
ADG715
U4
SCL1
SDA3
S15
S27
S39
S411
S514
S616
S718
S820
A122
RESET23
A024
D16
D28
D310
D412
D513
D615
D717
D819
VD
D2
GN
D4
VS
S21
R7 0
R14 100K
C870.1uF
C830.1uF
R106 0DNP
R10 0DNP
R15 0
R23 0
R5 0
R28 0
R36 4.7K
D5 CMDSH2-3A C
R37100K
C840.1uF
R1 0
R2 0
R25 0
ADC_0ADC_12V5_ADC
MUX_RESETB
TBBEN2
SDA2SCL2
RESETBMCUINTB
XINTBWDIPWRONSTANDBYSCL1SDA1TBBEN
RESETBMCU_SINTB_SSYNCIN_S
WDI_SPWRON_SSTANDBY_SSCL_SSDA_STBBEN_SXFAILB_S
RESETBMCU PWRON_S
RESETBMCU_S
INTB INTB_S
SYNCIN_SSYNCOUT
XINTB INTB_S
WDI WDI_S
PWRON PWRON_S
STANDBY STANDBY_S
SCL1 SCL_S
SDA1 SDA_S
TBBEN2 TBBEN_S
XFAILB XFAILB_S
SCL2SDA2 MUX_RESETB
SCL2SDA2
VIN_PIN_HALFVSNVS1_HALF
SW5OUT_HALFLDO1OUT_HALFLDO2OUT_HALF
VIN_PIN_HALF
VSNVS1_HALF
SW5OUT_HALF
LDO1OUT_HALF
LDO2OUT_HALF
ADC_1ADC_0
MUX_RESETB
5
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4
3
3
2
2
1
1
D D
C C
B B
A A
REF DES JUMPER[DEFAULT] JUMPER[OPTION] PAGE NAMEJ28,J7,J11,J31,J20,J39,J15,J22