GE B90 Presentation

7/25/2019 GE B90 Presentation

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B90 Bus Differential Relay and Breaker Failure Protection

Cost-efficient

Good performance

Modern communications capability

Member of the Universal Relay (UR) family Easy integration with other URs

Common configuration tool for all !" #E$s

%roven algorithms (&") and hardware (UR)

E'pandable

wo levels of scalability (modules and #E$s)


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NEW!

Busbar Protection Schemes

igh-impedance * linear couplers

non-configurable busbars

cheap relay+ e'pensive primary e,uipment

locing schemes for simple busbars

.nalog low * medium - impedance schemes

$igital relays for small busbars

$igital relays for large busbars %hase-segregated cost-efficient digital relays

for large busbars

B90

B30

BUS

PVD

Any

SPD

GE offer Approach


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Why Digital Bus Relay?

Re-configurable busbars re,uire dynamic assignmentof currents to multiple /ones

e'pensive and dangerous when done e'ternally onsecondary currents (analog way)

natural and safe when done 0in software1

reaer 2ail for re-configurable busbars is naturallyintegrated with the bus protection

3o need for special Cs (cost)

Rela'ed re,uirements for the Cs (cost)

.dvantages of digital technology


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Design hallenges for Digital Busbar Relays

Reliability 4ecurity5

#mmunity to C saturation

#mmunity to wrong input information

6arge number of inputs and outputs re,uired5

.C inputs (tens or hundreds)

rip rated output contacts (tens or hundreds)

7ther output contacts (tens)

$igital #nputs (hundreds)

6arge processing power re,uired to handle al the data


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!raditionally !"o Distincti#e $rchitectures are %ffered

2its better new installations

%erceived less reliable

4lower

5 2

D A U

5 2

D A U

5 2

D A U

C U

c o p p e r

f i b e r

Distributed Bus Protection

5 2 5 2 5 2

C U

c o p p e r

entrali&ed Bus Protection

2its better retrofit installations

%erceived more reliable

%otentially faster


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!

iA" #A

'e" $rchitecture ( Digital Phase)Segregated Busbar Scheme

2oundation5

4ingle-phase #E$s for primary

differential protection

4eparate #E$s for reaer

2ailure and e'tra #*7s

#nter-#E$ communications for

sharing digital states

4calability and fle'ibility

Phase A

ProtectionTRIPA

iB" #

B

Phase B

ProtectionTRIP

B

i$" #$Phase C

ProtectionTRIPC

Breaerai"#re


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B90 a*acity

Up to 89 circuits in a single /one without voltage

supervision

Multi-#E$ architecture with each #E$ built on modular

hardware Up to 89 .C inputs per !" #E$ freely selectable

between currents and voltages (89:"+ 8&:;+ 88:8+


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B90 Features and Benefits

Ma'imum number of circuits in one /one5 89 3umber of /ones 5 9

usbar configuration5 3o limits

4ub-cycle tripping time

4ecurity (only 8msec of clean waveforms re,uired for stability)

$ifferential algorithm supervised by C saturation detection anddirectional principle

$ynamic bus replica+ logic and signal processing

3o need for interposing Cs (ratio matching up to &85;)

C trouble per each /one of protection

reaer failure per circuit

End fault protection (E2%) per circuit

Undervoltage supervision per each voltage input

7vercurrent protection (#7C and 7C) per circuit

Communication+ metering and recording


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B90 $**lications

usbars5

4ingle

reaer-and-a-half

$ouble riple

?ith and without transfer bus

3etwors5

4olidly grounded 6ightly grounded (via resistor)

Ungrounded


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B90 $rchitecture %#er#ie"

%hase-segregated multi-#E$ system built on Universal

Relay (UR) platform

Each #E$ can be configured to include up to si'

modules5 .C inputs (up to & ' 89 single phase inputs)

Contact outputs (up to = ' >)

$igital #nputs (up to = @ ;=)

Aariety of combinations of digital inputs and outputcontacts

2ast digital communications between the #E$s for

sharing digital states


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B90 $rchitecture

B90

Phase A Protection

P$

UR %&

C

PU

C'

(($

D

$P

I

)'

D

$P

I

)'

D

$P

I

)'

phase A c#rrents * +o"ta,es

fiber-rin,confi,#ration

phase A trip contacts

P$

C

PU

UR %2 Phase B Protection

D

$P

I)'

D

$P

I)'

D

$P

I)'

C'

(($

phase B c#rrents * +o"ta,es

phase B trip contacts

P

$

CP

U

UR %. Phase C Protection

D$

P

I)'

D$

P

I)

'

D$P

I)

'

C'(($

phase C c#rrents * +o"ta,es

phase C trip contacts

P$

C

PU

UR %/ B#s Rep"ica * Breaer !ai"

I)'

I)'

I)'

I)'

I)'

I)'

C'

(($

3o .*C data traffic 3o need for sampling

synchroni/ation+straightforward relayconfiguration - all .*C signals0local1 to a chassis

$ata traffic reduced to #*7s

$irect #*7s (similar to e'istingUR Remote #*7s) used fore'change of binary data

7scillography capabilitiesmultiplied (available in each#E$ separately)

%rogrammable logic(2le'6ogic) capabilitiesmultiplied

47E capabilities multiplied

E'tra URs in a loop for more#*7s


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B90 om*onents+ Protection I,Ds

Modular architecture (from 8 to ! modules) .ll modules but C%U and %4 optional

Up to 89 .C inputs total (89 currents and no

voltages+ through ;8 currents and ;8

voltages)

hree #*7 modules for trip contacts or e'tra

digital inputs 2eatures oriented towards .C signal

processing (differential+ #7C+ 7C+ UA+ 2

current supervision)

Po

'erS(pply

$PU

DSP1

I)*

DSP2

I)*

DSP3

I)*

$o++s

0AC

sin,"e1phaseinp#ts

0AC

sin,"e1ph

aseinp#ts

0AC

sin,"e1ph

aseinp#ts

'therUR1bas

eIEDs

B90 is built on -R hard"are ./ years of field e*erience1B90 is built on -R hard"are ./ years of field e*erience1


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B90 om*onents+ 2ogic I,Ds

Modular architecture (from 8 to ! modules) .ll modules but C%U and %4 optional

Up to != digital inputs or

9> output contacts or

Airtually any mi' of the above

2eatures oriented towards logic functions (2

logic and timers+ isolator monitoring andalarming)

Po

'erS(pply

$PU

'therUR1bas

eIEDs

I)*I)*

I)*I)*

I)*I)*

$o++s

B90 is built on -R hard"are ./ years of field e*erience1B90 is built on -R hard"are ./ years of field e*erience1


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B90 Scheme for 2arge Busbars

D#a" 3re#nant4 fiber 5ith

.6sec e"i+er7 ti6e bet5eennei,hbo#rin, IEDs8 Up to 0

B9:s)URs in the rin,

Phase AAC si,na"s an

trip contacts

Phase BAC si,na"s an

trip contacts

Phase $AC si,na"s an

trip contacts

Di,ital Inp(tsfor iso"ator

6onitorin, an B


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Security of the B90 ommunications

$ual (redundant) ring B each message send

simultaneously in both directions

3o switching e,uipment (direct @-R@ connection)

4elf-monitoring incorporated #nformation re-sent (repeated) automatically

&8-bit CRC

$efault states of e'changed flags upon loss of

communications (allows developing secureapplications)


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B90 ommunications

he communications feature ($irect #*7s) re,uires

digital communications card (dual-port >8"nmm 6E$)

Up to != inputs * outputs could be sent * received

Up to > UR #E$s could be interfaced ?hen interfacing with other URs+ &8 inputs * outputs

are available

he $irect #*7 feature is modeled on UC. G774E but

is sent over dedicated fiber (not 6.3) and is optimi/edfor speed

User-friendly configuration mechanism is available

4imple applications do not re,uire communications


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!y*ical B90 $**lications for 2arge Busbars

; to 2/ feeers

Basic- &% . B/

for less than 1!

feeers

Etene- B/ for +ore

than 1! feeers

/(ll #ersion- 24 /eeers

'ith B/

& 2 . 2. 2/


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!y*ical B90 $**lications for 2arge Busbars

; to 2/ feeers

; to 2/ feeers

&

2

.

/

2&

22

2.

2/


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B90 and Small Single Busbars ( 3)circuit busbar

!"o le#els of scalability allo" fleible a**lications!"o le#els of scalability allo" fleible a**lications

Po'erS(

pply

$PU

DSP1

I)*

DSP2

I)*

DSP3

I)*

Spare

0phase1Ac#rrents

0phase1B

c#rrents

0phase1C

c#rrents

Diff

=,eo6etrica" a+era,e>

=sca"e s#6 of>

=s#6 of>nR iiiii ++++= ...321

( )nR iiiini ++++= ...

1

321

( )nR iiiiMaxi ,...,,, 321=

nnR iiiii = ...321

;arious Definitions of the Restraining Signal

I d t i l S t


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Restraining urrent

he amount of restraint provided by various definitions

is different sometimes significantly different particularly

for multi-circuit differential elements such as busbar

protection

?hen selecting the slope (slopes) one must tae into

account the applied definition of the restraining signal

he !" uses the 0ma'imum of1 definition of the

restraining current

I d t i l S t


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Differential Function ( haracteristic

2

if

f

e

r

e

n

t

ia

"

r e s t r a i n i n ,

L O W

S L O P E

O P E R A T E

B L O C K

IR

| ID|

H I G H

S L O P E

L

O

W

B

P

N

T

H

IGH

B

P

N

T

P I C K U P

Industrial Systems


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Differential Function ( $da*ti#e $**roach

2

if

f

e

re

n

t

ia

"


6 e , i o n 1

3 " o 5 2 i f f e r e n t i a "

c # r r e n t s 4

6 e , i o n 2

3 h i , h 2 i f f e r e n t i a "

c # r r e n t s 4

"o5 c#rrents

sat#ration possib"e #e to c offset

sat#ration +er7 iffic#"t to etect

6ore sec#rit7 re@#ire

"ar,e c#rrents @#ic sat#ration possib"e #e to

"ar,e 6a,nit#e

sat#ration easier to etect

sec#rit7 re@#ire on"7 if sat#ration

etecte

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3!

$da*ti#e 2ogic

DI/1

DI6

SA

DI/2

*6

A7D

*

66IP

A7D

Industrial Systems


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3%

$da*ti#e $**roach

2

if

f

e

re

n

t

ia

"


6 e , i o n 1

3 " o 5 2 i f f e r e n t i a "

c # r r e n t s 4

6 e , i o n 2

3 h i , h 2 i f f e r e n t i a "

c # r r e n t s 4

D7na6ic 21o#t1of12-

&1o#t1of12 operatin,

6oe

21o#t1of12operatin,

6oe

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3&

Directional Princi*le

DI/1

DI6

SA

DI/2

*6

A7D

*

66IP

A7D

Industrial Systems


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Aoltage signal is not re,uired

#nternal faults5

all fault (0large1) currents appro'imately in phase

E'ternal faults5

one current appro'imately out of phase

$econar7 c#rrent of

the fa#"te circ#it

3eep CT sat#ration4

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#mplementation5 step ;5select fault 0contributors1

. 0contributor1is a circuit carrying significant amount of current

. circuit is a contributor if its current is above higher breapoint

. circuit is a contributor if its current is above a certain portionof the restraining current

step 85chec angle between each contributor and the sum of allthe other currents

4um of all the other currents is the inverted contributor if thefault is e'ternal on e'ternal faults one obtains an angle of ;>"degrees

step &5compare the ma'imum angle to the threshold

. threshold is a factory constant of !" degrees

.n angle shift of more than !" degrees due to C saturation isphysically impossible

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,ternal Fault

B 8 * $ 9

* P E 6 A 4 E

B 8 * $ 9

pD

p

II

Ireal

pD

p

II

Iimag

Ip

ID

- Ip

E t e r n a l / a ( l t $ o n 0 i t i o n s

* P E 6 A 4 E

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Internal Fault

B 8 * $ 9

B 8 * $ 9

pD

p

II

Ireal

pD

p

II

Iimag

Ip

ID

- Ip

I n t e r n a l / a ( l t $ o n 0 i t i o n s

* P E 6 A 4 E

* P E 6 A 4 E

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Saturation Detector

DI/1

DI6

SA

DI/2

*6

A7D

*

66IP

A7D

Industrial Systems


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2

iffe

r

e

n

ti

a

"


Saturation Detector

t0

t1

t2

t0 fa(lt inception

t1 $ starts to sat(rate

t2 eternal fa(lt (nerhea#y $ sat(ration

conitions

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Saturation Detector ( !he State >achine

NORMAL

SAT := 0

EXTERNAL

FAULT

SAT := 1

EXTERNAL

FAULT & CT

SATURATION

SAT := 1

The differeni!"

#h!r!#eri$i#enered

The differeni!"%

re$r!inin r!'e#(r)

(* (f he differeni!"#h!r!#eri$i# f(r

#er!in +eri(d (f i,e

$!*r!i(n

#(ndii(n

The differeni!"

#*rren -e"(. he

fir$ $"(+e f(r

#er!in +eri(d (f

i,e

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4!

Saturation Detector

7peration5

he 4. flag ?#66 37 be set during internal faults

whether or not any Cs saturate

he 4. flag ?#66 be 4E during e'ternal faultswhether or not any Cs saturate

y design the 4. flag is 37 used to bloc the

relay but to switch to 8-out-of-8 operating principle

Industrial Systems

200


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4%

,am*les ( ,ternal Fault

0.06 0.07 0.08 0.09 0.1 0.11 0.12-200

-150

-100

-50

0

50

100

150

B& 6s

The b#s 2ifferentia"

protection e"e6ent

pics #p 2#e to hea+7

CT sat#ration

The CT sat#ration f"a,

is set safe"7 before the

pic#p f"a,

Despite hea+7 CT

sat#ration the

eterna" fa#"t c#rrent

is seen in theopposite 2irection

The

2irectiona" f"a,

is not set

The e"e6ent

2oes not

6a"operate

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4&

,am*les ( Internal Fault

The b#s 2ifferentia"

protection e"e6ent

pics #pThe sat#ration

f"a, is not set 1 no

2irectiona"

2ecision re@#ire2

The e"e6ent

operates in

&:6s

A"" the fa#"t c#rrents

are seen in one

2irection

The

2irectiona"

f"a, is set

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49

-ser)>odified !ri**ing 2ogic

.ll the ey logic flags ($#2ferential+ 4.uration+ $#Rectional) are

available as 2le'6ogicMoperands with the following meanings5

U4 #.4E$ %% - differential characteristic entered

U4 4. - saturation (e'ternal fault) detected U4 $#R - directionality confirmed (internal

fault)

2le'6ogicMcan be used to override the default >F logic

E'ample5 8-out-of-8 operating principle with e'tra security applied

to the differential principle5

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0

Dynamic Bus Re*lica

$ynamic bus replica mechanism is provided by associating astatus signal with each current of a given differential /one

Each current can be inverted prior to configuring into a /one (tie-breaer with a single C)

he status signal is a 2le'6ogicMoperand (totally user

programmable) he status signals are formed in 2le'6ogicMB including any

filtering or e'tra security checs B from the positions of switchesand*or breaers as re,uired

us replica applications5

#solators ie-reaers

reaers

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Dynamic Bus Re*lica ) Isolators

Reliable 0#solator Closed1 signal is composed

he #solator %osition signal5

$ecides whether the associated current is to be included intodifferential calculations

$ecides whether the associated breaer is to be tripped 2or ma'imum safety5

oth normally open and normally closed contacts are used

#solator alarm is established under discrepancy conditions

#solator position to be sorted out under non-valid combinations

of the au'iliary contacts (open-open+ closed-closed) 4witching operations in the substation shall be inhibited until

the bus image is recogni/ed with ;""D accuracy

7ptionally the >F may be inhibited from the isolator alarm

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Dynamic Bus Re*lica ) Isolators

Isolator *penA(iliary

$ontact

Isolator $loseA(iliary

$ontact

IsolatorPosition

Alar+ Bloc S'itchin,

*ff *n $8*SED 7o 7o

*ff *ff 8AS VA8ID After ti+e elay

(ntil

acno'le,e

Until Isolator

Position is #ali

*n *n $8*SED

*n *ff *PE7 7o 7o

I$'AT'R & 'PEN

I$'AT'R & C'$ED

I$'AT'R & B'C

I$'AT'R & AAR(

I$'AT'R & RE$ET

I$'AT'R & P'$ITI'N

Iso"ator position +a"i

3iso"ator opene4

Iso"ator position +a"i

3iso"ator opene4

Iso"ator position in+a"i

a"ar6 ti6e

e"a7

b"ocin, si,na" resets 5hen

iso"ator position +a"i

a"ar6

acno5"e,e

a"ar6 acno5"e,in,

si,na"

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3

Dynamic Bus Re*lica ( Isolator Positions and Differential Protection

Phase AAC si,na"s 5ire

here- b#s rep"ica confi,#re

here

Phase BAC si,na"s 5ire


here

Phase $AC si,na"s 5ire


here

Up to 9 a##"iar7 s5itches

5ire hereF Iso"ator (onitorin,

f#nction confi,#re here

Iso"at

orPo

sition

Iso"atorPosition

Iso"atorPosition

Iso"ato

rPosi

tion

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4

Dynamic Bus Re*lica ( !ie)Breakers+ !"o)! onfiguration

7verlapping /ones B no blind spots

oth /ones trip the ie-reaer

3o special treatment of the re,uired in terms of itsstatus for $ynamic us Replica (treat as regularbreaer B see ne't section)

TB


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Dynamic Bus Re*lica ( !ie)Breakers !ie)Breakers+ Single)! onfiguration

oth /ones trip the ie-reaer lind spot between the and the C

2ault between and C is e'ternal to 8

;5 no special treatment of the re,uired (treat as regularC)

85 special treatment of the status re,uired5

he C must be e'cluded from calculations after the is opened

8 gets e'tended (opened entirely) onto the

TB


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!

!ie)Breakers+ Single)! onfiguration

4e,uence of events5

; trips and the gets opened

.fter a time delay the current from the C shall beremoved from 8 calculations

.s a result 8 gets e'tended up to the opened

he 2ault becomes internal for 8

8 trips finally clearing the fault

epan

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%

Dynamic Bus Re*lica ( Breakers+ Bus)side !s

lind spot e'ists between the C and C

C is going to be tripped by line protection

.fter the C gets opened+ the current shall be removed fromdifferential calculations (e'panding the differential /one up to the

opened C)

Relay configuration re,uired5 identical as for the 4ingle-C ie-

reaer

CT

CB

B"in spot forb#s protection

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Dynamic Bus Re*lica (Breakers+ 2ine)side !s

07ver-trip1 spot between the C and C when the C is opened

?hen the C gets opened+ the current shall be removed from

differential calculations (contracting the differential /one up to theopened C)

Relay configuration re,uired5 identical as for a 4ingle-C ie-reaer+

butH1

.ll !" #E$s provide for programmable logic

$istributed logic over fiber-optic communications

($irect #*7s)

2unctions available5 Gates

Edge detectors

6atches and non-volatile latches

imers

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!!

Disturbance Recording

.ll .C inputs automatically recorded

%rogrammable sampling rate5 >+ ;=+ &8+ =9 s*c

%rogrammable content (phasor magnitudes and angles+

differential+ restraint currents+ fre,uency+ any digital flag)

%rogrammable number of records vs< record length 2le'ible treatment of old records (overwrite+ preserve)

%rogrammable trigger

%rogrammable pre-*post-trigger windows

#ndividual (independent) oscillography configuration of each !"

#E$

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!%

Se@uence of ,#ents Recording

Up to ;"9" events per each !" #E$

Events stamped with ;microsecond resolution

"


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ion

!&

S(:station one;line an

'irin, ia,ra+s

/4;


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!9

B90 Summary

Cost-efficient

Good performance

Modern communications capability

Member of the Universal Relay (UR) family

Easy integration with other URs

Common configuration tool for all !" #E$s

%roven algorithms (&") and hardware (UR)

E'pandable

wo levels of scalability (modules and #E$s)

Industrial Systems


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%0

%rdering the B90

he !" can be ordered as an engineered product

he following order code applies to the engineered !"

B90 @ @ @ @ @@ @ @ @@

B90 Base syste+

S Sin,le :(s:ar

D Do(:le :(s:ar

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#nternational5 6 90C 79/ 8777

Europe5 4/ 9/ /3C 33 00

Email5 info*mindsysgecom

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