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F.F. Dragan F.F. Dragan (Kent State)(Kent State)
A.B. Kahng A.B. Kahng (UCSD)(UCSD)
I. Mandoiu I. Mandoiu (UCLA/UCSD)(UCLA/UCSD)
S. Muddu S. Muddu (Sanera Systems)(Sanera Systems)
A. Zelikovsky A. Zelikovsky (Georgia State)(Georgia State)
Practical Approximation Algorithms for Separable Packing LPs
Practical Approximation Algorithms for Separable Packing LPs
2
Outline
• VLSI design motivation
– Global routing via buffer-blocks
– Separable packing ILP formulations
• PTAS for separable packing LPs
• Analysis
• Experimental results
3
Outline
• VLSI design motivation
– Global routing via buffer-blocks
– Separable packing ILP formulations
• PTAS for separable packing LPs
• Analysis
• Experimental results
4
Outline
• VLSI design motivation
– Global routing via buffer-blocks
– Separable packing ILP formulations
• PTAS for separable packing LPs
• Analysis
• Experimental results
5
Outline
• VLSI design motivation
– Global routing via buffer-blocks
– Separable packing ILP formulations
• PTAS for separable packing LPs
• Analysis
• Experimental results
6
VLSI Global Routing
7
VLSI Global RoutingBuffered
Buffer Blocks
8
Problem Formulation
Global Routing via Buffer-Blocks (GRBB) ProblemGiven:
• BB locations and capacities
• List of multi-pin nets– upper-bound on #buffers for each source-sink path
• L/U bounds on the wirelength b/w consecutive buffers/pins
Find:
• Buffered routing of a maximum number of nets subject to the given constraints
9
Integer Program Formulation
}],[)(:)({
BlocksBuffer terminals
:),(graph Routing
ULu,vdistu,vE
V
EVG
otherwisecapacity BB terminal,is vif 1 cap(v)
otherwise 0 , if 1 ),(
}1,0{)(
)(cap)(),(..
)(max
TvvT
Tf
vTfvTts
Tf
T
T
10
Enforcing Parity Constraints
• Inverting buffers change the polarity of the signal• Each sink has a given polarity requirement
Parity constraints for the #buffers on each routed source-sink path A path may use two buffers in the same buffer block
)(cap)()]'',()',([ rTfrTrTT
Integer program changes• Split each BB vertex r of G into two copies, r’ and r’’• Impose capacity constraint on the sets of vertices {r’,r’’}
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Combining with compaction
12
Combining with compaction
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Combining with compaction
Set capacity constraints: cap(BB1) + cap(BB2) const.
14
GRBB with Buffer Library
• Discrete buffer library: different buffer sizes/driving strengths Need to allocate BB capacity between different buffer types
)(cap)()'()',()('
rTfrsizerTT rXr
Integer program changes• Replace each BB vertex r of G by a set X(r) of vertices (one
for each buffer type)• Modify edge set of G to take into account non-uniform
driving strengths• Impose capacity constraint on the sets of vertices X(r):
15
“Relax+Round” Approach to GRBB
1. Solve the fractional relaxation
– Exact linear programming algorithms are impractical for large instances
– KEY IDEA: use an approximation algorithm
• allows fine-tuning the tradeoff between runtime and solution quality
2. Round to integer solution
– Provably good rounding [RT87]
– Practical runtime (random-walk based)
16
Outline
• VLSI design motivation
– Global routing via buffer-blocks
– Separable packing LP formulations
• PTAS for separable packing LPs
• Analysis
• Experimental results
17
Separable Packing LP
vZcap
vvsizeRVsize
EVG
V inalevery termfor 1cap({v}) s.t. 2:function Capacity
inalevery termfor 1)( s.t. :function Size
),(graph Routing
X
T
T
vsizevTXT
Tf
XTfXTts
Tf
)(),( ),(
0)(
)(cap)(),(..
)(max
18
Previous Work
• MCF and packing/covering LP approximation: [FGK73,SM90, PST91,G92,GK94,KPST94,LMPSTT95,R95,Y95,GK98,F00,…]
• Exponential length function to model flow congestion [SM90]
• Shortest-path augmentation + final scaling [Y95]
• Modified routing increment [GK98]
• Fewer shortest-path augmentations [F00]
• We extend speed-up idea of [F00] to separable packing LPs
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Separable Packing LP Algorithm
w(X) , f 0, = For i = 1 to N do For k = 1, …, #nets do Find min weight feasible Steiner tree T for net k While weight(T) < min{ 1, (1+) } do f(T)= f(T) + 1 For every X do w(X) ( 1 + (T,X)/cap(X) ) * w(X) End For Find min weight feasible Steiner tree T for net k End While End For = (1+) End ForOutput f/N
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Outline
• VLSI design motivation
– Global routing via buffer-blocks
– Separable packing ILP formulations
• PTAS for separable packing LPs
• Analysis
• Experimental results
21
Runtime
0)(
1)(),(..
)(cap)(min
Xf
XwXTts
XXw
X
X
Dual LP:
• Choose #iterations N such that all feasible trees have weight 1 after N iterations (i.e., 1)
• Tree weight lower bound is initially, and is multiplied by (1+) in each iteration
1
log 1N
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Approximation Guarantee
)log)nets(#( 2 LTO tree
Theorem: For every <.15, the algorithm finds factor
1/(1+4 ) approximation by choosing
where L is the maximum number of vertices in a
feasible Steiner tree. For this value of , the running
time is
1
))1)((1(
L
23
Outline
• VLSI design motivation
– Global routing via buffer-blocks
– Separable packing ILP formulations
• PTAS for separable packing LPs
• Analysis
• Experimental results
24
Implementation choices
2-Pin 3,4-pin Multi-pin
Decomposition Star,
Minimum Spanning tree
Matching,
3-restricted Steiner tree
Not needed
Min-weight DRST Shortest path (exact)
Try all Steiner pts
+ shortest paths (exact)
Very hard!
heuristics
Rounding Random-walk Backward random-walks
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1. Store fractional flows f(T) for every feasible Steiner tree T
2. Scale down each f(T) by 1- for small
3. Each net k routed with prob. f(k)={ f(T) | T feasible for k }
Number of routed nets (1- )OPT
4. To route net k, choose tree T with probability = f(T) / f(k)
With high probability, no BB capacity is exceeded
Problem: Impractical to store all non-zero flow trees
Provably Good Rounding
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1. Store fractional flows f(T) for every valid routing tree T
2. Scale down each f(T) by 1- for small
3. Each net k routed with prob. f(k)={ f(T) | T routing for k }
Number of routed nets (1- )OPT
4. To route net k, choose tree T with probability = f(T) / f(k)
With high probability, no BB capacity is exceeded
Random-Walk 2-TMCF Rounding
use random walk from source to sink
Practical: random walk requires storing only flows on edges
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Random-Walk MTMCF Rounding
ST1
T2
T3SourceSinks
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Random-Walk MTMCF Rounding
ST1
T2
T3SourceSinks
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The MTMCF Rounding Heuristic
1. Round each net k with probability f(k), using backward
random walks
– No scaling-down, approximate MTMCF < OPT
2. Resolve capacity violations by greedily deleting routed paths
– Few violations
3. Greedily route remaining nets using unused BB capacity
– Further routing still possible
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Implemented Heuristics
• Greedy buffered routing:1. For each net, route sinks sequentially along shortest paths to