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Description The FAN7711, developed with Fairchild’s unique high-voltage process, is a ballast control integrated circuit (IC)for a fluorescent lamp. FAN7711 incorporates a preheating/ ignition function, controlled by an user-selected externalcapacitor, to increase lamp life. The FAN7711 detectsswitch operation from after ignition mode through aninternal active Zero-Voltage Switching (ZVS) controlcircuit. This control scheme enables the FAN7711 todetect an open-lamp condition, without the expense ofexternal circuitry, and prevents stress on MOSFETs. Thehigh-side driver built into the FAN7711 has a common-mode noise cancellation circuit that provides robustoperation against high-dv/dt noise intrusion.
Ordering Information
Typical Application
Figure 1. Typical Application Circuit for Compact Fluorescent Lamp
8-DIP8-SOP
Part Number Package Pb-Free Operating Temperature Range Packing MethodFAN7711N 8-DIP
Absolute Maximum RatingsStresses exceeding the absolute maximum ratings may damage the device. The device may not function or be opera-ble above the recommended operating conditions and stressing the parts to these levels is not recommended. In addi-tion, extended exposure to stresses above the recommended operating conditions may affect device reliability. Theabsolute maximum ratings are stress ratings only. TA=25°C unless otherwise specified.
Note: 1. Do not supply a low-impedance voltage source to the internal clamping Zener diode between the GND and the VDD
pin of this device.
Symbol Parameter Min. Typ. Max. UnitVB High-side floating supply -0.3 625 V
Typical Application Information1. Under-Voltage Lockout (UVLO) FunctionThe FAN7711 has UVLO circuits for both high-side andlow-side circuits. When VDD reaches VDDTH(ST+), UVLOis released and the FAN7711 operates normally. At UVLOcondition, FAN7711 consumes little current, noted IST.Once UVLO is released, FAN7711 operates normallyuntil VDD goes below VDDTH(ST-), the UVLO hysteresis. AtUVLO condition, all latches that determine the status ofthe IC are reset. When the IC is in the shutdown mode,the IC can restart by lowering VDD below VDDTH(ST-).
FAN7711 has a high-side gate driver circuit. The supplyfor the high-side driver is applied between VB and VS. Toprotect the malfunction of the driver at low supplyvoltage, between VB and VS, FAN7711 provides anadditional UVLO circuit between the supply rails. If VB-VS is under VHSTH(ST+), the driver holds low-state to turnoff the high-side switch, as shown in Figure 18. As longas VB-VS is higher than VHSTH(ST-) after VB-VS exceedsVHSTH(ST+), operation of the driver continues.
2. OscillatorThe ballast circuit for a fluorescent lamp is based on theLCC resonant tank and a half-bridge inverter circuit, asshown in Figure 18. To accomplish Zero-VoltageSwitching (ZVS) of the half-bridge inverter circuit, theLCC is driven at a higher frequency than its resonantfrequency, which is determined by L, CS, CP, and RL,where RL is the equivalent lamp's impedance
.
Figure 18. Resonant Inverter Circuit Based onLCC Resonant Tank
The transfer function of LCC resonant tank is heavilydependent on the lamp impedance, RL, as illustrated inFigure 19. The oscillator in FAN7711 generates effectivedriving frequencies to assist lamp ignition and improvelamp life longevity. Accordingly, the oscillation frequencyis changed in the following sequence:
Preheating freq.->Ignition freq.-> Normal running freq.
Before the lamp is ignited, the lamp impedance is veryhigh. Once the lamp is turned on, the lamp impedancesignificantly decreases. Since the resonant peak is veryhigh due to the high-resistance of the lamp at the instantof turning on the lamp, the lamp must be driven at higherfrequency than the resonant frequency, shown as (A) inFigure 19. In this mode, the current supplied by theinverter mainly flows through CP. CP connects bothfilaments and makes the current path to ground. As aresult, the current warms up the filament for easyignition. The amount of the current can be adjusted bycontrolling the oscillation frequency or changing thecapacitance of CP. The driving frequency, fPRE, is calledpreheating frequency and is derived by:
After the warm-up, the FAN7711 decreases thefrequency, shown as (B) of Figure 19. This actionincreases the voltage of the lamp and helps thefluorescent lamp ignite. The ignition frequency isdescribed as a function of CPH voltage, as follows:
where VCPH is the voltage of CPH capacitor.
Equation 2 is valid only when VCPH is between 3V to 5Vbefore FAN7711 enters running mode. Once VCPHreaches 5V, the internal latch records the exit fromignition mode. Unless VDD is below VDDTH(ST-), thepreheating and ignition modes appear only once duringlamp start transition.
Finally, the lamp is driven at a fixed frequency by anexternal resistor, RT, shown as (C) of Figure 19. If VDD ishigher than VDDTH(ST+) and UVLO is released, thevoltage of RT pin is regulated to 4V. This voltage adjuststhe oscillator's control current according to the resistanceof RT. Because this current and an internal capacitor setthe oscillation frequency, the FAN7711 does not needany external capacitors.
The proposed oscillation characteristic is given by:
Even in the active ZVS mode, shown as (D) in Figure 19,the oscillation frequency is not changed. The dead-timeis varied according to the resonant tank characteristic.
Figure 19. LCC Transfer Function in Terms of Lamp Impedance
3. Operation ModesFAN7711 has four operation modes: (A) preheatingmode, (B) ignition mode, (C) active ZVS mode, and (D)shutdown mode, depicted in Figure 20. The modes areautomatically selected by the voltage of CPH capacitor,shown in Figure 20. In modes (A) and (B), the CPH actsas a timer to determine the preheating and ignition times.After the preheating and ignition modes, the role of theCPH is changed to stabilize the active ZVS controlcircuit. In this mode, the dead time of the inverter isselected by the voltage of CPH. Only when FAN7711 isin active ZVS mode is it possible to shut off the wholesystem using CPH pin. Pulling the CPH pin below 2V inactive ZVS mode, causes the FAN7711 to entershutdown mode. In shutdown mode, all active operationis stopped, except UVLO and some bias circuitry. Theshutdown mode is triggered by the external CPH controlor the active ZVS circuit. The active ZVS circuitautomatically detects lamp removal (open-lampcondition) and decreases CPH voltage below 2V toprotect the inverter switches from damage.
Figure 20. Operation Modes
3.1 Preheating Mode (t0~t1)
When VDD exceeds VDDTH(ST+), the FAN7711 startsoperation. At this time, an internal current source (IPH)charges CPH. CPH voltage increases from 0V to 3V inpreheating mode. Accordingly, the oscillation frequencyfollows the Equation 4. In this mode, the lamp is notignited, but warmed up for easy ignition. The preheatingtime depends on the size of CPH:
According to preheating process, the voltage across thelamp to ignite is reduced and the lifetime of the lamp isincreased. In this mode, the dead time is fixed at itsmaximum value.
3.2 Ignition Mode (t1~t2)
When the CPH voltage exceeds 3V, the internal currentsource to charge CPH is increased about six times largerthan IPH, noted as IIG, causing rapid increase in CPHvoltage. The internal oscillator decreases the oscillationfrequency from fPRE to fOSC as CPH voltage increases.As depicted in Figure 20, lowering the frequencyincreases the voltage across the lamp. Finally, the lampignites. Ignition mode is defined when CPH voltage liesbetween 3V and 5V. Once CPH voltage reaches 5V, theFAN7711 does not return to ignition mode, even if theCPH voltage is in that range, until the FAN7711 restartsfrom below VDDTH(ST-). Since the ignition modecontinues when CPH is from 3V to 5V, the ignition time isgiven by:
In this mode, dead time varies according to the CPHvoltage.
3.3 Running and Active Zero-Voltage Switching(AZVS) Modes (t2~)
When CPH voltage exceeds 5V, the operating frequencyis fixed to fOSC by RT. However, active ZVS operation isnot activated until CPH reaches ~6V. The FAN7711prepares for active ZVS operation from the instant CPHexceeds 5V during t2 to t3. When CPH becomes higherthan ~6V at t3, the active ZVS operation is activated. Todetermine the switching condition, FAN7711 detects thetransition time of the output (VS pin) of the inverter byusing VB pin. From the output-transition information,FAN7711 controls the dead time to meet the ZVScondition. If ZVS is satisfied, the FAN7711 slightlyincreases the CPH voltage to reduce the dead time andto find optimal dead time, which increases the efficiencyand decreases the thermal dissipation and EMI of theinverter switches. If ZVS fails, the FAN7711 decreasesCPH voltage to increase the dead time. CPH voltage isadjusted to meet optimal ZVS operation. During theactive ZVS mode, the amount of the charging/discharging current is the same as IPH. Figure 21 depictsnormal operation waveforms.
Figure 21. Typical Transient Waveform from Preheating to Active ZVS Mode
3.4 Shutdown Mode
If the voltage of capacitor CPH is decreased below~2.6V by an external application circuit or internalprotection circuit, the IC enters shutdown mode. Oncethe IC enters shutdown mode, this status continues untilan internal latch is reset by decreasing VDD belowVDDTH(ST-). Figure 22 shows an example of externalshutdown control circuit.
Figure 22. External Shutdown Circuit
The amount of the CPH charging current is the same asIPH, making it possible to shut off the IC using smallsignal transistor. FAN7711 provides active ZVSoperation by controlling the dead time according to thevoltage of CPH. If ZVS fails, even at the maximum deadtime, FAN7711 stops driving the inverter.
The FAN7711 thermal shutdown circuit senses thejunction temperature of the IC. If the temperatureexceeds ~160°C, the thermal shutdown circuit stopsoperation of the FAN7711.
The current usages of shutdown mode and under-voltage lockout status are different. In shutdown mode,some circuit blocks, such as bias circuits, are kept alive.Therefore, the current consumption is slightly higherthan during under-voltage lockout.
4. Automatic Open-Lamp Detection
FAN7711 can automatically detect the open-lampcondition. When the lamp is opened, the resonant tankfails to make a closed-loop to the ground, as shown inFigure 23. The supplied current from the VS pin is usedto charge and discharge the charge pump capacitor, CP.Since the open-lamp condition means resonant tankabsence, it is impossible to meet ZVS condition. In thiscondition, the power dissipation of the FAN7711, due tocapacitive load drive, is estimated as:
where f is driving frequency and VDC is DC-link voltage.
Assuming that CP, VDC, and f are 1nF, 311V, and 50kHz,respectively; the power dissipation reaches about 2.4Wand the temperature of FAN7711 is increased rapidly. Ifno protection is provided, the IC can be damaged by thethermal attack. Note that hard-switching condition duringthe capacitive-load drive causes lots of EMI.
Figure 24 illustrates the waveforms during the open-lamp condition. In this condition, the charging anddischarging current of CP is directly determined byFAN7711 and considered hard-switching condition. TheFAN7711 tries to meet ZVS condition by decreasingCPH voltage to increase dead time. If ZVS fails and CPHgoes below 2V, even though the dead time reaches itsmaximum value, FAN7711 shuts off the IC to protectagainst damage. To restart FAN7711, VDD must bebelow VDDTH(ST-) to reset an internal latch circuit, whichremembers the status of the IC.
Figure 24. CPH Voltage Variation in Open-Lamp Condition
5. Power SupplyWhen VDD is lower than VDDTH(ST+), it consumes verylittle current, IST, making it possible to supply current tothe VDD pin using a resistor with high resistance (Rstart inFigure 25). Once UVLO is released, the currentconsumption is increased and whole circuits areoperated, which requires additional power supply forstable operation. The supply must deliver at least severalmA. A charge pump circuit is a cost-effective method tocreate an additional power supply and allows CP to beused to reduce the EMI.
Figure 25. Local Power Supply for VDD Using a Charge Pump Circuit
As presented in Figure 25, when VS is high, the inductorcurrent and CCP create an output transition with theslope of dv/dt. The rising edge of VS charges CCP. At thattime, the current that flows through CCP is:
This current flows along the path (1). It charges CVDD,which is a bypass capacitor to reduce the noise on thesupply rail. If CVDD is charged over the threshold voltageof the internal shunt regulator, the shunt regulator isturned on and regulates VDD with the trigger voltage.
When VS is changing from high to low state, CCP isdischarged through Dp2, shown as path (2) in Figure 26.These charging/discharging operations are continueduntil FAN7711 is halted by shutdown operation. Thecharging current, I, must be large enough to supply theoperating current of FAN7711.
The supply for the high-side gate driver is provided bythe boot-strap technique, as illustrated in Figure 26.When the low-side MOSFET connected between VS andGND pins is turned on, the charging current for VB flowsthrough DB. Every low VS gives the chance to charge theCB. Therefore CB voltage builds up only when FAN7711operates normally.
When VS goes high, the diode DB is reverse-biased andCB supplies the current to the high-side driver. At thistime, since CB discharges, VB-VS voltage decreases. IfVB-VS goes below VHSTH(ST-), the high-side drivercannot operate due to the high-side UVLO protectioncircuit. CB must be chosen to be large enough not to fallinto UVLO range due to the discharge during a half ofthe oscillation period, especially when the high-sideMOSFET is turned on.
Figure 26. Implementation of Floating Power Supply Using the Bootstrap Method
Design Guide1. Start-up CircuitThe start-up current (IST) is supplied to the IC throughthe start-up resistor, Rstart. Once operation starts, thepower is supplied by the charge pump circuit. To reducethe power dissipation in Rstart, select Rstart as high aspossible, considering the current requirements at start-up. For 220VAC power, the rectified voltage by the full-wave rectifier makes DC voltage, as shown in Equation8. The voltage contains lots of AC component due topoor regulation characteristic of the simple full-waverectifier:
Considering the selected parameters, Rstart must satisfythe following equation:
From Equation 9, Rstart is selected as:
Note that if choosing the maximum Rstart, it takes longtime for VDD to reach VDDTH(st+). Considering VDD risingtime, Rstart must be selected as shown in Figure 30.
Another important concern for choosing Rstart is theavailable power rating of Rstart. To use a commerciallyavailable, low-cost 1/4Ω resistor, Rstart must obey thefollowing rule:
Assuming VDC=311V and VCL=15V, the minimumresistance of Rstart is about 350kΩ.
When the IC operates in shutdown mode due to thermalprotection, open-lamp protection, or hard-switchingprotection, the IC consumes shutdown current, ISD,which is larger than IST. To prevent restart during thismode, Rstart must be selected to cover ISD currentconsumption. The following equation must be satisfied:
From Equations 10 - 12; it is possible to select Rstart:
(1) For safe start-up without restart in shutdown mode:
(2) For safe start-up with restart from shutdown mode:
If Rstart meets Equation 14, restart operation is possible.However, it is not recommended to choose Rstart at thatrange because VDD rising time could be long and itincreases the lamp's turn-on delay time, as depicted inFigure 27.
Figure 27. VDD Build-upFigure 28 shows the equivalent circuit for estimatingtstart. From the circuit analysis, VDD variation versus timeis given by:
where CVDD is the total capacitance of the bypasscapacitors connected between VDD and GND.
From Equation 15, it is possible to calculate tstart bysubstituting VDD(t) with VDDTH(ST+):
In general, Equation 16 can be simplified as:
Accordingly, tstart can be controlled by adjusting thevalue of Rstart and CVDD. For example, if VDC=311V,Rstart=560k, CVDD=10µF, Ist=120µA, and VDDTH(ST+)=13.5V, tstart is about 0.33s.
Figure 28. Equivalent Circuit During Start
(EQ 8)[ ] [ ]DCV 2 220 V 311V= × ≅
(EQ 9)( )DC DDTH STST
start
V VI
R+−
>
(EQ 10)( )DC DDTH STstart
ST
V VR
I+−
>
(EQ 11)( )2DC CL
start
V V 1 WR 4
[ ]−
<
(EQ 12)( )DC DDTH STstart
SD
V VR
I+−
>
( ) ( )2 DC DDTH STDC CL start
SD
V V4 V V R
I+−
− < < (EQ 13)
(EQ 14)( ) ( )DC DDTH ST DC DDTH ST
startSD ST
V V V VR
I I+ +− −
< <
FAN7711 Rev. 1.00
VCLVDDTH(ST+)
VDDTH(ST-)
VDD
time
tstart
0
( )( )/( )( ) start VDDt R CDD DC start STV t V R I 1 e− ⋅= − ⋅ − (EQ 15)
2. Current Supplied by Charge PumpFor the IC supply, the charge pump method is used inFigure 29. Since CCP is connected to the half-bridgeoutput, the supplied current by CCP to the IC isdetermined by the output voltage of the half-bridge.
When the half-bridge output shows rising slope, CCP ischarged and the charging current is supplied to the IC.The current can be estimated as:
where DT is the dead time and dV/dt is the voltagevariation of the half-bridge output.
When the half-bridge shows falling slope, CCP isdischarged through Dp2. Total supplied current, Itotal, tothe IC during switching period, t, is:
From Equation 19, the average current, Iavg, supplied tothe IC is obtained by:
For the stable operation, Iavg must be higher than therequired current. If Iavg exceeds the required current, theresidual current flows through the shunt regulatorimplemented on the chip, which can cause unwantedheat generation. Therefore, CCP must be selectedconsidering stable operation and thermal generation.
For example, if CCP=0.5nF, VDC=311V, and f=50kHz, Iavgis ~7.8mA; it is enough current for stable operation.
Figure 29. Charge Pump Operation
3. Lamp Turn-on TimeThe turn-on time of the lamp is determined by supplybuild-up time tstart, preheating time, and ignition time;where tstart has been obtained by Equation 17. When theIC's supply voltage exceeds VDDTH(ST+) after turn-on orrestart, the IC operates in preheating mode. Thisoperation continues until CPH pin's voltage reaches ~3V.In this mode, CPH capacitor is charged by IPH current,as depicted in Figure 30. The preheating time isachieved by calculating:
The preheating time is related to lamp life (especiallyfilament); therefore, the characteristics of a given lampshould be considered when choosing the time.
Figure 30. Preheating TimerCompared to the preheating time, it is almost impossibleto exactly predict the ignition time, whose definition is thetime from the end of the preheating time to ignition. Ingeneral, the lamp ignites during the ignition mode.Therefore, assume that the maximum ignition time is thesame as the duration of ignition mode, from 3V until CPHreaches 5V. Thus, ignition time can be defined as:
Note that, at ignition mode, CPH is charged by IIG, whichis six times larger than IPH. Consequently, total turn-ontime is approximately:
VDD Build-Time + Preheating Time + Ignition Time =
4. PCB GuidelineComponent selection and placement on PCB is importantwhen using power control ICs. Bypass the VCC to GNDas close to the IC terminals as possible with a low-ESR/ESL capacitor, as shown in Figure 31. This bypassedcapacitor (CBP) can reduce the noise from the powersupply parts, such as start-up resistor and charge pump.
The signal GND must be separated from the powerGND. So, the signal GND should be directly connectedto the rectify capacitor using an individual PCB trace.
In addition, the ground return path of the timingcomponents (CPH, RT) and VDD decoupling capacitorshould be connected directly to the IC GND lead and notvia separate traces or jumpers to other ground traces onthe board. These connection techniques prevent high-current ground loops from interfering with sensitivetiming component operations and allow the control circuitto reduce common-mode noise due to output switching.
Package Dimensions8-DIPDimensions are in inches and [millimeters] unless otherwise noted.
Figure 34. 8-Lead Dual In-Line Package (DIP)
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FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS.
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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
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1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user.
2. A critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification Product Status Definition
Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice.
Preliminary First Production This datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design.
No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design.
Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild Semiconductor. The datasheet is printed for reference information only.