Embedded Systems - CEFRIEL

Vahid, GivargisVahid, Givargis

Embedded SystemsEmbedded Systems

Embedded Systems OverviewEmbedded Systems Overview

TechnologiesTechnologies

Design ChallengesDesign Challenges

Vahid, GivargisVahid, Givargis -- 22 --

OutlineOutline

Embedded Systems overview

What are they?

Technologies

Processor technologies

IC technologies

Design technologies

Design Challenges

Productivity gap


Embedded systems overviewEmbedded systems overview

Computing systems are everywhere

Most of us think of “desktop” computers

PC’s

Laptops

Mainframes

Servers

But there’s another type of computing system

Far more common...


Embedded systems overviewEmbedded systems overview

Embedded computing systems

Computing systems embedded within other devices

Systems that add a new functionality to the device

Hard to define

Nearly any computing system other than a desktop computer

Billions of units produced yearly

Versus millions of desktop units

Perhaps 50 per household and per automobile


Some embedded systemsSome embedded systems

Anti-lock brakesAuto-focus camerasAutomatic teller machinesAutomatic toll systemsAutomatic transmissionAvionic systemsBattery chargersCamcordersCell phonesCell-phone base stationsCordless phonesCruise controlCurbside check-in systemsDigital camerasDisk drivesElectronic card readers

Portable video gamesPrintersSatellite phonesScannersSmart ovens/dishwashersSpeech recognizersStereo systemsTeleconferencing systemsTelevisionsTemperature controllersTheft tracking systemsTV set-top boxesVCR’s, DVD playersVideo game consolesVideo phonesWashers and dryers

Electronic instruments Electronic toys/gamesFactory controlFax machinesFingerprint identifiersHome security systemsLife-support systemsMedical testing systemsModemsMPEG decodersNetwork cardsNetwork switches/routersOn-board navigationPagersPhotocopiersPoint-of-sale systems


Characteristics of embedded systemsCharacteristics of embedded systems

Single-functioned

Executes a single function, repeatedly

Tightly-constrained

Low cost

low power

Small

Fast

...

Reactive and real-time

Continually reacts to changes in the environment

Must compute certain results in real-time


Design metricsDesign metrics

Design goal

Build an implementation with desired functionality

Key design challenge

Simultaneously optimize numerous design metrics

Design metric

A measurable feature of a system’s implementation

Optimizing design metrics is a key challenge



NRE costNon-Recurring Engineering cost

The one-time cost of designing the system

Unit costThe cost of each copy of the systemBOM

Fabrication &End-of-line testing

NRE

Time-to-prototypeTime needed to build a working version of the system

Time-to-marketThe time required to develop a system to the point that it can be released and sold to customers



Size, Weight

The physical space required by the system

Performance

Hard to define, often measured as the execution time or throughput of the system

Power, Energy

The amount of power consumed by the system

Flexibility

The ability to change the functionality of the system without incurring heavy NRE cost

Maintainability

the ability to modify the system after its initial release

Correctness, safety, …


Design metrics: NRE and Unit costDesign metrics: NRE and Unit cost

Relations

TotalCost = NREcost + UnitCost × #Units

PerProductCost = TotalCost / #Units =

= (NRECost / #Units) + UnitCost

Example 1

NRECost = 2000$

UnitCost = 100$

10 units

PerProductCost = 2000$ / 10 + 100$ = 300$

100 units

PerProductCost = 2000$ / 100 + 100$ = 120$


Design metrics: TimeDesign metrics: Time--toto--marketmarket

Time required to develop a product to the point it can be sold to customers

Market window

Period when the product would have highest sales

Average time-to-market is about 6 to 8 months

Delays can be costly

This period is continuosly shrinking, especially for consumer electonics


Design metrics: TimeDesign metrics: Time--toto--marketmarketrevenue ($)

time (months)

W 2WD

delay

time (months)

revenue ($)

delay


Design metrics: TimeDesign metrics: Time--toto--marketmarket

Revenue = 1/2 × base × height

On-time = 1/2 × 2W × W = W2

Delayed = 1/2 × (2W-D) × (W-D)=W2+D2/2-3WD/2

RevenueLoss = D(3W-D)/2W2

Example 1

Lifetime 2W = 52 w

Delay = 4 W

RevenueLoss = 4 × (3 × 26 – 4)/2 × 262) = 0.22 = 22%

Example 2

Lifetime 2W = 52 w

Delay = 10 W

RevenueLoss = 10 × (3 × 26 – 10)/2 × 262) = 0.45 = 45%


Design metrics: NRE and Unit costDesign metrics: NRE and Unit cost

Solution A: NRECost=$2,000 #Units=$100

Solution B: NRECost=$30,000 #Units=$30

Solution C: NRECost=$100,000 #Units=$2

$0

$50,000

$100,000

$150,000

$200,000

$250,000

$300,000

$350,000

0 500 1000 1500 2000 2500 3000 3500

Solution A

Solution B

Solution C


Design metrics: PerformanceDesign metrics: Performance

Clock frequency, instructions per secondNot good measures, abused

Digital camera exampleA user cares about how fast it processes images, not clock speed or instructions per second

LatencyTime between task start and end

Digital camera exampleCamera processes images in 0.25 seconds

ThroughputTasks per second

Digital camera example Camera processes 4 images per second


Key technologiesKey technologies

Technology

A manner of accomplishing a task, especially using technical processes, methods, or knowledge

Three key technologies for embedded systems

Processor technology

IC technology

Design technology


Processor technologyProcessor technology

The architecture of the computation engine used to implement a system’s desired functionality

A part of the whole system

The complete system

Processor does not have to be programmable

A processor is not necessarily a general-purpose programmable processor

Something that processes data

Input

Processing

Output


Processor technologyProcessor technology

Processors vary with respect to their customizationfor the problem under study

total = 0

for i = 1 to N

loop

total += M[i]

end loop

General-purpose

processor

Single-purpose

processor

Application-specific

processor

Desired

functionality


Processor technology: GPPProcessor technology: GPP

Programmable device used in a variety of applications

Also known as microprocessor

Features

Program memory

General datapath with large register file and general ALU

User benefits

Low time-to-market and NRE costs

High flexibility

IR PC

Registerfile

GeneralALU

DatapathController

Program memory

Assembly code for:

total = 0

i = 1

...

Control logic and

State register

Datamemory


Processor technology: SPPProcessor technology: SPP

Digital circuit designed to execute exactly one program or task

Coprocessor

Accelerator

Features

Contains only the componentsneeded to execute a single program

No program memory

Benefits

Fast

Low power

Small size

DatapathController

Control logic

State register

Datamemory

index

total

+


Processor technology: ASIPProcessor technology: ASIP

Programmable processor

Optimized for applications having common characteristics

Compromise between general-purpose and single-purpose

Features

Program memory

Special functional units

Benefits

Flexibility

Performance

Size, Power

IR PC

Registers

CustomALU

DatapathController

Program memory

Assembly code for:

total = 0

i = 1

...

Control logic and

State register

Datamemory


IC technologyIC technology

The manner in which a digital implementation is mapped onto a technological solution

Integrated Circuit

Technologies differ in their customization to a design

Consist of numerous layers

Integrated circuit technologies differ with respect to

Who builds each layer

When layers are built

Three types of IC technologies

Full-custom

Semi-custom (Gate Array and Standard Cell)

Programmable Logic Device


IC technology: Full CustomIC technology: Full Custom

All layers are optimized for an embedded system’s particular digital implementation

Placing transistors

Sizing transistors

Routing wires

Benefits

Excellent performance

Small size

Low power

Drawbacks

High NRE cost

Long time-to-market (months/years)


IC technology: Semi CustomIC technology: Semi Custom

Lower layers fully or partially built (Gate array)

Designers are left with routing of wires

Maybe placing some blocks

Built using black-box cells (Standard cells)

Simplifies design but not fabrication

Benefits

Good performance

Good size

Less NRE cost than a full-custom implementation

Drawbacks

Still require long time-to-market (months)


IC technology: PLDIC technology: PLD

All layers already exist

Logic blocks are already built on the device

Connections are either created or destroyed

Field-Programmable Gate Array (FPGA) very popular

Benefits

Low NRE costs

Very short time-to-market

Drawbacks

Huge size compared to semi- or full-custom

Slow and power-consuming

Expensive


PProcessorrocessor and IC technologiesand IC technologies

Basic tradeoff: General vs. Custom

With respect to processor technology or IC technology

The two technologies are independent

GPP ASIP SPP

PLD

General

High flexibilityLow NRE cost

Low time-to-marketLow cost for low volumes

Custom

High Power efficiencyHigh PerformanceSmall sizeLow cost for high volumes

Semi-Custom Full-Custom


MooreMoore’’s laws law

Moore's Law (1965):

"IC transistor capacity doubles every 18 months"

Transintors on a single chip

1E+03

1E+04

1E+05

1E+06

1E+07

1E+08

1E+09

1E+10

1975 1980 1985 1990 1995 2000 2005 2010 2015

Year

Tra

ns

isto

rs


MooreMoore’’s law in a pictures law in a picture

Something that doubles frequently grows more quickly than most people realize!

A 2008 chip can hold about 400,000 1981 chips

Faster growth w.r.t. Moore’s Law

‘81 ‘84 ‘87 ‘90 ‘93 ‘96 ‘99 ‘02

Leading edge

chip in 1981

10,000

transistors

Leading edge

chip in 2008

4,000,000,000

transistors

‘06 ‘08


Design TechnologyDesign Technology

The manner in which we convert our concept of desired system functionality into an implementation

Compilation/Synthesis

Automates exploration and insertion of implementation details for lower level

Libraries/IP

Incorporates pre-designed implementation from lower abstraction level into higher level

Test/Verification

Ensures correct functionality at each level, thus reducing costly iterations between levels


Design Technology: HWDesign Technology: HW

Implementation

Gatesimulators

Gates & CellsLogic

synthesis

HDL

simulators

RTcomponents

RTsynthesis

Co-simulatorsCoresBehavioralsynthesis

Model SimulatorsCheckers

CoresSystemsynthesis

VerificationLibrariesCompilation

Systemspecification

Behavioralspecification

RTspecification

Logicspecification


Design Technology: SWDesign Technology: SW

Implementation

ISSInstruction setsAssembly andLinking

Static analysis

Execution

Profiling

FunctionsCompilation

(Symbolic) Execution

FunctionsCode cleaning and optimization

Domain-specificSimulators

Components(OS, Stacks, ...)

Code Generation

VerificationLibrariesCompilation

Systemspecification

Behavioralspecification

RTspecification

Logicspecification


Design productivityDesign productivity

Exponential increase over the past few decades

Productiv ity

1E+00

1E+01

1E+02

1E+03

1E+04

1E+05

1E+06

1975 1980 1985 1990 1995 2000 2005 2010 2015

Year

Tra

ns

isto

rs/P

M


Design productivity gapDesign productivity gap

The productivity has grown at a slower rate with respect to chip capacity

Productiv ity Gap

1E+00

1E+01

1E+02

1E+03

1E+04

1E+05

1E+06

1E+07

1E+08

1E+09

1E+10

1975 1980 1985 1990 1995 2000 2005 2010 2015

Year

Tra

ns

isto

rs/P

M today's gap


Design productivity gapDesign productivity gap

1981 leading edge chip

10.000 Transistors

100 Transistors/Person Months

100 Person Months

Design Cost: 1 M$

2008 leading edge chip

4.000.000.000 Transistors

100.000 Transistors/Person Months

4.000 Person Months

Design Cost: 200 M$

Embedded Systems - CEFRIEL

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