Electronics engineering - Korea univ.

8/10/2019 Electronics engineering - Korea univ.

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Electronics by Eunil Won, Korea University


Electronics - 06: More on Op-Amplifiers

Op-Amplifiers

- Difference Amplifiers- Instrumentation Amplifiers

1


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2

Differential (or difference) Amplifiers: responds to the difference between the two signals applied at its input

One can parametrize two inputs as their differential and common-mode components

-+

-+

-+vIcm

vId/2

vId/2

1

2

vI1 =vIcm vId/2

vI2 = vIcm + vId/2 vIcm =1

2(vI1+ vI1)

The output voltage: vO = AdvId +AcmvIcm

Ideally, this term should be zeroAd : amplifier differential gain

Acm: common-mode gain (ideally zero)

The efficiency of a differential amplifier: quantified by common-mode rejection ratio (CMRR)

CMRR = 20 log10

Ad

|Acm|

ex) MAXIM MAX4198/4199

differential amplifier(look at http://korea.maxim-ic.com)

has CMRR = 90 dB

0 = 20log10d

|Acm|

|Ad|

|Acm| = 10

9

2 31623

CMRR is quite suppressed

Id = I2 I1
http://korea.maxim-ic.com/http://korea.maxim-ic.com/


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3

A single op amp difference Amplifiers

We wish to determine in terms of ando I1 I2

Circuit is linear so we apply superposition

i) we reduce to zero: output = vO1I2-

+

R1

Let us start with:

-

+

R1

R2

vO

+

-R3

R4

vI1

I2

R2

R3 R4

vI1

Therefore, we have v 1 = R2

R1v 1

(R3and R4do not affect the gain expression)

ii) we reduce to zero: output =vI1 O2

-

+

R1

R2

R3

R4

I2

is altered by the voltage divider formed by R3and R4

vO2 =

vI2

R4

R3 +R4

1 +

R2

R1


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4

A single op amp difference AmplifiersNow we require that the gain magnitudes for inverting and non-inverting to be same:

R4

R3 +R4

1 +

R2

R1

=

R2

R1

R4

R3 +R4=

R2

R1 +R2R3

R4+ 1 = R1

R2+ 1

R3

R4=

R1

R2

and we have vO = vI2R4

R3 +R4

1 +

R2

R1

=

R2

R1vI2

The superposition of i) and ii) tells us that

vO = vO1+ vO2 =R2

R1vI2

R2

R1vI1=

R2

R1(vI2 vI1) =

R2

R1vId

Ad =R2

R1and we usually select R3= R1and R4= R2

Next, lets consider the circuit with only a common-mode signal applied at the input

-

+

R1

R2

R3

R4-+Icm

1

i2 The voltage at + terminal = 4

R3 +R4vIcm

and it should be same as the

voltage at the - terminal

i1 =1R1

vIcm

R4

R3 +R4vIcm

= 1

R1

R3

R3 +R4vIcm

i1 = i2

Thus

the output voltage becomes

O = 4

R3 +R4vIcm i2R2 =

4

R3 +R4vIcm

R1

3

R3 +R4vIcmR2

=R4

R3 +R4

1

R2

R1

R3

R4

vIcm

Acm= VOvIcm

= R4R3+ R4

1R2R1

R3R4

= 0 (R4/R3 = R2/R1)

so it rejects common

mode signal


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5

A single op amp difference AmplifiersIn addition to rejecting common-mode signals, a difference amplifier is usually required to have a high input resistance

To find out the input resistance between the two input terminals (resistance seen by vId), called the differential input

resistance ( ), lets consider the following circuitRId

Here we assumed: R3 = R1 an R4 = R2

RId Id

iI-

+

R1

-

+

R2

R2

R1

RId

iI

iI

Since the two input terminals of the op amp track each other in potential, we may

write a loop equation and obtain

virtual short circuit

thus: RId = 2R1

Limitation: note that if the amplifier is required to have a large differential gain (R2/R1), then R1will be relativelysmall and the input resistance will be correspondingly low, a drawback of this circuit. Another drawback of the

circuit is that it is not easy to vary the differential gain of the amplifier (see the next instrumentation amplifier)

vId = R1iI+ 0 +R1iI


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6

The Instrumentation AmplifierThe low-input resistance problem of the difference amplifier can be solved by buffering the two input terminals using

voltage followers:

-

+

-

+

-

+

I1

I2

1

A2

3

R1

R1

R2

R2

R3

R3

R4

R4

O

+

-

non-inverting configuration, gain =

non-inverting configuration, gain =

1 +

R2

R1

vI1

1 +R2

R1

vI2

i) 1st stage: non-inverting configuration

ii) 2nd stage: difference amplifier

input to 2nd stage: 1 +R2

R1

(vI2 vI1) =

1 +

R2

R1

vId

vO = R4

R31 + R2

R1

vId

and differential gain is Ad =R4

R3

1 +

R2

R1

and the common-mode gain will be zero because of thedifferencing action of the 2nd-stage amplifier

Now the above circuit has the advantage of very high input resistance and high differential gain - however has three

major disadvantages:

i) is amplified in the first stage so A3may be saturated or CMRR will be reduced

ii) Two amplifiers in the 1st stage have to be perfectly matched, otherwise a spurious signal is amplified in

the 2nd stage

iii) To vary Ad, two resistors labeled R1 or R2have to be varied simultaneously (difficult)

vIcm

remedy in the next design

X


7/25Electronics by Eunil Won, Korea University


7

The Instrumentation Amplifier

-

+

-

+

-

+

I1

I2

1

A2

3

R2

R2

R3

R3

R4

R4

O

+

-

Virtual short circuit at A1and A2causes input voltages

appear (-) on A1and (-) on A2

All three problems can be solved with a very simple wiring change: disconnect the node between R1 (node X), from

ground

Note: i) the proper differential operation does notdepend on the matching of two R2: if we have R2and R2

2R1

vO1

O2

vI1

I2

so appears across 2R1I2 I1 = Id

i =vId

2R1

i = Id

2R1

i =vId

2R1

i =vId

2R1and it flows to R2in A1and A2

Now vO1 = vI1 Id

2R1

R2

vO2 = vI2 + Id

2R1R2

vO2 vO1 = vI2 vI1 +R2

R1vId =

1 +

R2

R1

vId

At the 2nd stage:

vO=R

4

R3(vO2

vO1) =

R4

R31 +

R2

R1vId Ad = R4

R3

1 + R2

R1

then the new gain becomes (no need for simultaneous adjustment)

ii) common-mode input gives zero current flowing in the R2resistors: (because of the virtual short circuit)

iii) The gain can be varied by changing only one resistor 2R1

Ad =R4

R3

1 +

R2 + R

2

2R1




8

Single Time Constant CircuitsSingle time Constant (STC) circuits are those circuits that are composed of, or can be reduced to, one reactive

component (inductance or capacitance) and one resistance

Evaluating the time constant: suppose we are given with the below circuit. What is the time constant of this circuit?

-+

R1

R2

R3

R4 C O

+

-

i) reducing the excitation to zero: short the voltage source and

open the current source

R1

R2

R3

R4 C vO

+

-

ii) find the equivalent resistor value

R3

R4 C vO

+

-

(R1||R2)

C vO

+

-

[(R1||R2) + R3]|| R4-+

Req = [(R1||R2) + R3] || R4

ii) put the excitation to the original state and calculate the STC

= ReqC= [(R1||R2) + R3] || R4 C




9

Frequency Response of STC CircuitsTransfer function T(s): the transfer function is a mathematical representation of the relation between the input and

output of analog electronic circuits

Mathematically, we define T(s) as, for given input and outputvI(t) vO(t)

VO(s) = T(s)VI(s) or T(s) = VO(s)

VI(s) =

L{vO(t)}

L{vI(t)}

where VO(s) and VI(s) are the Laplace transform of vI(t and vO(t

Low-pass circuit

High-pass circuit

T(s) = K

1 + (s/0) T(j) =

K

1 +j(/0)

T(j) = K

1j(0/)T(s) =

Ks

s + 0

0 = 1/|T(j)|=

1 + (/0)2

|T(j)|= K

1 + (0/)2

() = tan1 (/0)with

and for physical frequencies,

Kthe magnitude of the

transfer function at !=0magnitude:

phase:


magnitude: phase: () = tan (0/)




10

Frequency Dependence of the open-loop gainThe differential open-loop gain of an op amp is not infinite; rather it is finite and decreases with frequency (due to

internal capacitances : internally compensated op amp)

0

25

50

75

100

10 102 103 104 105 106

AO 3 dB

fb ft

The gain at dc is high but it starts to fall of at a rather low

frequencies (~10 Hz in this example)

The uniform - 20 dB/decade gain roll off : character of

internally compensatedop amps

- 20 dB/decade

By analogy to the response of low-pass STC circuits, the gain A(s) of an internally compensated op amp may be

expressed as:A(s) =

A01 +s/b

A(j) = A0

1 +j/b

A0

b b

A(j) A0b

j|A(j)|

A0b


: the dc gain

: the 3-dB frequency (corner frequency)

0 = 105

= 2!x 10 rad/sb

For higher frequencies

and(responsible for thestraight line above)

The gain |A| reaches unity ( 0dB) at !t t = A0b ft = t/2and : unity-gain bandwidth

Thus if ftis known, (106Hz in our example), one can easily determine the magnitude of the op-amp gain at a

given frequency f




11

Frequency Dependence of the open-loop gainExample)

Note that this is a

normalized gain

20log10

A(j)

A0

(my best guess)

400 MHz is here

When you do real life research,

you should be able to understandthe parameters in the date sheet!




12

Frequency Dependence of Closed-Loop AmplifiersInverting Amplifier:

the closed loop gain of inverting amplifier wasR2/R1

1 + (1 + R2/R1)/A

A(s) = A01 +s/b

since the transfer characteristicof the closed loop gain is A0b = t

For A0

1 +

R2

R1

(usually the case)

VO s

Vi(s) =

R2/R1

1 +

1 + R2R1

1A0

1 + s

b

= R2/R11 + 1A0

1 + R2R1

+ sA0b

1 + R2R1

= R2/R11 + 1A0

1 + R2R1

+ s

t/(1+R2/R1)

VO(s)

Vi(s) R2/R1

1 + st/(1+R2/R1)

: same form as the low pass network

and the corner frequency becomes 3dB =t

1 + R2

R1

Non-inverting Amplifier:

the closed loop gain of non-inverting amplifier was1 + R2/R1

1 + (1 + R2/R1)/A

T(s) = 1 + (s/0)

Vo(s)

Vi(s)

1 +R2/R11 + s

t/(1+R2/R1)Similarly, for A0

1 +

R2

R1

(usually the case)

: same form as the low pass networkwith a dc gain gain of (1+R2/R1)

and the corner frequency becomes 3dB =t

1 + R2

R1




13

Frequency Dependence of Closed-Loop AmplifiersExample) Consider an op amp with the unity gain bandwidth ft= 1 MHz. Find the 3 dB frequency of closed-loop

amplifiers with nominal closed-loop gains of +1000, +100, +10, +1, -1, -10, -100, - and 1000.

So,

3dB =t

1 + R2

R1

Closed loop gain R2/R1 f3dB=ft/(1+R2/R1)

+1000 999 1 kHz

+100 99 10 kHz

+10 9 100 kHz+1 0 1 MHz

-1 1 0.5 MHz

-10 10 90.9 kHz

-100 100 9.9 kHz

-1000 1000 ~1 kHz

At dc:

Vo(0)

Vi(0) = 1 + R2/R1 (non-inverting) and

Vo(0)

Vi(0) = R2/R1 (inverting)

+1000 = 1 +R2/R1 R2/R1 = 999

1000 = R2 R1 R2 R1 = 1000

and one can fill the columns for R2/R1

And from

one can fill the 3rd columns as well

This table clearly illustrates the trade-off between gain and bandwidth: for a given op amp, the lower the closed-loopgain required, the wider the bandwidth achieved

The non-inverting configuration exhibits a constant gain-bandwidth product equal to ftof the op amp

El b E l W K U




14

Large signal operation of op ampsOutput voltage saturation: Similar to all other amplifiers, op amps operate linearly over a limited range of output

voltages

Output current limits: output current of op amps is limited to a specified maximum

Slew rate: there is a specific maximum rate of change possible at the output of a real op amp and this maximum is

known as the slow rate (SR)

SR = vO

dt

max

: usually specified on the op-amp date sheet in units of V/"s

-

+

3

I

+

-

vO = vI

I

t t

O

slope = SRThe origin of the slew-rate phenomenon weneed to know aboutthe internal circuit ofthe op amp (not in thescope of this class)(unity gain voltage

follower)

300 V/"s = 3 V/0.01 "s

(fast enough?)

El i b E il W K U i i




t

theoretical output

output when op ampis slew-rate limited

15

Large signal operation of op ampsFull power bandwidth:

Consider the unity-gain follower with a sine wave input given by vI= Visin t

vI

dt = Vicost Vi: the rate of change of this waveform is given by with max. value of

note: if exceeds the slew rate of the op amp, the output waveform will be distortedVi

The op amp date sheet usually specify a frequency fM, called the full-power bandwidth: it is the frequency at

which an output sinusoid with amplitude equal to the rated output voltage of the amp begins to show distortion

due to slew-rate limiting

MVomax = SR or fM= SR

2VomaxVomax : the rated output voltage

El i b E il W K U i i




16

DC ImperfectionsOffset Voltage:

When two input terminals of the op amp are tied together and connected to ground, the output

show will show a finite dc voltage (dc offset voltage)

-

+3 O = 0

circuit model -

+3

- +

offset-free op amp

Actual op amp

VOS

VOS: input offset voltage: it is within 1 mV ~ 5 mV and depends on temperature

Input bias and offset current

In order for the op amp to operate, its two input terminals have to be suppliedwith dc currents (=input bias current)

Evaluating the output dc offset voltage due to VOSin a closed-loop amplifier:

-

+3

vO

+

-

- +

R1

R2

VOS

VO = VOS 1 +R2

R1

IB1

IB2

IB = B1 + B2

2input bias current

IOS = |IB1 IB2| input offset current

(For BJT, IB= 100 nA, IOS= 10 nA and for FET input bias is ~ pA)

El t i b E il W K U i it




17

DC Imperfections

So far, we have not so explicit in the notation of the current, regarding the

direction and the sign. From now on, we agree on

Current values are all assumed to be positive

When we need to add or subtract current values, we carefully assign(+) or (-) depending on the direction of currents to be manipulated

El t i b E il W K U i it




18

DC Imperfections:output voltage of the closed-loop amp due to the input bias current?Input bias and offset current

IB1

B2+

-1

R2

IB1

0

0 V+

-

VO = IB1R2

(-) terminal is at 0 V

I1is through R2

VO = IB1R2 IBR2

and this gives an upper limit on the value of R2

A technique exists for reducing the values of he

output dc voltage due to the input bias currents

(see the below circuit)

IB1

B2+

-R1

R2

0 V+

-R3

1

2

B2VO

Now with R3 at (+) terminal

(+) terminal : the voltage is IB2R3

so

I2 = IB1 I1 = IB1 IB2R3

R1

VO = IB2R3 +R2

IB1 IB2

R3

R1

So, if we choose

If B1 = B2 = B VO = IB

R2 R3

1 +

R2

R1

R3

=R2

1 + R2R1

=R1R2

R1 +R2

then we have VO = 0:output voltage of the closed-loop amp due to the input bias

current can be set to zero

I1= (IB2R3)/R1

Electronics by Eunil Won Korea University




19

DC Imperfections: effect of a finite offset current IOS?Input bias and offset current

IB1

B2+

-1

R2

0 V+

-

R3

1

2

B2

VO

Let us assume that

then

IB1 = IB + IOS/2 IB2 = IB IOS/2

Vo = IB2R3+R2 IB1 IB2R3R1

= (IB Ios/2) R1R2R1+R2

+R2

(IB+IOS/2) (IB IOS/2)

R1R2R1+R2

1

R1

= IBR1R2

R1+R2+R2IB R2IB

R2R1+R2

+IOS

2R1R2

R1+R2+R2

IOS2

+R2IOS

2R2

R1+R2

= Ib1

R1+R2(R1R2+R2(R1+R2) R

22)

=0

+IOS

2

1

R1+R2(R1R2+R2(R1+R2) +R

22)

=2R2(R1+R2)

= IOSR2and is usually about an order of magnitude smaller than the value obtained

without R3





20

DC Imperfections

For ac-coupled amplifiers, one must always provide a continuous dc

path between each of the input terminals of the op amp and ground:

for this reason the ac-coupled non-inverting amplifier in the left figure

will not work without the resistance R3to the ground

We conclude that to minimize the effect of the input bias currents one

should place in the positive lead a resistance equal to the dc resistance

seen by the inverting terminal

-

+

R1

R2

R3 = R2

-

+

R1

R2

R3 = R2

C

C1

C2

Unfortunately, including R3lowers considerably the input resistance

of the closed-loop amplifier

R1R2

R1 +R2



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21

Integrators and Differentiators (Op amp version)The op-amp circuit applications we have studied thus far utilized resistors in the op-amp feedback path and in

connecting the signal source to the circuit (feed-in path): as a result circuit operation has been (ideally)

independent of frequency

By allowing the use of capacitors together with resistors in the feedback and and feed-in paths of op-amp, we open

the door to a very wide range of useful and exciting applications of the op amp

The inverting configuration with general impedances

The closed loop transfer function becomes then

Vo(s)Vi(s)

=Z2(s)Z1(s)

-

+

Z1

2

i Vo

To begin with, consider the inverting closed-loop configuration with impedances Z1(s) and Z2(s) as below

(Again, we do not deal with the Laplace transform but infer this equationfrom the closed-loop gain of the inverting amplifiers with resistances)



22/25



22

The Inverting Integrator

the current through the resistor

-

+

Let the input be a time-varying function:

realizing the

mathematical

operation of

integration

R

C

vI(t)

vI(t)

i1 i1(t) =vI(t)/R

and it flows through the capacitor

will deposit the charge on the capacitor

t

0

i1(t) dt

Therefore the capacitor voltage will change by

If VCis the voltage on C at t=0,

1

C

t

0

i1(t) dt

vC(t) = VC+ 1C

t

0

i1(t) dt

vO(t) = vC(t) = 1

C

t

0

i1(t) dt VC= 1

RC

t

0

vI(t) dt VCThe output voltage becomes

In frequency domain, Z1(s) =R, Z2(s) = 1

sC

Vo(s)

Vi(s)=

1

sCR=

1

jCR

Vo(s)

Vi(s)

=

1

CR

Vo

Vi

(log scale)1

RC

Integrator behaves as a low-pass filter with

a corner frequency of zeroIt is also known as a

Miller integrator



23/25



23

The Inverting Integrator: consider the following circuit (input signal is shorted for easier

analysis)

The effect of the input dc input offset voltage (VOS)

-

+

R

C

- +

VOS

VOS/R

VOS/R

O

(Note: the current flow is opposite so the sign is

changed from the case in the previous slide)

vO = VOS+VOS

CRt

Thus vOincreases linearly with time until the op amp saturates!

The effect of the input dc input offset current (IOS)

-

+

R

C

O

: consider the following circuit (we added a resistance R in the opamp positive-input lead in order to keep the input bias current IB

from flowing through C)

R

There are input bias currents: IB1and IB2

Voltage at (+) terminal : = Voltage at (-) terminalIB2R

negative becauseit is an inverting

circuit

I2 = IB1 IB2 = IOS

B1

B2

2

I1 = IB2R R = IB2

vO = IB2R+1

C IOS dt = IB2R+ IOS

C t

Thus vOincreases linearly with

time until the op amp saturates!

I1 = IB2R R= IB2



24/25



24

The Inverting Integrator: the dc problem can be alleviated by connecting a resistor RF

across the integrator capacitor C

The Miller integrator with a large resistance RF:

-

+

C

O

RFprovides a dc path through with (VOS/R) and IOScan flow!

Therefore vOwill now have a dc component instead of rising

linearly

vO = VOS 1 + RF

R + IOSRF

F

due to dc offset + R,RF due to IOS,RF

And the integrator transfer function becomes

Vo(s)

Vi(s) =

RF R

1 + sCRF

as opposed to the ideal function of1 sCR

The lower the values we select for RF, the higher the corner frequency (1/CRF) will be and the more non-ideal

the integrator becomes



25/25


The Op-Amp Differentiator

Assume a time varying input voltage :The Miller integrator with a large resistance RF:

-

+

C

O

vI(t)

vI(t)

0

i

i

The virtual ground at the inverting input terminal of the op amp

causes vI(t) to appear across the C

The current through C i= d

dt(CvI(t)) = C

dvI(t)

dt

and with

vO(t) = iR= CRdvI(t)

dt

The frequency-domain transfer function of the differentiator circuit can be found by

Vo(s)

Vi(s)=

Z2(s)

Z1(s)

and this current flows

through R so that

Z1(s) = 1 sC Z2(s) = R

Vo(s)

Vi(s)= sCR or

Vo(s)

Vi(s)= jCR

CR: differentiator time-constant

realizing the

mathematical

operation of

differentiation

Electronics engineering - Korea univ.

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