EE141 1 EECS141 1 Lecture #10 EE141 EE141- Fall 2007 Fall 2007 Digital Integrated Digital Integrated Circuits Circuits Lecture 10 Lecture 10 CMOS Scaling CMOS Scaling Wires Wires EE141 2 EECS141 2 Lecture #10 Announcements Announcements Lab 4 this week No lab next week Homework #5 due next Thursday Midterm 1 next Thursday! 105 Northgate, 6:30-8:00pm – No 10 min delay – show up on time! Material until today’s lecture, homework 5, lab 4 Review session in Tuesday’s lecture – Prepare your questions No labs, no new homework next week EE141 3 EECS141 3 Lecture #10 Class Material Class Material Last lecture Buffer sizing Today’s lecture Scaling Wires Reading (5.5, Chapter 4) EE141 4 EECS141 4 Lecture #10 Homework #2 feedback Homework #2 feedback Simulation is not a substitute for thinking! Garbage in, garbage out Always check if your sim result makes sense Change parameters you think shouldn’t affect your result, and make sure they don’t. Example: “step inputs” If delay you measured was close to the “step” rise time Better check your risetime – You probably don’t really have a “step” EE141 5 EECS141 5 Lecture #10 Homework #2 feedback Homework #2 feedback t p,avg = (t pHL + t pLH )/2 If unsure what we want you to do in a problem, ask us E.g., in problem 1, don’t assume that you can just eyeball the VTC curve EE141 6 EECS141 6 Lecture #10 Impact of Impact of Technology Scaling Technology Scaling
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EE1411
EECS141 1Lecture #10
EE141EE141--Fall 2007Fall 2007Digital Integrated Digital Integrated CircuitsCircuits
Goals of Technology ScalingGoals of Technology Scaling
Make things cheaper:Want to sell more functions (transistors) per chip for the same moneyOr build same products cheaperPrice of a transistor has to be reduced
But also want to be faster, smaller, lower power
EE1418
EECS141 8Lecture #10
Technology ScalingTechnology ScalingBenefits of 30% “Dennard” scaling (1974):
Double transistor density Reduce gate delay by 30% (increase operating frequency by 43%)Reduce energy per transition by 65% (50% power savings @ 43% increase in frequency)
Die size used to increase by 14% per generation (not any more)Technology generation spans 2-3 years